CN1667584A - Motherboard function test board - Google Patents

Motherboard function test board Download PDF

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Publication number
CN1667584A
CN1667584A CN 200410026539 CN200410026539A CN1667584A CN 1667584 A CN1667584 A CN 1667584A CN 200410026539 CN200410026539 CN 200410026539 CN 200410026539 A CN200410026539 A CN 200410026539A CN 1667584 A CN1667584 A CN 1667584A
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China
Prior art keywords
signal
motherboard
test
cpld
circuit
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Granted
Application number
CN 200410026539
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Chinese (zh)
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CN100395718C (en
Inventor
潘文俊
张溯舜
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Hongfujin Precision Industry Shenzhen Co Ltd
Hon Hai Precision Industry Co Ltd
Original Assignee
Hongfujin Precision Industry Shenzhen Co Ltd
Hon Hai Precision Industry Co Ltd
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Application filed by Hongfujin Precision Industry Shenzhen Co Ltd, Hon Hai Precision Industry Co Ltd filed Critical Hongfujin Precision Industry Shenzhen Co Ltd
Priority to CNB2004100265390A priority Critical patent/CN100395718C/en
Publication of CN1667584A publication Critical patent/CN1667584A/en
Application granted granted Critical
Publication of CN100395718C publication Critical patent/CN100395718C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

The invention relates to a motherboard function test board, which can be used to test motherboard function on-line automatically and completely, wherein the invention comprises a VGA and AGP change circuit which can activate initial test through a trigger signal and realize the automatic switch between AGP and VGA through a signal automatic switch circuit; an Audio test circuit, which controls a CPLD Out0 and a CPLD Out2 signal and form test circuit with tested motherboard sound source to realize the test completely about the motherboard sound source circuit; a battery test circuit, which screens out the non-conforming article with lower electric quantity than the standard through the comparison between the tested motherboard battery and a battery standard; a Front Panel test circuit,which realizes the automatic control and test to shell type, hard disk display and power display of the tested motherboard, wherein the test result can be displayed in the video screen straightly.

Description

Motherboard functional test plate
[technical field]
The invention relates to a kind of motherboard device for testing functions, be meant a kind of motherboard functional test plate that can carry out full test especially the multiple function of tested motherboard.
[technical background]
Motherboard is after assembly is finished, need to determine whether it is good product through comprehensive functional test, and host board testing mainly is at the various mistakes on this motherboard, for example, the situations such as part of open circuit, short circuit and non-correct contact are detected, promptly in conjunction with rub-out signal data that tester table produced, and motherboard to be measured is by wiring data that computer-aided design (CAD) produced, make maintenance person rapidly by the poor prognostic cause place of finding out the circuit-under-test plate on the screen, thereby save the time of imperfect repair product.
Existing motherboard functional test machine is that a motherboard to be tested is plugged on the test board; be connected in the slot and chip pin of connector to be tested in the mode of artificial plug by some winding displacements that are connected on the test machine then; test signal is guided; but; usually have a lot of components and parts on the motherboard to be tested; the winding displacement that plugs this type of slot that is connected to assembly and chip pin one by one need expend a large amount of artificial and times; and the workman is in the long-time operation process, occurs easily because of situations such as fatigue or maloperation jam a finger.
Industry had been improved above work pattern afterwards, this improved procedure is to utilize a probe stationary plate that the test signal of motherboard components and parts to be measured is connect to draw by some probes to receive on the card extender, this card extender is electrically connected on the measurement jig, it can be to the CPU on the motherboard to be tested (central processing unit), hard disk and PCI (Peripheral Component Interface, peripheral interface) primary clustering such as slot and interface carry out the generality test, and about audio-frequency test, the test of assemblies such as power supply then can't be taken into account, and the bad quality yield that can have influence on whole motherboard equally of quality of assemblies such as audio frequency and power supply, can use to the user and bring certain puzzlement, for example, if the power source voltage value is lower than standard voltage value, can influence the setting of CMOS value on the mainboard, thus fault such as cause that the preset password value can't be preserved.
[summary of the invention]
The object of the present invention is to provide a kind of simple operation and can carry out motherboard functional test plate motherboard to be tested than full test.
Motherboard functional test plate of the present invention comprises a VGA (Video Graphic Array, the video and graphic array) and AGP (Accelerated Graphics Port, AGP) change-over circuit, one Audio (audio frequency) test circuit, one battery test circuit, one Serial Port (serial port) test loop, one FrontPanel (panel) test circuit, one IDE2 (Integrated Drive Electronics, integrated device electronics) interface, one PCI, IDE1, SATA (Serial Advanced Technology Attachment, hard-disk interface), Floppy (floppy drive), USB (Universal Serial Bus USB (universal serial bus)) converting interface and a network interface card test loop.Wherein, this VGA and AGP change-over circuit be by an activation trigger signal initial testing, and be implemented in automatic switchover between AGP and VGA by a signal automatic switch-over circuit; This Audio test circuit is by control one CPLD (Complex programmable Logic Device, complicated formula Programmable Logic Device) Out0 (output) and a CPLD Out2 signal, and form test loop with tested motherboard source of sound respectively, realize full test to the motherboard sounding circuit; This battery test circuit filters out the defective products that charge value is lower than standard value by tested motherboard battery is compared with a battery standard value, guarantees the power supply yield of the motherboard of producing; This Front Panel test circuit shows and power supply demonstration implementation monitoring and detection automatically that to casing model, the hard disk of tested motherboard its test result can be controlled and need not artificial observation directly by directly showing on the display screen respectively.
The invention has the advantages that the function to the motherboard tested has one more comprehensively to detect, promoted the yield of product motherboard, and the realization of this test function all finishes automatically by circuit, saved manpower, improved work efficiency.
[description of drawings]
The present invention is further illustrated in conjunction with the embodiments with reference to the accompanying drawings.
Fig. 1 is the test synoptic diagram of motherboard functional test plate of the present invention.
Fig. 2 is the structural representation of motherboard functional test plate of the present invention.
Fig. 3 (A) is the test signal modular converter of motherboard functional test plate of the present invention.
Fig. 3 (B) is another embodiment of the test signal modular converter of motherboard functional test plate of the present invention.
Fig. 4 is the VGA﹠amp of motherboard functional test plate of the present invention; AGP change-over circuit figure.
Fig. 5 is the Front Panel test philosophy figure of motherboard functional test plate of the present invention.
Fig. 6 is the Audio test circuit figure of motherboard functional test plate of the present invention.
Fig. 7 is the battery test circuit figure of motherboard functional test plate of the present invention.
[embodiment]
Please refer to Fig. 1, this motherboard functional test plate 10 carries out the test of various functions by 12 pairs one motherboards 14 to be tested of a probe stationary plate.In test, at first motherboard 14 to be tested is placed on this probe stationary plate 12, by the probe on this probe stationary plate 12 (figure indicate) with the signal converting on the motherboard 14 to be tested to this motherboard functional test plate 10, the another side of this motherboard functional test plate 10 connects some measurement jigs 16, this measurement jig 16 is some instrument that show test modes and result, display screen etc., can analyze and processing such as demonstration the signal that be come by these motherboard functional test plate 10 switchings.
Please continue with reference to Fig. 2, this motherboard functional test plate 10 comprises a VGA﹠amp; AGP change-over circuit 20, an Audio test circuit 30, a battery test circuit 40, a Serial Port test loop 50, a Front Panel test circuit 60, a test signal modular converter 70, a PCI, IDE1, SATA, Floppy, a USB converting interface 80 and a network interface card test loop 90.Wherein, this Serial Port test loop 50, PCI, IDE1, SATA, Floppy, the performances such as main plug receptacle of USB converting interface 80 and 90 pairs of motherboards of network interface card test loop are tested.Signals output that this IDE2 interface 72 is responsible for being transferred on this motherboard functional test plate 10 from motherboard to be tested, and be converted to I/O control signal 724 by this CPLD CPLD is converted to the I/O control signal, output to this VGA﹠amp; AGP change-over circuit 20, this Audio test circuit 30, this battery test circuit 40 and this Front Panel test loop 60 are as the system testing signal.
Please refer to Fig. 3 (A), this test signal modular converter 70 will be converted into the convenient I/O control signal of handling of test macro by the motherboard signal to be tested that switching on this motherboard functional test plate comes.This test signal modular converter 70 comprises a control chip 725, one input end of this control chip 725 is connected on this IDE2 interface 70, reception is from the test signal of this motherboard to be tested, this control chip 725 is converted to the I/O control signal that the test test macro is convenient to compatibility and processing with this test signal by CPLD, simultaneously, another input end of this control chip 725 receives a device signal 722, this device signal 722 can be monitored the state of the signal of these control chip 725 outputs, the I/O control signal of guaranteeing these control chip 725 outputs is in correct state, thereby guarantees carrying out smoothly of whole testing process.Certainly, the function switching signal of this module also can be realized by alternate manner, in every case the module that test macro is easy to the compatible control signal of accepting can be and be converted to signal-under-test output and all this operation can be realized, shown in Fig. 3 (B), survey signal conversion module 70 ', this test signal modular converter 70 ' is by the control chip 725 ' of the printer interface 72 ' on this motherboard to be tested with signal output to be tested, simultaneously, another input end of this control chip 725 ' also connects a device signal 722 ', this device signal 722 ' is whether be used for monitoring accurate by the state of the signal of this control chip 725 ' output, thereby guarantees carrying out smoothly of whole testing process.Content hereinafter described of the present invention serves as the module that realizes the test signal translation function with Fig. 3 (A) test signal modular converter 70 only.
Please continue with reference to Fig. 4 this VGA﹠amp; AGP change-over circuit 20 comprises that an AGP shows that 100, one triggers AGP_RST (Reset resets) signal 120, a signal automatic switch-over circuit 140, a control circuit 160, a CPLD Out5 control signal 170 and VGA demonstration 180.This circuit is the right of priority problem that is shown by 120 decisions of this AGP_RST signal, if when this AGP_RST signal 120 be high level, this AGP shows 100 activation, if when this AGP_RST signal 120 is low level, this VGA shows that 180 is effective.It is high level that this circuit is connected back this AGP_RST signal 120 of acquiescence, promptly connects this AGP earlier and shows 100, if be integrated with video card on the motherboard to be measured, forbids that then this AGP shows 100, and this AGP_RST signal 120 changes low level into; If integrated graphics card not on the motherboard to be measured, the AGP slot of then carrying out earlier grafting AGP video card (figure does not show) is tested, finish after the test, this triggering AGP_RST signal 120 becomes low level, this AGP shows that 100 are under an embargo, simultaneously, this CPLD Out5 control signal 170 of changing via this test signal modular converter 70 is transported in this control circuit 160, activate this control circuit 160, and the detecting information that CPLD Out5 is entrained exports this signal automatic switch-over circuit 140 to, activates switching flow, finishes by AGP and is shown to the switching that VGA shows, this VGA shows that 180 is effective, and system shows that to this VGA 180 test.
Please jointly with reference to Fig. 5, this Front Panel test circuit can be finished the test to Chassis ID (cabinet kind), HDD LED (hard disk demonstration) and Power LED (power supply demonstration).This circuit is to be connected respectively to a Chassis ID 610 by a FrontPanel equipment 600, on one a HDD LCD 620 and the PowerLED 640, this Chassis ID610 is responsible for gathering the model of tested motherboard, export a control circuit 611 then to, this control circuit 611 is effectively write I/O control mouth 613 by a low level and is activated, this port input information of writing I/O control mouth 613 is from this test signal modular converter 70, its output terminal and one is read motherboard register 615 and is connected, in this cabinet model of reading the motherboard model parameter in the motherboard register 615 and matching, on display screen, demonstrate chassis types by reading pre-stored with this tested motherboard coupling.This HDD LED 620 is activated by an IDE1 HDD LED control signal 623 controls, system is delivered to this IDE1 HDD LED control signal 623 after effectively writing I/O control mouthful 621 signal feedings, one input value by 70 pairs of these low levels of this test signal modular converter.This IDE1HDD LED control signal 623 receives this write I/O control mouthful 621 signals after, activating HDD LED signal 620 shows, then output in the control circuit 625 by HDD LED signal 620, after these control circuit 625 test comparison processing, be sent to a level circuit for detecting 627 again, this level circuit for detecting 627 is that low level is effective, when promptly if test result is low level, show that then this HDD LED 620 shows normal, when if test result is high level, then show this HDD LED 620 display abnormalities, have fault, need further to detect and get rid of this fault.This Power LED 640 writes motherboard register 641 by one and triggers the activation.When this step is carried out in detection, system provides this by this test signal test module 70 and writes motherboard register 641 Test input signals, after this input signal is sent to PowerLED 640, after 643 processing of control comparator circuit, comparative result is delivered in the level circuit for detecting 645, and this level circuit for detecting 645 also is that low level is effective.
Please refer to Fig. 6, the input end of this Audio test circuit comprises a CPLD Out0 signal 300, a CPLD Out1 signal 330 and one tested motherboard source of sound 320, and this CPLD Out0 signal 300 and this CPLD Out1 signal 330 all come from this test signal modular converter 70.When CPLD Out0 signal 300 is low level, it can constitute Line Out (input)/HP (Headphone earphone)-Line In (output) loop 340 with tested motherboard source of sound 320, and tested motherboard source of sound 320 is carried out the test of earpiece audio I/O quality aspect; When CPLD Out0 signal 300 was high level, it can constitute a MIC (Microphone loudspeaker)-Line In loop 350 with tested motherboard source of sound 320, and loudspeaker input quality is tested.No matter this CPLD Out0 signal 300 is low level or high level, as long as this CPLD Out2 signal 330 is when being in low level, system will this CPLDOut2 signal 330 of priority processing.When this CPLD Out2 signal 330 is low level, it will constitute a CD (Compact Disk CD) _ In-Speaker loop 360 with this tested motherboard audio frequency 320.When system begins to test, these CPLD Out2 signal 330 original states are high level, system at first is set to low level with this CPLD Out0 signal 300, make the tested motherboard source of sound 320 of itself and this constitute Line Out/HP-LineIn loop 340, system acquisition is tested required parameters then, outputs to a test loop 380 by this Line Out/HP-LineIn loop 340 and carries out functional test.Then, system changes to high level with the setting of this CPLD Out0 signal 300, make the tested motherboard source of sound 320 of itself and this constitute this MIC-LineIn loop 350, system also tests collection required parameters subsequently, outputs to this test loop 380 by this MIC-Line In loop 350 and carries out functional test.After CPLD Out0 signal 300 handled, system is low with the level of this CPLD Out2 signal 330 by high-transformation, shield this CPLDOut0 signal 300, thereby make the tested motherboard source of sound 320 of itself and this constitute this CD_In-Speaker loop 360, its output terminal also is connected to this test loop 380 and carries out functional test.
Please refer to Fig. 7, this battery test circuit filters out the defective products that magnitude of voltage is lower than standard value according to tested motherboard battery and systemic presupposition standard value are compared, and reaches the purpose of test.This battery test circuit mainly comprises a battery standard duty control circuit 400, one tested motherboard battery 410, one CPLDOutput1 (output) control signal 430, one control circuit 450, one standard value and actual value comparator circuit 470 and CPLD Input (input) circuit for detecting 490, during test, the output terminal of this tested motherboard battery 410 is connected in this control circuit 450, this CPLD Output1 control signal 430 comes from this test signal modular converter 70, its activation signal as this control circuit 450 is just effective at low level state, the value of this tested motherboard battery 410 that will gather after this control circuit 450 activates is delivered to this standard value and actual value comparator circuit 470, simultaneously, this standard value and actual value comparator circuit 470 also will be from these battery standard duty control circuit 400 acceptance criteria magnitudes of voltage, then standard value and actual value are delivered in this CPLD Input circuit for detecting 490 after relatively, if this fiducial value is a low level, the ecbatic of this CPLDInput circuit for detecting 490 will be shown as " Pass " (by), if this fiducial value is a high level, the ecbatic of this CPLD Input circuit for detecting 490 will be shown as " Fail " (not passing through).

Claims (8)

1. motherboard functional test plate, comprise a test signal modular converter and an Audio test circuit, it is characterized in that: described test signal modular converter becomes control signal with the conversion of signals of motherboard to be tested, comprise a CPLD Out0 signal and a CPLD Out2 signal, described Audio test circuit is by the level state of this CPLD Out0 signal of control and this CPLD Out2 signal, form a Line Out/HP-Line In loop with tested motherboard source of sound respectively, the full test to the motherboard sounding circuit is realized in one a MIC-Line In loop and a CD_In-Speaker loop.
2. motherboard functional test plate as claimed in claim 1 is characterized in that: described test signal modular converter comprises a test signal output port, a control chip, a device signal and an I/O control signal.
3. motherboard functional test plate as claimed in claim 1, it is characterized in that: described test signal output port is used for exporting the test signal of motherboard to be tested, and it is outputed to described control chip.
4. motherboard functional test plate as claimed in claim 1 is characterized in that: whether the I/O control signal that described device signal is used for monitoring by described control chip output is in correct state.
5. motherboard functional test plate as claimed in claim 1, it is characterized in that: the start right of priority of CPLD Out2 signal described in the described Audio test circuit is higher than described CPLD Out0 signal, and described CPLD Out2 signal effectively, is under an embargo under the high level state under low level state.
6. motherboard functional test plate as claimed in claim 1 is characterized in that: when described CPLD Out0 signal is low level, form described Line Out/HP-Line In loop with tested motherboard source of sound.
7. motherboard functional test plate as claimed in claim 1 is characterized in that: when described CPLD Out0 signal is high level, form described MIC-Line In loop with tested motherboard source of sound.
8. motherboard functional test plate as claimed in claim 1 is characterized in that: when described CPLD Out2 signal is low level, form described CD_In-Speaker loop with tested motherboard source of sound.
CNB2004100265390A 2004-03-13 2004-03-13 Motherboard function test board Expired - Fee Related CN100395718C (en)

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Application Number Priority Date Filing Date Title
CNB2004100265390A CN100395718C (en) 2004-03-13 2004-03-13 Motherboard function test board

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Application Number Priority Date Filing Date Title
CNB2004100265390A CN100395718C (en) 2004-03-13 2004-03-13 Motherboard function test board

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CN100395718C CN100395718C (en) 2008-06-18

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103019896A (en) * 2011-09-21 2013-04-03 鸿富锦精密工业(深圳)有限公司 Test card
CN103019896B (en) * 2011-09-21 2016-11-30 重庆界威模具股份有限公司 Test card

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE29920933U1 (en) * 1999-11-29 2000-01-13 Leu Sophie Diagnostic device for a computer system
TW518701B (en) * 2000-04-19 2003-01-21 Samsung Electronics Co Ltd Interface board and method for testing semiconductor integrated circuit device by using the interface board
CN1189757C (en) * 2001-01-15 2005-02-16 华硕电脑股份有限公司 Automatic tester and its method for motherboard
CN2510902Y (en) * 2001-06-04 2002-09-11 刘宗明 Computer main board failure diagnosis card
JP3790175B2 (en) * 2002-03-01 2006-06-28 株式会社アドバンテスト Device with substrate abnormality detection circuit
TW559672B (en) * 2002-07-24 2003-11-01 Via Tech Inc Testing method of chip configuration setup
CN2560989Y (en) * 2002-08-14 2003-07-16 技嘉科技股份有限公司 Master board testing tool

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103019896A (en) * 2011-09-21 2013-04-03 鸿富锦精密工业(深圳)有限公司 Test card
CN103019896B (en) * 2011-09-21 2016-11-30 重庆界威模具股份有限公司 Test card

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Granted publication date: 20080618