CN1468045A - Structure of printed circuit board - Google Patents
Structure of printed circuit board Download PDFInfo
- Publication number
- CN1468045A CN1468045A CNA021411964A CN02141196A CN1468045A CN 1468045 A CN1468045 A CN 1468045A CN A021411964 A CNA021411964 A CN A021411964A CN 02141196 A CN02141196 A CN 02141196A CN 1468045 A CN1468045 A CN 1468045A
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- circuit board
- printed circuit
- circuit layout
- section
- pcb
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Abstract
The invention discloses a printed circuit board arrangement comprising, a substrate, on which a plurality of plating perforations are arranged, a circuit layout, arranged on the substrate and composed of a plurality of metal wires, the circuit layout contains a plurality of first sections and a plurality of second sections, wherein the first sections can make the current flow to circulate, on which at least one plating section is arranged, and a welder-proof layer arranged on the substrate, the welder-proof layer covers the circuit layout and contains at least one millipore, arranged on the position corresponding to the second section of the circuit layout.
Description
Technical field
The present invention is relevant with electronic industry, particularly about the electric structure of a kind of printed circuit board (PCB) (PCB).
Background technology
In the manufacturing process of existing printed circuit board (PCB) 80, see also Fig. 1, a prefabricated substrate (substrate) 81 has a circuit layout (conductor pattern) 82 and a plurality of electroplating ventilating hole (PTH) 822 on it at first earlier.This circuit layout 82 is made of a plurality of copper conductor 821.Has a remittance electric lead (bustrace) 83 on this substrate 81, to connect respectively this copper conductor 821.After finishing preset program, can converge electric lead 83 energising at this, to electroplate conductive layer 84 (being that industry is practised the golden finger (golden finger) that claims) in the precalculated position of this copper conductor 821 respectively.After finishing the program of electroplating conductive layer 84, this remittance electric lead 83 can be removed, and this printed circuit board (PCB) 80 promptly forms kenel as shown in Figure 2.
By can being well understood to very much among the figure, this substrate 81 must keep predetermined space at two copper conductor 821a between the 821b, allows invalid section 821c of other copper conductors, 821d, and 821f passes through.The so-called invalid section section for these copper conductors 821 and this remittance electric lead 83 are connected is to electroplate these conductive layers 84.But when these circuit layout 82 runnings, these invalid section does not have electric current to flow through.In other words, have many inactive area on this substrate 81, and these inactive area are unescapable.Therefore, this substrate 81 can't effectively dwindle.
Summary of the invention
Main goal of the invention of the present invention is to provide the structure of printed circuit board (PCB), and the idle space that it can reduce on this printed circuit board (PCB) makes the size of this printed circuit board (PCB) dwindle.
Be the goal of the invention of taking off before reaching, the structure of printed circuit board (PCB) provided by the present invention includes: a substrate; One circuit layout is arranged at this substrate, is made of a plurality of plain conductor; This circuit layout includes at least one first section and at least one second section, wherein this first section can be powered and be flowed circulation, has at least one plated portions on it, and respectively be respectively equipped with a conductive layer on this plated portions, respectively this second section can electrically conduct at least one aforesaid plated portions, and a welding resisting layer, be arranged on this substrate, this welding resisting layer covers this circuit layout, but is opened in the position corresponding to these plated portions, so that this conductive layer exposes; This welding resisting layer has at least one micropore, is positioned at the position corresponding to second section of this circuit layout.
Wherein this substrate has at least one plating perforation, and the micropore of this welding resisting layer is the next door that is positioned at this plating perforation.
Wherein this conductive layer is provided with a weld pad, and the micropore of this welding resisting layer is the next door that is positioned at this weld pad.
Wherein the micropore of this welding resisting layer is to be positioned at the plain conductor of this circuit layout near terminal part.
Wherein the micropore of this welding resisting layer is the next door that is positioned at this conductive layer.
Wherein the part of this second section below this micropore is removed.
Description of drawings
Below in conjunction with a preferred embodiment, conjunction with figs., the present invention is further illustrated, wherein:
Fig. 1 is tradition is provided with remittance electrolytic copper lead on printed circuit board (PCB) a schematic diagram;
Fig. 2 is the schematic diagram after this remittance electrolytic copper lead is removed among Fig. 1;
Fig. 3 is the schematic appearance of a preferred embodiment of the present invention;
Fig. 4 is the cutaway view of preferred embodiment of the present invention;
Fig. 5 is the schematic diagram for a copper conductor, shows that micropore is positioned at one and electroplates the next door of boring a hole;
Fig. 6 is the schematic diagram for a copper conductor, shows that micropore is positioned at the next door of a weld pad;
Fig. 7 is the flow chart for the printed circuit board (PCB) of making the embodiment of the invention, and
Fig. 8 is the schematic appearance for the printed circuit board (PCB) of another kind of preferred embodiment of the present invention.
Embodiment
See also Fig. 3 and shown in Figure 4, the structure of the printed circuit board (PCB) that a preferred embodiment of the present invention provided includes:
One substrate 10, it is made with multi-functional epoxy resin (multi-function epoxy resin), has one first side 101 and one second side 102.This substrate 10 is provided with a predetermined number perforation 11, is through to this second side 102 by this first side 101.
One circuit layout 20 is made of a plurality of copper conductor 21, is arranged on first side 101 and this second side 102 of this substrate 10.In these perforation 11, also there is copper conductor to connect the circuit layout 20 of this first side 101 and this second side 102, these perforation 11 formed electroplate perforation.Respectively this copper conductor 21 is closer to each other as much as possible, makes this substrate 10 can have less size.
See also Fig. 5, this circuit layout 20 has first section 211 and second section 212.
These first sections 211 are for having the copper conductor that electric current flows through in this circuit layout 20, therefore, all are first sections 211 that are arranged in this circuit layout 20 such as electroplating perforation 11 and weld pad 12 etc.These first sections have a plurality of plated portions 213, are provided with thereon for conductive layer 22.This conductive layer 22 is the golden finger (goldenfinger) of industry common name, is nickel-gold alloy layer.These conductive layers 22 are for routing (wirebonding) on practice, weld pad are set or are electrically connected to the usefulness in another loop etc.
These second sections 212 are to be a bit of copper conductor at these first section, 211 tail ends, and it can electrically conduct with these plated portions 213 via this first section 211.These second sections 212 do not have electric current to flow through when these circuit layout 20 runnings, and in other words, these second sections 212 are the invalid section of this circuit layout 20.These second sections 212 can be positioned at the next door (as shown in Figure 5) of this plating perforation 11, or are positioned at the next door (as shown in Figure 6) of this weld pad 12, or are positioned at the next door of this conductive layer 22, also can be the section that any electric current portion is flow through in this circuit layout 20.
One welding resisting layer 30 sees also Fig. 4, is arranged at first side 101 and second side 102 of this substrate 10, and fills up these electroplating ventilating holes 11.In the present embodiment, this welding resisting layer 30 can schedule to last constituent material by multi-functional epoxy resin.This welding resisting layer 30 covers this circuit layout 20, but is opened in the position corresponding to these conductive layers 22, so that these conductive layers 22 exposures, for the usefulness of aforesaid routing, weld pad etc.This welding resisting layer 30 has micropore 34 in the position corresponding to these second sections 212, and second section 212 of these micropore 34 bottoms also is removed.
See also Fig. 7, below we disclose the fabrication schedule of a printed circuit board (PCB), why have the printed circuit board arrangement of these micropores 34 on this welding resisting layer 30 with explanation, and the size of its substrate 10 can be dwindled.
See also Fig. 7 A, at first our prefabricated this substrate 10 has this circuit layout 20 on it.
Then, see also Fig. 7 B, this welding resisting layer 30 is set on this substrate 10, to cover this circuit layout 20, and with this welding resisting layer 30 in plated portions 213 corresponding to this circuit layout 20, and the part of these micropores 34 removes, and makes the plated portions 213 and second section 212 of first section 211 of this circuit layout 20 expose.
The 3rd, see also Fig. 7 C, a conductive layer 50 is set on this welding resisting layer 30, make this conductive layer 50 electrically conduct via the plated portions 213 of these second sections 212 with these first sections 211.
The 4th, see also Fig. 7 D, second welding resisting layer 60 is set on this conductive layer 50, and the predetermined position of this second welding resisting layer 60 is opened, expose with the plated portions 213 that makes this circuit layout 20.
The 5th, see also Fig. 7 E, energising power is to this conductive layer 50, to electroplate these conductive layers 22 on the plated portions 213 of this circuit layout 20.
At last, see also Fig. 7 F, etch away remaining this second welding resisting layer 60 and this conductive layer 50.When carry out this step, second section 22 of this circuit layout 20 also together is removed via these micropore 34 exposed portions.
By the manufacture method of preceding taking off as can be known, it can need not electroplate conductive layer in the precalculated position of circuit layout under the situation that remittance electrolytic copper lead is set on the substrate.So, took off in the past on the printed circuit board (PCB) of method made, need not be invalid section headspace of this circuit layout, in other words,, asked comparison diagram 2 and Fig. 4, can reach the effect of minification with the printed circuit board (PCB) of this method made.Obvious characteristics is and have very on the printed circuit board (PCB) with the preceding method made, has micropore 34 on this welding resisting layer 30, is positioned at second section 212 corresponding to this circuit layout 20.
Fig. 8 is the outside drawing for another kind printed circuit board (PCB) provided by the present invention, and itself and aforesaid difference are that this circuit layout 20 has a plurality of conducting parts 214, in order to a plurality of plated portions 213 that electrically conduct.Thus, on copper conductor, only need one or two second sections 212, can reach the purpose of on these plated portions 213, electroplating these conductive layers 22 via these conducting part 214 conductings.And these conducting parts 214 can be removed after finishing these conductive layers of plating.Therefore, ask comparison diagram 3 with shown in Figure 8, printed circuit board (PCB) provided by the present invention, this welding resisting layer 30 are not to occupy to have micropore 34 on each copper conductor 21.
Claims (6)
1. the structure of a printed circuit board (PCB) is characterized in that, includes:
One substrate;
One circuit layout is arranged at this substrate, is made of a plurality of plain conductor; This circuit layout includes at least one first section and at least one second section, wherein this first section can be powered and be circulated, and has at least one plated portions on it, and respectively is respectively equipped with a conductive layer on this plated portions, respectively this second section can electrically conduct at least one aforesaid plated portions, and
One welding resisting layer is arranged on this substrate, and this welding resisting layer covers this circuit layout, but is opened in the position corresponding to these plated portions, so that this conductive layer exposes;
This welding resisting layer has at least one micropore, is positioned at the position corresponding to second section of this circuit layout.
2. according to the structure of the described printed circuit board (PCB) of claim 1, it is characterized in that wherein this substrate has at least one plating perforation, and the micropore of this welding resisting layer is the next door that is positioned at this plating perforation.
3. according to the structure of the described printed circuit board (PCB) of claim 1, it is characterized in that wherein this conductive layer is provided with a weld pad, and the micropore of this welding resisting layer is the next door that is positioned at this weld pad.
4. according to the structure of the described printed circuit board (PCB) of claim 1, it is characterized in that wherein the micropore of this welding resisting layer is to be positioned at the plain conductor of this circuit layout near terminal part.
5. according to the structure of the described printed circuit board (PCB) of claim 1, it is characterized in that wherein the micropore of this welding resisting layer is the next door that is positioned at this conductive layer.
6. according to the structure of the described printed circuit board (PCB) of claim 1, it is characterized in that wherein the part of this second section below this micropore is removed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA021411964A CN1468045A (en) | 2002-07-08 | 2002-07-08 | Structure of printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA021411964A CN1468045A (en) | 2002-07-08 | 2002-07-08 | Structure of printed circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1468045A true CN1468045A (en) | 2004-01-14 |
Family
ID=34147741
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA021411964A Pending CN1468045A (en) | 2002-07-08 | 2002-07-08 | Structure of printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1468045A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101835351A (en) * | 2010-04-08 | 2010-09-15 | 梅州市志浩电子科技有限公司 | Manufacture process of sectional golden finger |
| CN101930966B (en) * | 2009-06-24 | 2014-07-02 | 联华电子股份有限公司 | Circuit layout structure and method for narrowing integrated circuit layout |
| CN103929900A (en) * | 2014-03-31 | 2014-07-16 | 深圳崇达多层线路板有限公司 | Manufacturing method for disconnected golden finger |
| CN108235598A (en) * | 2017-12-13 | 2018-06-29 | 深南电路股份有限公司 | A kind of special gold plated pads manufacturing method |
-
2002
- 2002-07-08 CN CNA021411964A patent/CN1468045A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101930966B (en) * | 2009-06-24 | 2014-07-02 | 联华电子股份有限公司 | Circuit layout structure and method for narrowing integrated circuit layout |
| CN101835351A (en) * | 2010-04-08 | 2010-09-15 | 梅州市志浩电子科技有限公司 | Manufacture process of sectional golden finger |
| CN101835351B (en) * | 2010-04-08 | 2012-09-05 | 梅州市志浩电子科技有限公司 | Manufacture process of sectional golden finger |
| CN103929900A (en) * | 2014-03-31 | 2014-07-16 | 深圳崇达多层线路板有限公司 | Manufacturing method for disconnected golden finger |
| CN108235598A (en) * | 2017-12-13 | 2018-06-29 | 深南电路股份有限公司 | A kind of special gold plated pads manufacturing method |
| CN108235598B (en) * | 2017-12-13 | 2019-10-18 | 深南电路股份有限公司 | A kind of special gold plated pads manufacturing method |
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| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |