CN1409502A - Method for detecting production line of communication product single board with CPU - Google Patents
Method for detecting production line of communication product single board with CPU Download PDFInfo
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- CN1409502A CN1409502A CN01126907A CN01126907A CN1409502A CN 1409502 A CN1409502 A CN 1409502A CN 01126907 A CN01126907 A CN 01126907A CN 01126907 A CN01126907 A CN 01126907A CN 1409502 A CN1409502 A CN 1409502A
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Abstract
This invention puts forward a testing method for single-board production line of communication products with central processor containing connecting the tested single-board with the testing host machine with serial lines in simple serial interface arrangement, and the single board autoamtically carries out the test code after being turned-on. Test persons can carry out the related test content by serial interface input order and put forward a compiling method for the single-board testing software which directly directs the hardware test quickly positions its mistake.
Description
Technical field:
The present invention relates to the single-board testing method of communication field band central processing unit, be specifically related to a kind of be used to the simple and easy method with the detecting production line of communication product single board of central processing unit.
Background technology:
Because the develop rapidly of the communication technology, and the extensive use of large scale integrated circuit, so that the integrated level of communication product equipment and reliability all greatly improve. Large and medium-sized communication apparatus all is made of the polylith hardware single board, and every veneer is finished corresponding function, by cooperation each other, has jointly finished the communication function of integral device. So the quality that veneer is produced has directly affected the reliability of integral device. Although the veneer that the production line modulation is produced can pass through the hardware testing method, the preliminary product quality that guarantees it, but there are a lot of content measurement indexs only to rely on hardware testing not finish, could find out whether conforming to quality requirements of it after only having upper system operating software.
Yet being applied to now the method for production line test, all is self-designed by designer separately, mostly need to be connected with netting twine between side veneer and the Test Host, after carrying out complicated communication and being configured to, downloads test program, debugs. The debugging interface is by the hobby design of designer according to oneself, and operational order is also determined by designer oneself. The disadvantage of making like this is that the method for testing of various communication veneers is determined by designer oneself fully, the scheme and the design criteria that do not have standard, so that difference is larger on the test operation of various veneers, testing procedure is also very complicated, is unfavorable for that the workman grasps and use on the production line. So need a kind of general simple method for testing bacterial resistance, be used for instructing the test job of veneer. For above present situation, this patent provides the communication veneers method of testing of this simple and efficient.
Summary of the invention:
Technical problem to be solved by this invention is, a kind of method of the detecting production line of communication product single board with central processing unit is proposed, only need the succinct test environment of configuration, use simple serial communication, just can test, and for this testing scheme, a kind of write method of single-board testing software is proposed. Use the testing software that the method is write, directly for the quality of hardware test, can position hardware error rapidly, be convenient to the product line worker and in time find mistake, debug, the production efficiency of raising veneer.
The below introduces the simple and easy method that is used for detecting production line of communication product single board that this patent is set forth in detail, needs a bench teat to test computer, and the specific implementation step is as follows:
Step 1: on the Software Development Platform of embedded real time system, start the project file that is used for this test;
Step 2: the binary system test code that will generate after will starting writes in the flash memory of institute's survey veneer;
Step 3: Target Board and test PC main frame are coupled together with the Serial Port Line distich, open the test PC
The hyper terminal application program, carry out corresponding configuration;
Step 4: after Board Power up starts successfully, automatically begin the test target plate;
Step 5: input the numbering of required test event, test accordingly;
Step 6: the report of output single-board testing, if find fault, then export the information such as abort situation.
The required content measurement that carries out of input further comprises in the described step 5: CPU is started carry out self check, whether serial ports, network interface work be normal; Testing memory, test address bus, data/address bus, test data looping back data passage etc.; Each chip functions in test communication interface module, the data processing module, the communication interface between the test power board.
Adopt the simple and easy method that is used for detecting production line of communication product single board of the described elaboration of this patent, only need between tested single board and Test Host, to connect with Serial Port Line, carry out simple serial ports configuration and get final product. After the Board Power up, automatically perform test code. The tester can input instruction by serial ports, carries out corresponding content measurement. This patent has been obtained good result in the comprehensive access server of this project. So that the testing process of veneer standardization on the production line is simple and practical, removed the complex configurations between Test Host and the tested single board from, be convenient to the product line worker and grasp and operate.
Description of drawings:
Also by reference to the accompanying drawings the present invention is described in further detail below by specific embodiment.
-Fig. 1 is method flow diagram of the present invention;
Fig. 2 is the method implementation figure of combined with hardware of the present invention.
The specific embodiment:
Fig. 1 is method flow diagram of the present invention.
But at first create the project file that is used for this test of a self-starting, after Board Power up starts like this, automatically perform this test program;
Then this project is compiled, and it is write in the flash memory of institute's survey veneer;
Then tested single board and the Serial Port Line of test PC main frame machine with distich are coupled together, the display of PC is as display terminal, and keyboard is opened the hyper terminal application program of PC as input terminal, and it is suitably disposed;
Power on for tested single board subsequently. After tested single board starts successfully, automatically move test program; Screen output test program interface shows user's input prompt symbol;
Input required test event numbering by the user again, the program operation demonstrates print result;
End user knows according to the test result information of screen display whether this single-board testing is successful. If failure according to error message, obtains the reason of test crash, and solution, hardware is checked debug.
Fig. 2 is the method implementation figure of combined with hardware of the present invention.
The below introduces concrete examples of implementation that adopt this patent, carries out the test of the production line veneer of access server power board. The content of power board production line test:
This power board is following module composition: CPU control and management module, communication interface module, data processing module, power supply and power management module, clock generating and driver module. Wherein, CPU control and management module, communication interface module, data processing module are the cores of realizing the power board function, thus test job mainly for these several parts, content comprises:
(1) debugging power board power-on self-test, after powering on, power board CPU starts and carries out self check, and serial ports, network interface are working properly, by serial ports, output print information.
(2) scratchpad register.
(3) testing memory.
(4) test address bus, data/address bus.
(5) test data looping back data passage.
(6) each chip functions in test communication interface module, the data processing module.
(7) communication interface between the test power board. The design of power board production line testing software:
This method of testing needs the designer to work out testing software for this veneer, generates corresponding user interface, for the tester. In order to make the described method of testing of this patent reach effective, simple, practical standard, the design of power board testing software is as follows: create project file:
But in Tornado software, create the project file (creat a custom configured, bootable project) that is used for this test of a self-starting, in the usrAppInit.c file, write following test program. Register testing
All registers in the chip are tested one by one, for the readable register of writing, write various data, then read and compare, also provide the selection of only testing with typical several data for fast detecting simultaneously, as.
1 toward the interior data writing of register, sense data from register, and relatively whether readout and the value of writing are seen consistent. If inconsistent, then explanation makes mistakes. Change data writing value loop test, until all possible data are all tested.
2 toward the interior data writing of register, and this data value is 0x55555555 (concrete numerical value figure place is determined by register); Sense data from register, relatively whether readout and the value of writing are seen consistent. If inconsistent, then explanation makes mistakes.
3 toward the interior data writing of register, and this data value is 0xaaaaaaaa (concrete numerical value figure place is determined by register); Sense data from register, relatively whether readout and the value of writing are seen consistent. If inconsistent, then explanation makes mistakes.
After 4 register testings are finished, in each register, write corresponding initial value, be in original state to guarantee register. Memory test (for the readable memory of writing)
Need to test all memory address spaces when memory is carried out full test, and each register need to be tested with all possible data. Namely wherein write respectively the data of all obstacles toward all storages, read-around ratio if read and the data consistent that writes, is then passed through, if having inconsistent then be the memory test failure.
Large when the memory address space, when data bits is larger test quite consuming time, therefore, provide the function of fast detecting, can choose respectively typical data or typical address is tested.
(1) memory test doubles as the data wire test
1 toward the interior data writing of memory (when doubling as the data wire test, choosing the memory of some typical addresses), and whether this data value is relatively readout and value of writing of 0x00000000 (concrete numerical value figure place is determined by memory), see consistent. If inconsistent, then explanation makes mistakes.
2 toward the interior data writing of memory, and this data value is 0xffffffff (concrete numerical value figure place is determined by memory); Sense data from memory, relatively whether readout and the value of writing are seen consistent. If inconsistent, then explanation makes mistakes.
3 toward the interior data writing of memory, and this data value is 0x00000001 (concrete numerical value figure place is determined by memory); Sense data from memory, relatively whether readout and the value of writing are seen consistent. If inconsistent, then explanation makes mistakes. Then remaking data is 0x00000002,0x00000004,----------, the test of 0x80000000, it is 1 that a data line is namely only arranged, and all the other are 0, and data wire gets respectively 1 successively from the lowest order to the highest order.
4 toward the interior data writing of memory, and this data value is 0xfffffffe (concrete numerical value figure place is determined by memory); Sense data from memory, relatively whether readout and the value of writing are seen consistent. If inconsistent, then explanation makes mistakes. Then remaking data is 0xfffffffd, 0xfffffffb,----------, the test of 0xefffffff, it is 0 that a data line is namely only arranged, and all the other are 1, and data wire gets respectively 0 successively from the lowest order to the highest order. 5 toward the interior data writing of memory, and this data value is 0x55555555 (concrete numerical value figure place is determined by memory); Sense data from memory, relatively whether readout and the value of writing are seen consistent. If inconsistent, then explanation makes mistakes.
6 toward the interior data writing of memory, and this data value is 0xaaaaaaaa (concrete numerical value figure place is determined by memory); Sense data from memory, relatively whether readout and the value of writing are seen consistent. If inconsistent, then explanation makes mistakes.
(2) double as the address wire test as memory test
1 in the memory data writing, the address is from the minimum of a value of memory to maximum, data value be this address value (specifically the numerical value figure place is determined by memory); Sense data from memory, relatively whether readout and the value of writing are seen consistent. If inconsistent, then explanation makes mistakes.
2 for improving testing efficiency, and quick test function is provided, every all selected or not choosing of address wire, as test in the corresponding effective range address wire entirely be 0, entirely be 1, only 1 be 1, all the other are 0 address, and only 1 be 0, all the other are 1 address entirely. Address such as the test of 16 bit address space is 0,000 0,000 0000 0000b, 0,000 0,000 0000 0001b, 0,000 0,000 0000 0010b, 0,000 0,000 0000 0100b, 1,000 0,000 0000 0000b, 1,111 1,111 1,111 1111 1111b, 1,111 1,111 1111 1110b, 1,111 1,111 1111 1101b ... 0,111 1,111 1111 1111b. Loopback test, data link test
This test is exactly the correctness of testing transfer of data on all or the typical data link, the test loop fuction.
1) for internal loopback: port is carried out the internal loopback setting, and CPU sends data, and more whether CPU receive data behind the port loopback is consistent. Data are 0x55555555,0xaaaaaaaa (concrete numerical value figure place is determined by data wire).
2) for external loop (need to by analyzer): port is carried out the external loop setting, and more whether analyzer sends data, through port loopback post analysis instrument receive data, consistent. Data are 0x55555555,0xaaaaaaaa (concrete numerical value figure place is determined by data wire). The communication interface of test power board and outside veneer
1) move instruction on the power board instruction path can normally be accepted and be sent each other.
2) transmit data in the power board data channel, whether the data that transmit leg sends are 0x55555555 (concrete numerical value figure place is determined by data wire), accept this data at reciever, see consistent. Then remaking data is 0xaaaaaaaa, 0xfffffffe, and 0xfffffffd, 0xfffffffb,----------, the easy test command of the test of 0xefffffff
This test provides a simple test interface for the user, is convenient to user's operation. Offer simultaneously some simple test commands of user. As shown in the table:
| Test command | Describe |
| help | Show help menu: show all test commands that this testing software provides, and order |
| Form. | |
| ver | Show the testing software version: because this testing software may upgrade and improve to some extent, each version may some difference. |
| test<#> | Specify numbering＜#〉test: in this patent, we are every content measurement label, such as the test of chip version (10), register testing (20), memory test (30) etc. The user can directly input this order like this, carries out the operation of appointment, and needn't go to do other tests again. Can reduce so the used time of test, to the individual event test of great use. If not nominative testing label only so then represents to carry out all tests with test. |
| set<mode><value> | Mode=(step); Fast test pattern setting of value=(1,0): set step 1 is set to quick test pattern; To many test events consuming time (such as memory test, data wire, address wire test) effectively, simplification content measurement, raising test speed. |
| debug<mode><value> | Mode=(details); Value=(1,0) debug details 1 specifies output DCO information: when the user need to know the details of test result, can specify by this instruction. |
| quit | Withdraw from test |
In addition, in order to instruct the rapid debug of tester, the designer should write a test document, lists in detail the corresponding possible hardware error of every error message. In case wrong information output is convenient to the tester and is found rapidly wrong place, in time misarrangement.
Claims (2)
1, a kind of method of the detecting production line of communication product single board with central processing unit is characterized in that may further comprise the steps:
Step 1: on the Software Development Platform of embedded real time system, start the project file that is used for this test;
Step 2: the binary system test code that will generate after will starting writes in the flash memory of institute's survey veneer;
Step 3: Target Board and test PC main frame are coupled together with the Serial Port Line distich, open the test PC
The hyper terminal application program, carry out corresponding configuration;
Step 4: after Board Power up starts successfully, automatically begin the test target plate;
Step 5: input the numbering of required test event, test accordingly;
Step 6: the report of output single-board testing, if find fault, then export the information such as abort situation.
2, the method for a kind of detecting production line of communication product single board with central processing unit according to claim 1, it is characterized in that: the required content measurement that carries out of input further comprises in the described step 5: CPU is started carry out self check, whether serial ports, network interface work be normal; Testing memory, test address bus, data/address bus, test data looping back data passage; Each chip functions in test communication interface module, the data processing module, the communication interface between the test power board.
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Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100399752C (en) * | 2004-05-21 | 2008-07-02 | 华为技术有限公司 | System and method for testing digital communication signal processing single board |
| CN100461928C (en) * | 2006-09-30 | 2009-02-11 | 华为技术有限公司 | Device and method for realizing reorienting of veneer equipment serial port |
| CN100462934C (en) * | 2005-09-30 | 2009-02-18 | 鸿富锦精密工业（深圳）有限公司 | Testing system and method and controller therewith |
| CN101162944B (en) * | 2006-10-13 | 2010-12-01 | 中兴通讯股份有限公司 | Method of implementing automatic detection optical module parameter |
| CN101174907B (en) * | 2006-11-01 | 2011-05-11 | 中兴通讯股份有限公司 | Testing device for radio frequency veneer |
| CN101159585B (en) * | 2007-08-18 | 2011-08-10 | 中兴通讯股份有限公司 | Method and system of constructing analog veneer |
| CN102818694A (en) * | 2011-06-07 | 2012-12-12 | 中兴通讯股份有限公司 | Method and system for testing veneer light index automatically and control server |
| CN104991875A (en) * | 2015-07-02 | 2015-10-21 | 成都智明达数字设备有限公司 | Address bus detection method |
| CN106873573A (en) * | 2017-02-20 | 2017-06-20 | 郑州云海信息技术有限公司 | A kind of automatic test approach and device of the covering of embedded control chip global function |
| CN102508748B (en) * | 2011-09-23 | 2017-09-29 | 中兴通讯股份有限公司 | The detection method of veneer, internal memories of digital signal processors |
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2001
- 2001-09-24 CN CN01126907A patent/CN1409502A/en active Pending
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100399752C (en) * | 2004-05-21 | 2008-07-02 | 华为技术有限公司 | System and method for testing digital communication signal processing single board |
| CN100462934C (en) * | 2005-09-30 | 2009-02-18 | 鸿富锦精密工业（深圳）有限公司 | Testing system and method and controller therewith |
| CN100461928C (en) * | 2006-09-30 | 2009-02-11 | 华为技术有限公司 | Device and method for realizing reorienting of veneer equipment serial port |
| CN101162944B (en) * | 2006-10-13 | 2010-12-01 | 中兴通讯股份有限公司 | Method of implementing automatic detection optical module parameter |
| CN101174907B (en) * | 2006-11-01 | 2011-05-11 | 中兴通讯股份有限公司 | Testing device for radio frequency veneer |
| CN101159585B (en) * | 2007-08-18 | 2011-08-10 | 中兴通讯股份有限公司 | Method and system of constructing analog veneer |
| CN102818694A (en) * | 2011-06-07 | 2012-12-12 | 中兴通讯股份有限公司 | Method and system for testing veneer light index automatically and control server |
| CN102818694B (en) * | 2011-06-07 | 2016-08-03 | 中兴通讯股份有限公司 | Veneer light automatic test of indexes method, system and control server |
| CN102508748B (en) * | 2011-09-23 | 2017-09-29 | 中兴通讯股份有限公司 | The detection method of veneer, internal memories of digital signal processors |
| CN104991875A (en) * | 2015-07-02 | 2015-10-21 | 成都智明达数字设备有限公司 | Address bus detection method |
| CN106873573A (en) * | 2017-02-20 | 2017-06-20 | 郑州云海信息技术有限公司 | A kind of automatic test approach and device of the covering of embedded control chip global function |
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