CN1378358A - Device for realising channel share - Google Patents

Device for realising channel share Download PDF

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Publication number
CN1378358A
CN1378358A CN01105876A CN01105876A CN1378358A CN 1378358 A CN1378358 A CN 1378358A CN 01105876 A CN01105876 A CN 01105876A CN 01105876 A CN01105876 A CN 01105876A CN 1378358 A CN1378358 A CN 1378358A
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China
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channel
plate
rim
board
output
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CN1219374C (en
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向际鹰
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ZTE Corp
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ZTE Corp
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Abstract

A device to realize the shared channel belongs to the CDMA base station shared channel unit technique disposes all channel plates to be in the manner of tansplate cascade, i.e. each channel plate to receive the output from an upgrade channel plate, the data from upstream and local data accumulated on the local plate, the accumulation is output and sent to the downstream channel plate to form a daisy-chained cascade pattern between the plates for all the channel plates. A programmable belay timer controlled by backplate controller is set at the tail grade of each channel plate, and each said channel plate outputs to the radio-frequency interface plate individually as well as the selecting circuit on the radio-frequency interface plate selects the effective data and sends them to the radio frequency unit.

Description

Realize the device of Channel Sharing
The invention belongs to the CDMA field of mobile communication, more particularly, belong to cdma base station Channel Elements technology of sharing.
The CDMA digital baseband system is made of polylith channel board (CHM), multi-disc cdma base station modem chip (CSM) is arranged in the every channel board, CSM finishes the digital baseband modulation and the demodulation of CDMA Channel, channel board is output as the output sum of all CSM, and whole base station is output as the summation that all channel board groupings add up.Accumulation function generally goes up at a radio frequency interface plate (RIM) and realizes, the output that adds up of RIM is delivered to radio frequency unit and gone up down-conversion.
Generally speaking, the number of base station accumulator depends on carrier frequency and the sector number that is disposed.Participate in the channel board number that adds up in each accumulator and depend on two factors, one is the disposal ability of channel board, and one is base station configuration.Can be divided into channel according to the difference of accumulate mode does not share and two kinds of Channel Sharing:
Channel is not shared and is meant the holddown groove position, and RIM is delivered in the forward direction output of fixed qty CHM, simply adds up at RIM.It is definite that shortcoming is that the pass of channel board and radio frequency unit ties up on the hardware, can't change.If change base station configuration, or the channel board upgrading, then needing to change backboard, flexibility is relatively poor.
Channel Sharing: promptly the Channel Modulation demodulator is not corresponding with particular frequency carrier or sector on hardware, and Channel Elements forms a resource pool, can be by the software dynamic-configuration.The benefit of Channel Sharing has: flexible configuration, be convenient to upgrading, and can realize the channel board redundancy, improve reliability.For making things convenient for software, need the redundant channels unit sometimes, then the shared channel unit scheduling that will originally serve other sector or carrier frequency of available channel comes to use.Can also process user quantity exceed the situation of design, in some sense " soft capacity " promptly is provided.
Realize that real Channel Sharing has suitable difficulty: at first each channel board outputs to RIM separately, and RIM is last must to bear the work that all adds up, and the problem of most critical is that the accumulate mode of RIM must be able to dynamically be changed.Each channel board forward direction output data line a lot (12 or 24), then RIM is difficult to layout under a fairly large number of situation of channel board.In addition, be to realize flexible configuration, the adding up to be preferably in a slice logical device of whole base station realize, so large-scale device be difficult to select and cost higher; If, then can alleviate backboard and walk linear pressure with the universal serial bus transmission.But for RIM, bring bigger difficulty on the contrary because finish add up in, also to do the string and the conversion.
The scheme that realizes Channel Sharing in the prior art has following three kinds:
First kind of scheme is at the inner parallel bus that adopts of RIM:
Shown in basic structure Fig. 1 of this scheme: each channel board is delivered to RIM with the output of this plate, and a slice programmable logic device of RIM receives the output from all channel boards.In this logical device inside, at first signal is carried out interconnection, be divided into many groups, every group is added up respectively, and different radio frequency units is delivered in its output respectively.
This scenario-frame is simple, but there are the following problems:
1, because each CHM exports multi-bit parallel line (being generally 12 or 24),
Therefore the programmable logic device on the RIM needs a large amount of inputs, and the more important thing is needs
To do interconnection to these inputs, cause programmable logic device in large scale,
Cost is higher.
2, the programming device on the RIM needs the accumulator of a plurality of many inputs, takies in a large number
Logical resource.
3, need a large amount of parallel buss on the RIM veneer, wiring is difficulty.
4, owing to need to adapt to various configurations, in logical design, no matter be input or
Output will consider that all this will waste a large amount of logic moneys by the situation of maximum possible
The source.
5, channel board is externally exported and is all CSM signal sums of this plate, thereby channel altogether
Enjoy and to reach CHM veneer one-level, and can not be accurate to each CSM chip.Example
As, as long as have a CSM to serve set of sectors 1 on the CHM, then all CSM are
Can only serve set of sectors 1, and the CSM of free time can not be dispatched to other sector
Group.
Second kind of scheme is with single logic device realization serial transmission interface and adds up:
This scheme adopts the logical device of band difference input/output interface on RIM, finish difference string and conversion, add up and and go here and there translation function, output to radio frequency unit with differential level at last.In this scheme, satisfy the CDMA forward direction logical device that requires that adds up and be difficult to select, cost is higher, and following particular problem is arranged:
1, satisfy at present that CDMA requires, integrated multipath, more than 12, built-in multiple
Logical device with/demodulation multiplexer and clock data recovery circuit is difficult to select and become
This is too high.
2, if realize serial/unstring with dedicated devices, then must first demultiplexing on RIM
After add up again, have a large amount of parallel lines, and dedicated serial/device cost unstrings
High.
3, in addition, if the phase-locked loop limited amount that each logical device is built-in is less than CHM
The quantity of plate then can't be distinguished phase-locked to each CHM.That brings thus asks
Topic is, because the difference of device or will cause CHM because of the difference that connects up in the logical device
Transmission delay before the plate differs during data back RIM, if this difference reaches one
Decide degree, then the data frame head of some plate will be made mistakes, and cause data corruption.Because
Multiplexing back data rate is very high, and the time delay franchise is very little, designs extremely difficult.
4, if can't guarantee time delay, then task sharing can only be arrived a plurality of logical devices, but
Finally still need a centrostigma, cause to have a large amount of communications between a plurality of logical devices
Line.
5, identical with first kind of scheme, Channel Sharing can only reach CHM veneer one-level, and
Can not be accurate to each CSM chip.
The third scheme is to finish jointly with cross-connect and logical device:
At first, channel board need be multiplexed into differential signal with the forward direction dateout, and the signal of all channel boards is pooled to RIM.At the RIM place,, be divided into many groups at first through a large-scale difference cross-connect, every group is divided into multichannel again, in a plurality of logical devices, add up respectively, output to second multiway intersection connector, select wherein useful signal to output to radio frequency unit with differential level.
There is following shortcoming in this scheme:
1, needs a plurality of logical devices.
2, need two on a large scale, the difference cross-connect of two-forty, cost is higher.
3, the input and output that require internal part are all by design maximum, because various configuration phases
Difference too big (as being 6 carrier frequency, 3 sectors, also may be 2 carrier frequency, 6 sectors,
Or the like), therefore there is serious logical resource waste.
4, same, the Channel Sharing of this scheme can only reach CHM veneer one-level, and can not
Be accurate to each CSM chip.
For solving above-mentioned shortcoming, the present invention proposes a kind of device of realizing Channel Sharing, realizes the high accuracy Channel Sharing at low cost with simple device.
For realizing purpose of the present invention, adopted following technical scheme:
All channel boards are configured to the mode of straddle cascade: each channel board all receives the output from higher level's channel board, the data and the local data that come from the upstream add up at this plate, subordinate's channel board is delivered in the output that adds up, and promptly all channel boards constitute the daisy chain cascading form between a plate; In each channel board final stage a programmable delayer is set; Each channel board outputs to radio frequency interface plate RIM separately, and the selection circuit on radio frequency interface plate RIM is selected valid data, delivers to radio frequency unit.
In channel board veneer inside, but all modem chips are formed the daisy chain of a dynamic-configuration, and this link is controlled by segmentation control circuit in the plate, and under its control, daisy chain can be at this plate end, or any point, this plate middle part disconnects.
In order to make the channel board plug or not influence the remainder of link when breaking down, corresponding each channel board adds a by-pass switch on backboard; All by-pass switches and programmable delayer all are controlled by backplane controller, and backplane controller is to the link dynamic-configuration.
In order further to improve reliability, can increase the odd circuit, radio frequency interface board RIM input data are carried out odd, with real-time detection and processing channel plate single board default.
Below in conjunction with accompanying drawing the specific embodiment of the present invention is described in further detail:
Fig. 1 is at the inner theory diagram that adopts parallel bus of RIM;
Fig. 2 is the principle signal of apparatus of the present invention;
Fig. 3 is the embodiment schematic diagram of cascade between plate;
Fig. 4 is the embodiment schematic diagram of segmentation in the plate;
Fig. 1 describes in background technology.
The principle schematic of apparatus of the present invention such as Fig. 2:
All channel boards are configured to the mode of straddle cascade: each channel board all receives the output from higher level's channel board, the data and the local data that come from the upstream add up at this plate, subordinate's channel board is delivered in the output that adds up, and promptly all channel boards constitute the daisy chain cascading form between a plate; For satisfying the strict demand of CDMA to signal lag, in each CHM veneer final stage programmable delayer is set, can dynamically adjust a link time-delay; Each channel board outputs to radio frequency interface plate RIM separately, and the selection circuit on radio frequency interface plate RIM is selected valid data, delivers to radio frequency unit.
And in channel board veneer inside, but all modem chips are formed the daisy chain of a dynamic-configuration, different with other device is, this daisy chain is controlled by segmentation control circuit in the plate, under its control, daisy chain can be at this plate end, or any point, this plate middle part disconnects; When the inner daisy chain of CHM veneer disconnected, last a slice CSM of cut-off point became the end of a last subchain, is directly delivered to RIM, and following a slice CSM becomes the beginning of next bar subchain; Output to each channel board of radio frequency interface plate RIM separately, what wherein have is positioned at the daisy chain end just, and then its dateout is effective, and other channel boards are positioned at the initial or middle part of daisy chain, and intermediate object program is only represented in its output, is hash; Owing to add up and route all has been distributed to each channel board, radio frequency interface plate RIM need not add up again.
For making the channel board plug or not influencing the remainder of link when breaking down, corresponding each channel board adds by-pass switch SB on backboard, when veneer takes out or damage, and corresponding by-pass switch closure, the upstream is direct-connected to the downstream, does not influence other channel board work;
All by-pass switches and programmable delayer all are controlled by backplane controller, and backplane controller is to the link dynamic-configuration.
For further improving reliability, can increase the odd circuit, to carrying out odd, with real-time detection and processing channel plate single board default in the input data of radio frequency interface plate RIM.
Fig. 3 is for realizing the scheme block diagram of Channel Sharing with cascade between plate: each channel board outputs to RIM separately, the input of on backboard, the output of self being linked next CHM simultaneously, input, upstream and downstream at CHM is put switch S CI and SC0 respectively, when SCI connects, the daisy chain input of this plate CHM links to each other with the daisy chain output of a last CHM, when SCI disconnected, the input of the CHM daisy chain of this plate connect 0;
Control switch SCI and SC0 by rights join end to end all channel boards of same carrier frequency, are the accumulation result of exportable full chain on CHM in the end;
In the RIM side, though still receive input from all CHM, but owing to add up as daisy chain in CSM, therefore every carrier frequency only need be selected a road specific (being positioned at the Na Yilu of this carrier frequency daisy chain afterbody), with its demultiplexing and multiplexingly again can directly output to radio frequency unit; Need only finish simple selection on the RIM like this, can save a large amount of accumulators and FPGA (Field Programmable Gate Array), line also can significantly reduce, and also supports simultaneously channel flexible configuration to greatest extent.
The inherent defect that daisy chain connects is: when any one link in the link was damaged or disconnected, whole link just can not be worked.Promptly a channel board might influence whole carrier frequency.For addressing this problem, on backboard, also have one group of by-pass switch SB, the corresponding CHM of each by-pass switch: when switch disconnects, be normal operation mode, channel board is cascade step by step; When switch connection, veneer is by bypass; Control SB by rights, SCI and SCO just can be to the link dynamic-configuration, when any plate in the link or several plates take out, but original link operate as normal still.
Describe Channel Sharing and dynamic-configuration situation below in detail:
When the CSM number on carrier frequency number, sector number and even the CHM changes, can carry out dynamic-configuration by changing SB and SCI, illustrate as follows:
Suppose on a CHM, to be furnished with 2 CSM, require to realize the business of single carrier frequency 3 sectors, then switch S B1, SB2, SB3 are disconnected, and SCI1, SCI2, SCI3, SCO1, SCO2, SCO3 are connected with CHM1, CHM2, three channel boards of CHM3.The forward data of CHM1, CHM2, CHM3 is joined end to end, the data of the whole carrier frequency of output on CHM3.For not influencing next carrier frequency, also SB4, SCI4 should be disconnected, break off getting in touch of preceding 3 channel boards and its back channel board.Owing to finished accumulation function at the CSM chip internal, so RIM need not have accumulator again, only needs the selection circuit of a n input.In last example, select circuit to ignore the CHM1 as intermediate object program, the input of CHM2, the input of only getting CHM3 is directly delivered to radio frequency unit as final result.
Suppose on a CHM, to be furnished with 3 CSM, require CHM1, CHM2, four channel boards of CHM3, CHM4 to realize the business of single carrier frequency 6 sectors, then switch S B1, SB2, SB3, SB4 should be disconnected, and SCI1, SCI2, SCI3, SCI4, SCO1, SCO2, SCO3, SCO4 are connected.The forward data of CHM1, CHM2, CHM3, CHM4 is joined end to end, the data of the whole carrier frequency of output on CHM4.In addition, also SB5, SCI5 should be disconnected, break off getting in touch of preceding four channel boards and its back channel board.Select CHM4 at the RIM place, directly output to radio frequency unit.
Suppose on a CHM, to be furnished with 4 CSM, require to realize single carrier frequency 6 sector business, then switch S B1, SB2, SB3 should be disconnected, and SCI1, SCI2, SCI3, SCO1, SCO2, SCO3 are connected with CHM1, CHM2,3 channel boards of CHM3.The forward data of CHM1, CHM2, CHM3 is joined end to end, the data of the whole carrier frequency of output on CHM3.In addition, SB4, SCI4 are in off-state, break off getting in touch of preceding 3 channel boards and its back channel board.Select CHM3 at the RIM place, directly be sent to radio frequency unit.
Fig. 4 is segmenting principle figure in the plate: the CSM of upstream receives data from higher level CHM by switch S CI, and the output of CSM at the corresponding levels is by SCk, SCk-1 ... .SC1, SC0 deliver to subordinate, and the rest may be inferred, make that all CSM are linked to be a chain on the plate;
All switch S C all are controlled by decoder in the link, when switch S C connects, and higher level and UNICOM of subordinate, when SC disconnected, daisy chain was cut off, and upper level CSM becomes the terminal point of daisy chain, is directly inputted to RIM;
In addition, another group switch S Dk is also delivered in the output of each CSM simultaneously, SDk-1 ... .SD1, the output of this group switch is linked to be a bus.Switch S D is controlled by decoder too, because the characteristic of decoder, arbitrary moment has only a conducting, has avoided bus collision.By control, can select any one CSM to export as daisy chain to SD;
Segmentation makes the CSM number on the CHM increase in the plate even adopt, and each channel board still can be kept one group of output, i.e. the upgrading of channel board can not bring the risk of backboard correcting; Channel Sharing can be accomplished the CSM one-level provides flexibility to greatest extent;
Because cdma base station has strict requirement to Timing Advance, therefore work as Link State and change, when for example some veneer takes out, need to adjust time-delay to compensate the change of link delay.The time-delay that each CSM introduces is a CDMA chip, so CHM upward is k+1 chip if there be k+1 CSM then to delay time.The CHM final stage has a programmable delayer to be exclusively used in compensation delay, when Link State changes, and the programmable delayer of can resetting, compensation delay.
In the present embodiment, realized the function of segmentation control with discrete decoder, not gate and buffer, but also can be by realization similar functions such as programmable logic devices.
Under the former situation, in the daisy chain if when plate damages or takes out, whole piece chain all effected then.But the present invention adopts segmentation in cascade between plate, the plate, has solved this problem preferably.Below will focus on the abnormal conditions that veneer damages:
As shown in Figure 3, suppose to form a shared pool by 3 CHM (CHM1, CHM2, CHM3), the situation that one or more CHM damages or is removed in the imagination course of normal operation: if CHM2 is removed, then backplane controller is connected SB2, make the data of CHM1 directly switch to CHM3, output to RIM by CHM3 again, the CSM on the CHM3 finishes adding up of CHM1 and two single board services of CHM3.All business that originally ran on CHM1 and the CHM3 all can keep.
When CHM2 inserted once more, SCI2 and SC02 were in closed condition, after the CHM2 initialization finishes, with the ready message of toward back plate controller report, backplane controller will disconnect SB2 after receiving this message, and connect SCI2 and SCO2, make the seamless unoccupied place of CHM2 insert link, avoided bus collision simultaneously.
If CHM3 is removed, then backplane controller requires output that RIM reelects CHM2 as final result, and original business is kept.
If CHM1 takes out, then backplane controller disconnects SCI2, SB2, SB3; Connect SCI3, CHM2 is linked to each other with CHM3, and CHM1 is foreclosed, the RIM side is selected CHM3 output.
If take out two boards simultaneously, also available similar method guarantees that remaining plate is working properly.For example CHM1 and CHM3 take out simultaneously, and then backplane controller is selected the output of CHM2, and the business that originally was positioned at CHM2 is kept.
More than be made of the situation of a shared pool 3 channel boards, when CSM density is higher, the reliability of link will be higher.
Under the situation that veneer and by-pass switch damage simultaneously, owing to all be in off-state during the by-pass switch operate as normal on the backboard, have only when veneer goes wrong or be removed and just connect, even damaging to system operation, the switch therefore on the backboard do not have influence yet.Damage simultaneously even work as veneer and pairing by-pass switch, also only under extremely special situation, influence part of links work.
For example, form a shared pool as if CHM1, CHM2, CHM3:
When CHM1 and SB1 damaged just simultaneously, backplane controller made RIM still read in data from CHM3.Because the CHM2 upstream is floating empty inner drop-down, the upstream of reading is input as 0, therefore CHM2 and CHM3 work is not had influence.
When CHM3 and SB3 damage just simultaneously, backplane controller will order RIM to read in data from CHM2.Still can guarantee CHM1, the CHM2 operate as normal.
When CHM2 and SB2 damage just simultaneously, backplane controller will order RIM to select CHM1 or CHM3.Suppose to have selected CHM1, then the work of CHM1 is still normal, and fault only influences CHM3.
When any two boards and corresponding by-pass switch damaged simultaneously, for example, CHM1, SB1, CHM3, SB3 damaged simultaneously, and then RIM will read in data from CHM2.Unspoiled veneer there is not influence.
Even at the by-pass switch output short-circuit, open circuit even when chaotic, also can not have influence on the whole piece link:
When the by-pass switch short circuit, be equivalent to a CHM veneer by bypass, and do not influence other CHM.
When by-pass switch opens circuit, can not influence the whole piece link, because during operate as normal, all by-pass switches all are in off state.
When the high or low level of the fixing output of by-pass switch, even during noise, the CSM of subordinate will detect odd mistake (have only 15 cycles 0 of continuous appearance, the situation that adds one-period 1 could be passed through odd), and the bypass upstream, therefore can not have influence on the link of back.
By-pass switch plays backup or increases reliability, and only under unusual opposite extreme situations, the damage of by-pass switch just can have influence on system works, so backplane controller adds by-pass switch and can improve reliability.
CSM can import the odd that data do to pursue the sector to the upstream, odd circuit on the RIM also can be made odd to the data of channel board output, on link, there is the mechanism of verification step by step like this, has only when 1 number in 16 continuous bits and could pass through odd during for odd number.Therefore when the abnormal conditions generations such as plate, by-pass switch short circuit, open circuit, work be not undesired of upstream, downstream CSM all can perception.
After finding the odd mistake, CSM is programmed for local output mode, so that the downstream is unaffected.Simultaneously, CSM also can interrupt upwards reporting an error by odd.
All switches all are controlled by backplane controller, and backplane controller physically can be positioned at RIM.Backplane controller is constantly monitored the incident of each CHM power or power-down (taking-up), controls the switch of backboard with this.
All switches of the present invention can be by realizations such as 74HC244,74HC245, programmable logic devices.For example, can be with the Enable Pin (OE) of 74HC 244 control end as switch, when OE when low, switch connection, as OE when being high, switch disconnects, output becomes three-state because CSM inside has pull down resistor, so subordinate's input will put 0 automatically.
Because cdma base station has strict requirement to Timing Advance, therefore should note the setting of each veneer CSM timing register, link changes, when for example having plate to take out in the link, need to adjust the change of Timing Advance with the compensation link delay, time-delay is adjusted available software and is realized, also available hardware realizes.
The present invention will finish on RIM concentrates, and complicated add up and dynamic-configuration is operated in channel board and finishes simplified system configuration greatly, need only finish simple selection on RIM, and cost and difficulty reduce greatly; Because the application of segmentation in the plate, the precision of Channel Sharing is brought up to the chip one-level from the veneer one-level, has further saved resource; Because but the equal flexible configuration of each Channel Elements arrives arbitrary sector, system can be the most professional with minimum resource support; Improved robustness and reliability, backplane controller carries out dynamic-configuration to system, and the time-delay of each plate is adjusted, and has satisfied the strict demand of CDMA about system delay; When the channel resource allocation strategy changes, channel board CPU handles when improving, and can keep general structure constant, and various forms of channel boards can mixed insertion, and product development and maintenance are brought great convenience.

Claims (5)

1, realizes the device of Channel Sharing, all channel boards are configured to the mode of straddle cascade: each channel board all receives the output from higher level's channel board, the data and the local data that come from the upstream add up at this plate, subordinate's channel board is delivered in the output that adds up, and promptly all channel boards constitute the daisy chain cascading form between a plate; In each channel board final stage a programmable delayer that is controlled by backplane controller is set; Each channel board outputs to radio frequency interface plate (RIM) separately, and the selection circuit on radio frequency interface plate (RIM) is selected valid data, delivers to radio frequency unit.
2, the device of realization Channel Sharing according to claim 1 is characterized in that: also be included on the backboard corresponding each channel board and add a by-pass switch, described all by-pass switches are controlled by backplane controller.
3, the device of realization Channel Sharing according to claim 1 and 2 is characterized in that: also comprise the odd circuit, the input data of radio frequency interface board (RIM) are carried out odd.
4, the device of realization Channel Sharing according to claim 1 and 2 is characterized in that: but inner all modem chips of described channel board are formed the daisy chain of a dynamic-configuration, and this link is controlled by segmentation control circuit in the plate.
5, the device of realization Channel Sharing according to claim 3 is characterized in that: but inner all modem chips of described channel board are formed the daisy chain of a dynamic-configuration, and this link is controlled by segmentation control circuit in the plate.
CNB011058765A 2001-04-02 2001-04-02 Device for realising channel share Expired - Fee Related CN1219374C (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1306349C (en) * 2003-03-17 2007-03-21 发那科株式会社 Numerical value controller
CN1306836C (en) * 2004-09-23 2007-03-21 北京首信股份有限公司 Mobile communication device for realizing channel complete share
CN101815313A (en) * 2010-04-26 2010-08-25 华为技术有限公司 Method and device for processing fault of channel board, channel board and base station
CN101170415B (en) * 2006-10-26 2010-12-29 杭州华三通信技术有限公司 Crossed cascading system and transmission method for Ethernet physical layer and its application chip

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1306349C (en) * 2003-03-17 2007-03-21 发那科株式会社 Numerical value controller
CN1306836C (en) * 2004-09-23 2007-03-21 北京首信股份有限公司 Mobile communication device for realizing channel complete share
CN101170415B (en) * 2006-10-26 2010-12-29 杭州华三通信技术有限公司 Crossed cascading system and transmission method for Ethernet physical layer and its application chip
CN101815313A (en) * 2010-04-26 2010-08-25 华为技术有限公司 Method and device for processing fault of channel board, channel board and base station

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