CN1366178A - Coulometer with supersensitivity to charge and its preparing process - Google Patents
Coulometer with supersensitivity to charge and its preparing process Download PDFInfo
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- CN1366178A CN1366178A CN 01101944 CN01101944A CN1366178A CN 1366178 A CN1366178 A CN 1366178A CN 01101944 CN01101944 CN 01101944 CN 01101944 A CN01101944 A CN 01101944A CN 1366178 A CN1366178 A CN 1366178A
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Abstract
The invention relates to a charge-super sensitive Coulomb meter and its preparation method that belongs to microelectronic device and micro-processing method. There are a source electrode and a drain electrode in the conducting material layer on substrate. There are trough 8 and trough 9 in the source electrode and drain electrode. The platform with a width of 3-800nm between trough 8 and trough 9 forms a one dimension waveguide to link the source and the drain. Wire grid 5, 6 of tunnelling potential barrier and wire grid of probe head are deposited on the one-dimension waveguide. Quantum points is the one-dimension waveguide between wire grid 5,6, and sideline grid is positioned on the quantum point. The invented meter can detect 1/10000 electron charge.
Description
The invention belongs to microelectronic component and micro-processing method, nano-device and nanoprocessing method, particularly relate to a kind of coulombmeter, and utilize micro-processing technology, nanofabrication technique to prepare the method for this device the electric charge hypersensitization.
The speed of Nano-technology Development is very fast, and microelectronic component will be replaced, partly be replaced at least by nano-device in the near future.Now succeed and obtain the nano-device that everybody generally acknowledges single-electronic transistor and single-electron memory are arranged.We can say that single-electronic transistor is most promising nano-device.The conditional electronic transistor is realized functions such as switch, vibration and amplification by the collective motion of the electronics in groups of control more than ten million; The behavior that single-electronic transistor then needs only by an electronics just can realize specific function.Along with the raising of integrated level, power consumption has become the restraining factors of microelectronic device circuits stability.The element that constitutes with single-electronic transistor can improve microelectronic integrated level greatly and can make power consumption be reduced to 10
-5Single-electronic transistor so extremely low power consumption can solve the labile factor problem that causes because of heat radiation in the existing integrated circuit.Its Highgrade integration degree can surmount the limit of present large scale integration far away, and can reach the limit that Heisenberg's uncertainty principle sets and become in the future can not substituted new device.In addition, along with the raising of microelectronic component integrated level, the unit component size constantly reduces, and contained electron number also constantly reduces.When the system unit electron number is less than 10,1 electronics of every fluctuation, the change of electron number is greater than 10% in the system, and the fluctuation of electron number will have a strong impact on the stability of integrated circuit.The unique channel that now addresses this problem is exactly: replace traditional device with single-electron device, and realize that it is integrated.
The integrated wireless coupling (" applied physics wall bulletin " Appl.Phys.Lett., 1996,69,406) that will depend on each former device of single-electronic transistor, these are different with traditional large scale integrated circuit principle.Integration principle based on this single-electron device, people such as Nakazato (" electronics wall bulletin " Electrinics Letters, 1993,29, " 384. Japanese applied physics wall bulletin " Jpn.J.Appl.Phys.Part 1,1995,34,700) single-electron memory and the single electron logical circuit of memory function have been realized having.They realize the integrated of single-electron device by coupling of the tunnelling between single-electronic transistor and capacitive coupling.The integrated electron device that goes out of this integrated approach has following deficiency: 1) the quantum dot size is uncertain and fluctuation is serious, 2) number of quantum dot can't determine 3) barrier height of quantum dot is uncontrollable, unadjustable, and 4) stiffness of coupling between quantum dot is unadjustable.Thereby integrated single-electron device, the single electron circuit that goes out of this integrated approach has complicated difficult control and unsettled shortcoming.People such as Duncan (Appl.Phys.Lett.1999,74,1045) utilize surperficial grid depletion technology to realize the integrated of two single-electronic transistors, but existing capacitive coupling has the tunnelling coupling again between these two single-electronic transistors, and can not be the fully independent control of these two kinds of couplings, this makes integrated two single-electronic transistors that go out that the shortcoming of complicated difficult control be arranged.
One of purpose of the present invention is to overcome the defective of the above-mentioned integrated electron device that goes out, and based on the coulomb blockade principle, provides a kind of coulombmeter to the electric charge hypersensitization that utilizes the integrated realization of single-electronic transistor.This coulombmeter to the electric charge hypersensitization can be used for surveying ten thousand/ electron charge, also can be used for surveying the superweak electric current that can't measure with known technology, comprise DC current, alternating current.
A further object of the present invention provides a kind of micro-processing technology, nanofabrication technique of utilizing and prepares the method to the coulombmeter of electric charge hypersensitization.
The present invention is by the quantum dot of table top restriction that mixes and lines grid depletion technology realization single-electronic transistor, between quantum dot again the capacitive coupling by the suspension grid all single-electronic transistors are integrated.Utilize this integrated approach, suspension grid and a single-electronic transistor are integrated the coulombmeter that has just constituted the electric charge hypersensitization.This coulombmeter is detectable ten thousand/ electron charge, can aspect the detection of electronic logic circuit research, nano-device, single photon detection and biological neuroelectricity important application arranged.
Coulombmeter to the electric charge hypersensitization of the present invention is as shown in Figure 2:
Apply negative bias respectively on the tunneling barrier lines grid 5 and 6, form two tunneling barriers and one-dimensional wave guide 10 is divided into 3 sections, sideline bar grid 4 are in order to regulate, to control the static chemical potential of quantum dot 3 and electron number wherein.Probe lines grid 7 are used to the detected object that is of coupled connections.
On substrate, can further cover the buffering epitaxial loayer that following material is made: 1) Si, Ge or GeSi semiconductor element cellulosic material; 2) GaN, NAlGaAs, NInGaAs, NAlGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or InAlGaAs semiconducting compound; 3) be doped to compound substance in Si, Ge, GeSi, GaN, NAlGaAs, NInGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or the InAlGaAs semiconductor material by silicon, phosphonium ion, nitrogen ion, arsenic ion, oxonium ion or boron fluoride ion etc.; 4) above-mentioned 1), 2) and 3) but described grating constant is close and the material of combination in any; 5) insulating material such as monox, aluminium oxide, silicon nitride or titanium dioxide.These buffering epitaxial loayers can further improve the quality of conductive material layer.If the buffering epitaxial loayer is a non-doped layer, it can be used as the insulation course of doped substrate and conductive material layer, to stop the generation of leakage current.The buffering epitaxial loayer can be identical with the various materials that constitute conductive material layer, but the combination of material is inequality, and structure is also inequality.
Described substrate can be 1) silicon (being SOI) on the semiconducting insulation body; 2) oxide material is as sapphire Al
2O
3, silicon oxide sio
2, magnesium oxide MgO or strontium titanates SrTiO
3The monocrystalline silicon that one deck oxide is arranged on the surface; 4) semiconductor material of semiconductor material of Can Zaing or non-doping is GaAs, Cr-GaAs, Si or InP etc. as the semiconductor material of non-doping; The semiconductor material that mixes is N
+-GaAs, N
+-InP or N
+-GaN etc.
Described conductive material comprises 1) Si, Ge or SiGe semiconductor element cellulosic material; 2) GaN, NAlGaAs, NInGaAs, NAlGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or InAlGaAs semiconducting compound; 3) be doped to compound substance in Si, Ge, SiGe, GaN, NAlGaAs, NInGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or the InAlGaAs semiconductor material by silicon, magnesium, phosphonium ion, nitrogen ion, arsenic ion, oxonium ion or boron fluoride ion etc.; 4) above-mentioned 1), 2) and 3) but described grating constant is close and the material of combination in any.
Described tunneling barrier lines grid, probe lines grid and sideline bar grid are Al, Au, W, Cr, Ti, Ni, Pt, Ge, Ta or Mo metal level and any composite bed between them.
The preparation method of the coulombmeter to the electric charge hypersensitization of the present invention may further comprise the steps, in volume ratio:
(1) preparation of substrate 12.Adopt ultrasonic and organic solvent water-bath that initial substrates is cleaned repeatedly, remove dust, greasy dirt and pollutant etc. on the initial substrates, after having cleaned, use H
2SO
4: H
2O
2: H
2O=1-100: 1-60: 1-5000, NH
4OH: H
2O
2: H
2O=1-100: 1-60: 1-5000, H
3PO
4: H
2O
2: H
2O=1-100: 1-60: 1-5000 or H
2SO
4: H
3PO
4: H
2O=1-100: 1-60: corrosive liquids such as 0-500 are removed the lip-deep scar of initial substrates, make the initial substrates surfacing; Clean, remove substrate moisture content, then substrate is put into process chamber and carried out bake out, obtain accurately machined substrate 12; Utilize oxidation or deposition process, on accurately machined substrate 12, can cover one deck buffering epitaxial loayer;
Described buffering epitaxial loayer is: 1) Si, Ge or GeSi semiconductor element cellulosic material; 2) GaN, NAlGaAs, NInGaAs, NAlGaAs, NIaAlGaAs, GaAs, AlGaAs, InGaAs or InAlGaAs semiconducting compound; 3) be doped to compound substance in Si, Ge, GeSi, GaN, NAlGaAs, NInGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or the InAlGaAs semiconductor material by silicon, phosphonium ion, nitrogen ion, arsenic ion, oxonium ion or boron fluoride ion etc.; 4) above-mentioned 1), 2) and 3) but described grating constant is close and the material of combination in any; 5) insulating material such as monox, aluminium oxide, silicon nitride or titanium dioxide.
(2) utilize oxidation, corrosion or deposition process, directly covering conductive material layer 11 on the accurately machined substrate 12 or on the buffering epitaxial loayer on the substrate 12, utilize body doping, modulation doping or applying bias to cause electron gas in the conductive material layer, electron gas is the 2-300 nanometer to the distance of conductive material layer upper surface.
Conductive material comprises 1) Si, Ge or SiGe semiconductor element cellulosic material; 2) GaN, NAlGaAs, NInGaAs, NAlGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or InAlGaAs semiconducting compound; 3) be doped to compound substance in Si, Ge, SiGe, GaN, NAlGaAs, NInGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or the InAlGaAs semiconductor material by silicon, magnesium, phosphonium ion, nitrogen ion, arsenic ion, oxonium ion or boron fluoride ion etc.; 4) above-mentioned 1), 2) and 3) but described grating constant is close and the material of combination in any.
(3) on conductive material layer 11, utilize preparation overlay marks such as conventional photoetching process, X-ray lithography method, beamwriter lithography method, ion beam lithography method or phase shift mask lithography method, part table top, the groove of corrosion or the film (comprising metal film) of deposition etc. that can utilize corrosion to form are used as overlay mark; Its metal film is metal level and any composite beds between them such as Al, Au, W, Cr, Ti, Ni, Pt, Ge, Ta or Mo.
(4) utilize the overlay mark location, adopt conventional photoetching process preparation in order to make the mask of table top, corrosion has the conductive material layer 11 of overlay mark, erode the part in conductive material layer 11 mask patterns, the outer conductive material layer 11 of mask pattern is the table top of making device, described corrosion can be known dry etching or wet etching, and wherein: described wet etching liquid is H
2SO
4: H
2O
2: H
2O=1-100: 1-60: 1-500, NH
4OH: H
2O
2: H
2O=1-100: 1-60: 1-5000, H
2SO
4: H
3PO
4: H
2O=1-100: 1-60: 0-500 or H
3PO
4: H
2O
2: H
2The solution of O=1-100: 1-60: 1-5000.
(5) utilize overlay mark location, prepare mask, by depositing metallic films, peel off and step such as annealing prepares source electrode 1 and drains 2 in the conductive material layer 11 that has table top with conventional photoetching.The deposit metal films material comprises metal level and any composite beds between them such as Pd, Zr, Ag, Gd, Al, Ni, Au, W, Cr, Ti, Ni, Pt, Ge, Ta, In or Mo.Peel off in solvent and carry out ultrasonic cleaning.Annealing conditions is at N
2: H
2Alloy annealing in the mixed atmosphere of=1-900: 0-500, temperature is 300-1200 ℃.
(6) utilize the overlay mark location, adopt photoetching methods such as conventional photoetching process, X-ray lithography method, beamwriter lithography method, ion beam lithography method or phase shift mask lithography method directly on conductive material layer 11, to prepare in order to make the figure mask of one-dimensional wave guide 10, its mask material comprises 1) photoresist such as PMMA, ZEP, AZ or SAL, 2) metal level and any composite beds between them such as Al, Ge, Ni, Au, W, Cr, Ti, Ni, Pt, Ta or Mo, 3) insulating material such as monox, aluminium oxide, silicon nitride or titanium dioxide.Utilize dry corrosion method or wet corrosion method to cut out the part that does not have mask on the conductive material layer 11 then, constitute groove 8 and groove 9, groove 8 and groove 9 cause the formation of the one-dimensional wave guide 10 that is connected source electrode 1 and drain electrode 2 in the conductive material layer 11, and its width is the 2-800 nanometer, highly is the 1-150 nanometer.
(7) utilize the overlay mark location, adopt conventional photoetching process, X-ray lithography method, beamwriter lithography method, ion beam lithography method, phase shift mask lithography method, preparation photoresist figure mask on the conductive material layer 11 that has source electrode 1, drain electrode 2 and one-dimensional wave guide 10, depositing metallic films on the photoresist figure mask of preparation, its thickness of metal film is the 10-150 nanometer.The metal film of deposition comprises Al, Au, W, Cr, Ti, Ni, Pt, Ge, Ta or Mo and any composite bed between them.Taking-up is made device and is put into solvent and soak.Remove metal film outside the mask pattern through technology such as peeling off, stay the lines grid 5,6,4 and 7 in the mask pattern.
(8) prepare the coulombmeter to the electric charge hypersensitization of the present invention through the lead-in wire connection.
Solvent for use is an acetone.Method 2
(1) selects the material that on substrate 12, has been coated with conductive material layer 11 for use, by oxidation repeatedly, corroding method attenuate conductive material layer 11.At N
2: O
2Oxidation in the mixed atmosphere of=0-900: 1-500, its oxidizing temperature are 350-1200 ℃.Use corrosive liquid HF: H
2O=1-100: 1-5000 or HCl: H
2O=1-100: 1-5000 removes oxide layer.Reoxidize, corrosion again reaches the 2-300 nanometer up to the thickness of conductive material layer 11.Utilize body doping, modulation doping or applying bias to cause electron gas in the conductive material layer, electron gas is the 2-300 nanometer to the distance of conductive material layer upper surface.
(2) on the conductive material layer behind the attenuate 11, utilize preparation overlay marks such as conventional photoetching process, X-ray lithography method, beamwriter lithography method, ion beam lithography method or phase shift mask lithography method, part table top, the groove of corrosion or the film (comprising metal film) of deposition etc. that can utilize corrosion to form are used as overlay mark; Its metal film is metal level and any composite beds between them such as W, Cr, Pt, Ta or Mo.
(3) utilize the overlay mark location, adopt conventional photoetching process to prepare mask, corrosion has the conductive material layer 11 of overlay mark, erode the part in conductive material layer 11 mask patterns, the outer conductive material layer 11 of mask pattern is the table top of making device, described corrosion can be known dry etching or wet etching, and wherein: described wet etching liquid is H
2SO
4: H
2O
2: H
2O=1-100: 1-60: 1-500, NH
4OH: H
2O
2: H
2O=1-100: 1-60: 1-5000, H
3PO
4: H
2O
2: H
2O=1-100: 1-60: 1-500, KOH: H
2O=1-100: 1-5000, NaOH: H
2O=1-100: 1-5000, HF: H
2O=1-100: 1-5000 or HCl: H
2The solution of O=1-100: 1-5000.
(4) utilize the overlay mark location, on the conductive material layer 11 that has overlay mark, prepare the mask that is used for the ion injection by photoetching process, its mask material comprises 1) photoresist such as PMMA, ZEP, AZ or SAL, 2) metal level and any composite beds between them such as Al, Ge, Ni, Au, W, Cr, Ti, Ni, Pt, Ta or Mo, 3) insulating material such as monox, aluminium oxide, silicon nitride or titanium dioxide.Inject element to mask, wherein, the element of injection comprises silicon, phosphonium ion, nitrogen ion, arsenic ion, oxonium ion, nitrogen ion or boron fluoride ion etc.After ion injects, remove the mask that is used for the ion injection, the element that high-temperature annealing activation is injected, its annealing temperature is 500-1200 ℃, the time is 5-3600 second.
(5) utilize the overlay mark location, on accurately machined conductive material layer 11, prepare the figure photoresist mask that is used to make source electrode 1 and drain electrode 2 by photoetching, depositing metallic films on band photoresist figure mask, its thickness of metal film is the 5-900 nanometer.The metal film of deposition comprises Pd, Zr, Ag, Gd, Al, Ni, Au, W, Cr, Ti, Ni, Pt, Ge, Ta, In or Mo and any composite bed between them.Taking-up is made device and is put into solvent and soak.Remove metal film outside the mask pattern through technology such as peeling off, stay the metal film in the mask pattern, the ECDC annealing of gold is source electrode 1 and drain electrode 2, and its annealing temperature is 300-800 ℃, time 5-3600 second.
(6) utilize the overlay mark location, adopt conventional photoetching process, X-ray lithography method, beamwriter lithography method, ion beam lithography method or phase shift mask lithography method etc. directly on conductive material layer 11, to prepare in order to make the figure mask of one-dimensional wave guide 10, its mask material comprises 1) photoresist such as PMMA, ZEP, AZ or SAL, 2) metal level and any composite beds between them such as Al, Ge, Ni, Au, W, Cr, Ti, Ni, Pt, Ge, Ta or Mo, 3) insulating material such as monox, aluminium oxide, silicon nitride or titanium dioxide.Utilize dry corrosion method or wet corrosion method to cut out the part that does not have mask on the conductive material layer 11, constitute groove 8 and groove 9, groove 8 and groove 9 cause the formation of the one-dimensional wave guide 10 that is connected source electrode 1 and drain electrode 2 in the conductive material layer 11, and its width is the 2-800 nanometer, highly is the 1-150 nanometer.
(7) utilize the overlay mark location, adopt conventional photoetching process, X-ray lithography method, beamwriter lithography method, ion beam lithography method or phase shift mask lithography method etc., preparation photoresist figure mask on the conductive material layer 11 that has source electrode 1, drain electrode 2 and one-dimensional wave guide 10, depositing metallic films on the photoresist figure mask of preparation, its thickness of metal film is the 10-150 nanometer.The metal film of deposition comprises Al, Au, W, Cr, Ti, Ni, Pt, Ge, Ta or Mo and any composite bed between them.Taking-up is made device and is put into solvent and soak.Remove metal film outside the mask pattern through technology such as peeling off, stay the lines grid 5,6,4 and 7 in the mask pattern.
(8) prepare the coulombmeter to the electric charge hypersensitization of the present invention through the lead-in wire connection.
Solvent for use is an acetone.
Of the present invention to electric charge hypersensitization coulombmeter, its probe lines grid 7 be detected object and be connected, as being connected, in order to the charge variation in the detection quantum dot with the quantum dot that is detected object; Or be integrated and connected with the single electron logical circuit, in order to survey behavior, the path of electronics; Or be integrated and connected with single-electron memory, in order to survey the storing process of single electron; Or be embedded near the biological nerve, in order to survey neuroelectricity.
Of the present invention to electric charge hypersensitization coulombmeter, the more known integrated approach of its method when utilizing single-electronic transistor integrated has following advantage: 1) size of quantum dot, quantum dot potential barrier and their position thereof all can be realistic fully as required existing, make it be integrated with desirable controlled electrical characteristics; 2) the crystal intervalve coupling is determined by capacitive coupling between quantum dot fully, has avoided the tunnelling coupling between quantum dot, makes it integrated reliable and stable; 3) can realize the logical device and the circuit of Premium Features easily.Of the present invention have following advantage to the more known sensor of the coulombmeter of electric charge hypersensitization: 1) improved sensitivity (electric charge of detectable ten thousand/electronics) greatly, 2) can be highly integrated, 3) level structure of detectable " artificial atom ", 4) be fit to integrated with other device.
The present invention is described in detail below in conjunction with drawings and Examples:
Fig. 1 principle schematic to electric charge hypersensitization coulombmeter of the present invention.
Fig. 2 perspective view to electric charge hypersensitization coulombmeter of the present invention.
Fig. 3 plane projection synoptic diagram to electric charge hypersensitization coulombmeter of the present invention.
Indicate among the figure:
1. source electrode 2. drain electrode 3. quantum dots 4. sideline bar grid 5,6. tunneling barrier lines grid
7. probe lines grid 8,9. groove 10. one-dimensional wave guides 11. conductive material layers
12. substrate
Embodiment 1:
Selected Si-GaAs substrate is cleaned repeatedly: 1) the triclene ultrasonic cleaning is 5 times, each 10 minutes; 2) the acetone water-bath is cleaned each 10 minutes 5 times; 3) the alcohol ultrasonic cleaning is 5 times, each 10 minutes; 4) the deionized water ultrasonic cleaning is 6 times, each 10 minutes.Cleaned and used H again
2SO
4: H
2O
2: H
2O=5: corrosive liquid was removed lip-deep scar and was made the surface more smooth in 1: 1.With deionized water rinsing 5 times, each 10 minutes.Pull out after the flushing, dry up moisture, import process chamber into and heat-treat degasification: heating-up temperature is 450 ℃, and the time is 30 minutes.Import substrate into the molecular beam epitaxial growth chamber after temperature is reduced to 50 ℃, under the rich As environment that As stove shutter is opened, slowly heat the Si-GaAs substrate.At 580 ℃ of oxides (being the substrate demoulding) of burning on the Si-GaAs substrate, and monitor substrate demoulding process with high-energy electron diffraction (HEED).After clear striped appearred in the high-energy electron diffraction (HEED) pattern, underlayer temperature was raised to 610 ℃ and kept 10 minutes again, and temperature drops to 580 ℃ then, the GaAs buffering epitaxial loayer of growth 8000 nanometers on substrate.Growth contains the conductive material layer of two-dimensional electron gas on the buffering epitaxial loayer.Concrete steps are: improve underlayer temperature to 610 ℃, close Si stove shutter, open Ga stove shutter and Al stove shutter, 10 nanometer thickness Al grow
0.3Ga
0.7The As barrier layer is opened Si stove shutter again, the Si-Al of 50 nanometers of growing
0.3Ga
0.7As, wherein the Si doping content is 1 * 10
18Cm
-3Close Ga, As, Al, Si stove shutter, reduce underlayer temperature to 580 ℃, then Ga, As shutter with 2 seconds the interval alternation switch, the 5 nanometer thickness GaAs layers of growing are closed the Ga shutter, reduce underlayer temperature.When underlayer temperature reaches 350 ℃, close As stove shutter, this has just finished the growth of the conductive material layer that has two-dimensional electron gas 11 on the substrate 12.
Utilize the overlay mark of beamwriter lithography method preparation "+" font: the substrate that 1) will cover conductive material layer respectively in triclene, acetone, absolute ethyl alcohol, ultrasonic cleaning 5 minutes; 2), remove conductive material layer surface steam 110 ℃ of bakings 30 minutes; 3) with sol evenning machine at the electron beam resist PMMA that covers 160 nanometer thickness on the conductive material laminar surface, and 170 ℃ the baking 60 minutes; 4) prepare symmetrical two "+" word mark with the electron beam photoetching process; 5) developed 30 seconds with hexone, and with isopropyl acetone photographic fixing 50 seconds; 6) cleaned 60 seconds with absolute ethyl alcohol and put eb evaporation chambers into; 7) vacuum tightness when vaporization chamber reaches 7 * 10
-4During Pa, evaporate 50 nanometer titaniums/300 nm of gold; 8) ultrasonic peeling off; The Ti/Au that stays in the mask pattern is the overlay mark of "+" word figure.The width of forming two lines of "+" word figure all is 1 micron, and length all is 2000 microns.
Utilize the overlay mark location, adopt conventional photoetching process preparation in order to make the mask of table top, corrosion has the conductive material layer of overlay mark, erodes the part in the conductive material layer mask pattern, the outer conductive material layer of mask pattern is the table top of making device, and corrosive liquid is H
2SO
4: H
2O
2: H
2O=5: 1: 50.Its corrosion depth is 200 nanometers.
Utilize the overlay mark of preparation, by the figure AZ1400 mask of photoetching process preparation in order to making source electrode 1 and drain electrode 2, deposition (Au on mask
0.88Ge
0.12)
0.92Ni
0.8, in acetone, soaked 60 minutes, remove (Au outside the mask pattern through technology such as peeling off
0.88Ge
0.12)
0.92Ni
0.8, stay (the Au in the mask pattern
0.88Ge
0.12)
0.92Ni
0.8, deionized water ultrasonic cleaning 6 times, each 10 minutes.At N
2: H
2Alloy annealing in=3: 1 the mixed atmosphere, temperature is 410 ℃, the time is 50 seconds.At this moment stay (the Au in the mask pattern
0.88Ge
0.12)
0.92Ni
0.8Be source electrode 1 and drain electrode 2.
Directly preparation is in order to make the PMMA figure mask of one-dimensional wave guide 10 on conductive material layer 11 to utilize the beamwriter lithography method, and with wet etching method grooving 8 and groove 9, its corrosive liquid is H
2SO
4: H
2O
2: H
2O=6: 1: 30.Cut out the part that does not have mask on the conductive material layer 11, constitute groove 8 and groove 9, groove 8 and groove 9 cause the formation of the one-dimensional wave guide 10 that is connected source electrode 1 and drain electrode 3 in the conductive material layer 11, and its width is 280 nanometers, highly is 60 nanometers;
Utilize the overlay mark location, adopt the beamwriter lithography method on the conductive material layer 11 that has source electrode 1, drain electrode 2 and one-dimensional wave guide 10, to prepare in order to make the PMMA photoresist figure mask of lines grid, deposition 13 nanometer Ti/34 nanometer Au films on the photoresist figure mask of preparation, taking-up is made device and is put into solvent and soak, remove Ti/Au film outside the mask pattern through technology such as peeling off, stay the lines grid 5,6,4 and 7 in the mask pattern.
Lead-in wire has just been prepared the coulombmeter to the electric charge hypersensitization as Figure 1-3 after connecting.
Embodiment 2:
Press the method for embodiment 1, selected Cr-GaAs substrate is cleaned repeatedly.Cleaned and used H again
2SO
4: H
2O
2: H
2O=8: corrosive liquid was removed lip-deep scar and was made surfacing in 1: 1.Wash, dry up, import substrate into the molecular beam epitaxial growth chamber after the degasification, slow heating Cr-GaAs substrate under the rich As environment that As stove shutter is opened.At 590 ℃ of oxides (being the substrate demoulding) of burning on the Cr-GaAs substrate, and monitor substrate demoulding process with high-energy electron diffraction (HEED).After clear striped appearred in the high-energy electron diffraction (HEED) pattern, underlayer temperature was raised to 620 ℃ and kept 10 minutes again, and temperature drops to 590 ℃ at, the GaAs buffering epitaxial loayer of growth 8000 nanometers on the substrate then.Close Ga stove shutter, open Si stove shutter deposition Si atom on the buffering epitaxial loayer, the surface density of the Si atom of its deposition is 1 * 10
13Cm
-2Close Si stove shutter, open Ga stove shutter, at the GaAs of 590 ℃ of growth 30 nanometers.Close Ga stove shutter, reduce underlayer temperature.When underlayer temperature reaches 350 ℃, close As stove shutter, this has just finished the growth of the conductive material layer that has two-dimensional electron gas on the substrate.
Utilize the beamwriter lithography method preparation " overlay mark of " " font: the 1) substrate that will cover conductive material layer ultrasonic cleaning 5 minutes in triclene, acetone, absolute ethyl alcohol respectively; 2), remove conductive material layer surface steam 110 ℃ of bakings 30 minutes; 3) toasted 60 minutes at the electron beam resist PMMA that covers 160 nanometer thickness on the conductive material laminar surface and at 170 ℃ with sol evenning machine; 4) " " " word mark, its live width are 1 micron, and the length of side is 2000 microns to prepare symmetrical two with the electron beam photoetching process; 5) developed 30 seconds with hexone, and with isopropyl acetone photographic fixing 50 seconds; 6) cleaned 60 seconds with absolute ethyl alcohol and put eb evaporation chambers into; 7) vacuum tightness when vaporization chamber reaches 3 * 10
-4During pa, evaporate 50 nanometer Cr/300 nm of gold; 8) ultrasonic peeling off; 9) long-time UV exposure was developed 80 seconds more than 60 minutes and with hexone, and with isopropyl acetone photographic fixing 50 seconds to remove the electron beam resist of remnants.
Utilize the overlay mark location, adopt conventional photoetching process preparation in order to make the mask of table top, corrosion has the conductive material layer of overlay mark, erodes the part in the conductive material layer mask pattern, the outer conductive material layer of mask pattern is the table top of making device, and corrosive liquid is H
2SO
4: H
2O
2: H
2O=3: 1: 30.Its corrosion depth is 200 nanometers.
Utilize the overlay mark location, prepare the AZ1400 mask that is used to make source electrode 1 and drain electrode 2, deposition (Au on mask by conventional photoetching process
0.88Ge
0.12)
0.92Ni
0.8, in acetone, soaked 60 minutes, remove (Au outside the mask pattern through technology such as peeling off
0.88Ge
0.12)
0.92Ni
0.8, stay (the Au in the mask pattern
0.88Ge
0.12)
0.92Ni
0.8, deionized water ultrasonic cleaning 6 times, each 10 minutes.At N
2: H
2Alloy annealing in=3: 1 the mixed atmosphere, temperature is 410 ℃, the time is 50 seconds.At this moment stay (the Au in the mask pattern
0.88Ge
0.12)
0.92Ni
0.8Be source electrode 1 and drain electrode 2.
Directly preparation is in order to make the PMMA figure mask of one-dimensional wave guide 10 on conductive material layer 11 to utilize the beamwriter lithography method, and with wet etching method grooving 8 and groove 9, its corrosive liquid is H
2SO
4: H
2O
2: H
2O=6: 1: 30.Cut out the part that does not have mask on the conductive material layer 11, constitute groove 8 and groove 9, groove 8 and groove 9 cause the formation of the one-dimensional wave guide 10 that is connected source electrode 1 and drain electrode 2 in the conductive material layer 11, and its width is 190 nanometers, highly is 50 nanometers;
Utilize the overlay mark location, adopt the beamwriter lithography method on the conductive material layer 11 that has source electrode 1, drain electrode 2 and one-dimensional wave guide 10, to prepare in order to make the PMMA photoresist figure mask of lines grid, deposition 13 nanometer Ti/34 nanometer Au films on the photoresist figure mask of preparation, taking-up is made device and is put into solvent and soak, remove Ti/Au film outside the mask pattern through technology such as peeling off, stay the lines grid 5,6,4 and 7 in the mask pattern.
Lead-in wire has just been prepared the coulombmeter to the electric charge hypersensitization of the present invention after connecting.
Embodiment 3:
With selected sapphire (Al
2O
3) substrate 12 cleans repeatedly: 1) the triclene ultrasonic cleaning is 5 times, each 10 minutes; 2) the acetone water-bath is cleaned each 10 minutes 5 times; 3) the alcohol ultrasonic cleaning is 5 times, each 10 minutes; 4) the deionized water ultrasonic cleaning is 3 times, each 4 minutes.Cleaned and used H again
2SO
4: H
3PO
4=3: 1 corrosive liquid is removed sapphire Al
2O
3Substrate 12 lip-deep scars also make surfacing, and the temperature of its corrosive liquid is 160 ℃.With deionized water rinsing 3 times, each 8 minutes.Pull out after the flushing, dry up moisture, import process chamber into and heat-treat degasification: heating-up temperature is 450 ℃, and the time is 30 minutes.Temperature is imported substrate into the molecular beam epitaxial growth chamber after reducing to room temperature.Close the shutter of all stoves, the Sapphire Substrate 12 surface spray nitrogen that import the growth room after cleaning into are the nitrogenize of substrate, and its nitriding temperature is 800 ℃.Monitor the annealing process of AlN with high-energy electron diffraction (HEED), improve and keep underlayer temperature, after clear striped appears in the high-energy electron diffraction (HEED) pattern, reduce the temperature to the GaN of 820 ℃ of growth 2 micron thickness, temperature is raised to the Al of 850 ℃ of growth 10 nanometer thickness at 850 ℃
0.22Ga
0.78The Si-Al of N and 25 nanometer thickness
0.22Ga
0.78N, the doping content of its Si is 1 * 10
18Cm
-22 microns GaN that grown, 10 nanometer Al
0.22Ga
0.78N and 25 nanometer Si-Al
0.22Ga
0.78N is the conductive material layer that has two-dimensional electron gas 7 of growth on the Sapphire Substrate 12.
Utilize the overlay mark of beamwriter lithography method at preparation "+" font on the conductive material layer 11: 1) substrate that will cover conductive material layer respectively in triclene, acetone, absolute ethyl alcohol, ultrasonic cleaning 5 minutes; 2), remove conductive material layer surface steam 110 ℃ of bakings 30 minutes; 3) the usefulness sol evenning machine covers the electron beam resist PMMA of 160 nanometer thickness on the conductive material laminar surface, and 170 ℃ of bakings 60 minutes; 4) prepare symmetrical two "+" word mark with the electron beam photoetching process, the live width of forming two lines of "+" word mark all is 1 micron, and length all is 2000 microns; 5) developed 30 seconds with hexone, and with isopropyl acetone photographic fixing 50 seconds; 6) cleaned 60 seconds with absolute ethyl alcohol.Utilize the beamwriter lithography method on conductive material layer 11, to prepare in order to make the figure mask of "+" overlay mark and isolation table top.Utilize reactive ion etching to prepare overlay mark table top and device isolation table top, its etching gas is Cl
2, etching temperature is 120 ℃, etching depth is 50 nanometers.
Utilize the overlay mark of preparation, by the figure AZ1400 mask of conventional photoetching process preparation in order to making source electrode 1 and drain electrode 2, deposition 20 nanometer Ti/10 nanometer Al on figure AZ1400 mask, in acetone, soaked 60 minutes, remove Ti/Al outside the mask pattern through technology such as peeling off, stay the Ti/Al in the mask pattern, deionized water ultrasonic cleaning 5 times, each 8 minutes.At N
2Middle annealing 30 seconds, its temperature is 900 ℃.At this moment the Ti/Al that stays in the mask pattern is source electrode 1 and drain electrode 2.
Utilize the beamwriter lithography method directly to prepare on conductive material layer 11 in order to make the PMMA figure mask of one-dimensional wave guide 10, adopt reactive ion etching method grooving 8 and groove 9, its etching gas is Cl
2Cut out the part that does not have mask on the conductive material layer 11, constitute groove 8 and groove 9, groove 8 and groove 9 cause the formation of the one-dimensional wave guide 10 that is connected source electrode 1 and drain electrode 2 in the conductive material layer 11, and its width is 300 nanometers, highly is 30 nanometers.
Utilize the overlay mark location, adopt the beamwriter lithography method on the conductive material layer 11 that has source electrode 1, drain electrode 2 and one-dimensional wave guide 10, to prepare in order to make the photoresist figure mask of lines grid, deposition Au metal film on the photoresist figure mask of preparation, its Au thickness of metal film is 150 nanometers.Taking-up is made device and is put into solvent and soak.Remove metal film outside the mask pattern through technology such as peeling off, stay the lines grid 5,6,4 and 7 in the mask pattern.
Lead-in wire has just been prepared the coulombmeter to the electric charge hypersensitization of the present invention after connecting.
Embodiment 4:
Select the P type SOI substrate of (001) orientation for use, the oxygen burial layer among the SOI is the substrate 12 of preparation single-electronic transistor of the present invention, and the Si single crystal film on the SOI is conductive material layer 11.After known SOI substrate cleaning method cleaning, lead Si single crystal film 11 by oxidation repeatedly, corroding method attenuate, make its thickness reach 70 nanometers.Described oxidation is dry-oxygen oxidation (dry oxidation), at N
2: O
2Oxidation in=1: 1 the mixed atmosphere, its oxidizing temperature are 850 ℃.In volume ratio, use corrosive liquid HF: H
2O=1: 10 remove oxide layer.Apply bias voltage on the substrate, form the two-dimensional electron gas in the conductive material layer 11.
Utilize the beamwriter lithography method on the Si single crystal film 11 behind the attenuate, the photoresist PMMA mask of preparation band "+" word figure, with the low-priced method depositing metallic films of penetrating, its metal film is 50 nanometer Cr/300 nanometer W/50 nanometer Cr on band photoresist figure PMMA mask.Taking-up is made device and is put into solvent and soak.Remove Cr/W/Cr outside the mask pattern through technology such as peeling off, the Cr/W/Cr in the mask pattern that stays is the overlay mark of "+" word figure.The width of forming two lines of "+" word figure all is 1 micron, and length all is 2000 microns.
Having deposition 20 nanometer thickness SiO on the Si single crystal film 11 of overlay mark
2Si with 120 nanometer thickness
3N
4Utilize known reactive ion etching method to remove the Si of 120 outer nanometer thickness of active area
3N
4, use HF: H
2O=1: 10 corrosive liquids remove the 20 nanometer thickness SiO that expose
2, the Si single crystal film 11 that utilizes known wet-oxygen oxidation (wet oxidation) method oxidation to expose is realized the isolation of device and the table top of making device.
Having deposition 20 nanometer thickness SiO on the Si single crystal film 11 of overlay mark
2Si with 120 nanometer thickness
3N
4Utilize the overlay mark location, by the 20 nanometer thickness SiOs of photoetching process in deposition
2Si with 120 nanometer thickness
3N
4Last preparation is used for the mask that arsenic ion injects, and injects the 100keV arsenic ion to mask, and dosage is 8 * 10
15Cm
-2Arsenic ion is used undiluted H after injecting
3PO
4Boil the Si that removed 120 nanometer thickness in 38 minutes at 80 ℃
3N
4, use HF: H
2O=1: 10 corrosive liquids remove 20 nanometer thickness SiO
2At N
2: H
2Anneal in=2: 1 the mixed atmosphere, its temperature is 1080 ℃, is 7 seconds between annealing.
On conductive material layer 11, prepare in order to make the figure AZ1400 photoresist mask of source electrode 1 and drain electrode 2, the Al film of deposition 1 micron thickness on band photoresist figure mask with conventional photoetching process again.Taking-up is made device and is put into solvent and soak.Remove metal film outside the mask pattern through technology such as peeling off, stay the metal film in the mask pattern, the ECDC annealing of gold is source electrode 1 and drain electrode 2, and its annealing temperature is 430 ℃.
Utilize the overlay mark location, adopt the beamwriter lithography method directly the figure mask for preparing on the Si single crystal film 11 of overlay mark in order to making one-dimensional wave guide 10 being arranged, its mask material is the PMMA of 180 nanometer thickness.The etching method of utilizing the electron cyclotron resonace dry method is at SF
6Atmosphere and 120 ℃ of etchings have the Si single crystal film 11 of figure mask, will not have the partial etching of mask to fall on the Si single crystal film 11, form groove 8 and groove 9.Groove 8 causes Si single crystal film 11 to form the one-dimensional wave guide 10 that is connected source electrode 1 and drain electrode 2 with groove 9, and its etching depth is 70 nanometers, and the width of formed one-dimensional wave guide 10 is 350 nanometers.
Utilize the overlay mark location, adopt the beamwriter lithography method on the Si single crystal film 11 that has source electrode 1 and drain electrode 2 and one-dimensional wave guide 10, to prepare in order to make the photoresist figure mask of lines grid, deposition 60 nanometer Al films on the photoresist figure mask of preparation, taking-up is made device and is put into solvent and soak.Remove Al film outside the mask pattern through technology such as peeling off, stay the lines grid 5,6,4 and 7 in the mask pattern.
Lead-in wire connects, and just prepares the coulombmeter to the electric charge hypersensitization of the present invention.
Claims (21)
1. the coulombmeter to the electric charge hypersensitization is characterized in that: source electrode (1) and drain electrode (2) are arranged in the conductive material layer (11) on substrate (12); Groove (8) and groove (9) have been located in source electrode (1) and drain electrode (2) in conductive material layer (11), and the table top between groove (8) and the groove (9) forms the one-dimensional wave guide (10) that connects source electrode (1) and drain electrode (2); Deposit tunneling barrier lines grid (5), (6) and probe lines grid (7) on one-dimensional wave guide (10), the one-dimensional wave guide between tunneling barrier lines grid (5) and (6) is quantum dot (3), has located sideline bar grid (4) at the quantum dot (3) of one-dimensional wave guide.
2. the coulombmeter to the electric charge hypersensitization as claimed in claim 1 is characterized in that: the width of described one-dimensional wave guide (10) is the 3-800 nanometer.
3. the coulombmeter to the electric charge hypersensitization as claimed in claim 1 is characterized in that: described substrate further is coated with the buffering epitaxial loayer on (12).
4. the coulombmeter to the electric charge hypersensitization as claimed in claim 3 is characterized in that: described buffering epitaxial loayer is 1) Si, Ge or GeSi semiconductor element cellulosic material; 2) GaN, NAlGaAs, NInGaAs, NAlGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or InAlGaAs semiconducting compound; 3) by silicon, phosphonium ion, nitrogen ion, arsenic ion, oxonium ion or the boron fluoride ion doping compound substance in Si, Ge, GeSi, GaN, NAlGaAs, NInGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or the InAlGaAs semiconductor material; 4) above-mentioned 1), 2) and 3) but described grating constant is close and the material of combination in any; 5) monox, aluminium oxide, silicon nitride or titanium dioxide insulating material.
5. the coulombmeter to the electric charge hypersensitization as claimed in claim 1 is characterized in that: described substrate is 1) silicon on the semiconducting insulation body; 2) oxide material; 3) glass, SiC, Ge, silicon or the monocrystalline silicon of one deck oxide is arranged on silicon face; 4) semiconductor material of semiconductor material of Can Zaing or non-doping.
6. the coulombmeter to the electric charge hypersensitization as claimed in claim 5 is characterized in that: described oxide material is Al
2O
3, monox, magnesium oxide or strontium titanates.
7. the coulombmeter to the electric charge hypersensitization as claimed in claim 5 is characterized in that: the semiconductor material of described non-doping is GaAs, Cr-GaAs, Si or InP; The semiconductor material that mixes is N
+-GaAs, N
+-InP or N
+-GaN.
8. the coulombmeter to the electric charge hypersensitization as claimed in claim 1 is characterized in that: described conductive material is 1) Si, Ge or SiGe semiconductor element cellulosic material; 2) GaN, NAlGaAs, NInGaAs, NAlGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or InAlGaAs semiconducting compound; 3) by silicon, magnesium, phosphonium ion, nitrogen ion, arsenic ion, oxonium ion or the boron fluoride ion doping compound substance in Si, Ge, SiGe, GaN, NAlGaAs, NInGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or the InAlGaAs semiconductor material; 4) above-mentioned 1), 2) and 3) but described grating constant is close and the material of combination in any.
9. the coulombmeter to the electric charge hypersensitization as claimed in claim 1 is characterized in that: described tunneling barrier lines grid, probe lines grid and sideline bar grid are Al, Au, W, Cr, Ti, Ni, Pt, Ge, Ta or Mo metal level and any composite bed between them.
10. as the preparation method of the described coulombmeter to the electric charge hypersensitization of claim 1-9, it is characterized in that: this preparation method may further comprise the steps:
Method 1
1) initial substrates is cleaned repeatedly, after having cleaned, remove the lip-deep scar of initial substrates with corrosive liquid; Clean, remove substrate moisture content,, obtain accurately machined substrate (12) then to the substrate degasification; Utilize oxidation or deposition process, go up at accurately machined substrate (12) and cover one deck buffering epitaxial loayer;
2) utilize oxidation, corrosion or deposition process, directly go up or on the buffering epitaxial loayer on the substrate (12), cover conductive material layer (11), utilize body doping, modulation doping or applying bias to cause electron gas in the conductive material layer at accurately machined substrate (12);
3) go up the part table top, the groove of corrosion or the film of deposition that utilize corrosion to form at conductive material layer (11) and be used as overlay mark;
4) utilize the overlay mark location, adopt the conventional method preparation in order to make the mask of table top, corrosion has the conductive material layer (11) of overlay mark, erodes the part in conductive material layer (11) mask pattern, and the outer conductive material layer (11) of mask pattern is the table top of making device; Described corrosion is dry etching or wet etching;
5) utilize overlay mark location, prepare mask, by depositing metallic films, peel off with the alloy annealing steps and during having the conductive material layer of table top (11), prepare source electrode (1) and drain (2) with conventional method;
6) utilize the overlay mark location, adopt conventional method directly to go up preparation in order to make the figure mask of one-dimensional wave guide (10) at conductive material layer (11), utilize dry corrosion method or wet corrosion method cut out does not have mask on the conductive material layer (11) part then, constitute groove (8) and groove (9), groove (8) and groove (9) cause being connected source electrode (1) and the formation of the one-dimensional wave guide (10) of drain (2) in the conductive material layer 11;
7) utilize the overlay mark location, go up preparation photoresist figure mask, depositing metallic films on the photoresist figure mask of preparation at the conductive material layer (11) that has source electrode (1), drain electrode (2) and one-dimensional wave guide (10); Taking-up is made device and is put into solvent and soak, and the metal film outside stripping technology removes mask pattern stays lines grid (5), (6), (4) and (7) in the mask pattern;
8) connect the coulombmeter of preparing the electric charge hypersensitization through lead-in wire; Or method 2
1) selects the material that on substrate (12), has been coated with conductive material layer (11) for use, by oxidation repeatedly, corroding method attenuate conductive material layer (11); Utilize body doping, modulation doping or applying bias to cause electron gas in the conductive material layer;
2) on the conductive material layer behind the attenuate (11), the part table top, the groove of corrosion or the film of deposition that utilize corrosion to form are used as overlay mark;
3) utilize the overlay mark location, adopt conventional method to prepare mask, corrosion has the conductive material layer (11) of overlay mark, erode the part in conductive material layer (11) mask pattern, the outer conductive material layer (11) of mask pattern is the table top of making device, and described corrosion is dry etching or wet etching;
4) utilize overlay mark location, go up preparation and be used for the mask that ion injects having the conductive material layer of overlay mark (11), after ion injects, remove and be used for the mask that ion injects, the element that high-temperature annealing activation is injected, its annealing temperature is 500-1200 ℃;
5) utilize the overlay mark location, go up the figure photoresist mask that preparation is used to make source electrode (1) and drain electrode (2), depositing metallic films on band photoresist figure mask at accurately machined conductive material layer (11); Taking-up is made device and is put into solvent and soak, and the metal film outside stripping technology removes mask pattern stays the metal film in the mask pattern, and the ECDC annealing of gold is source electrode (1) and drain electrode (2);
6) utilize the overlay mark location, directly go up preparation in order to make the figure mask of one-dimensional wave guide (10) at conductive material layer (11), utilize dry corrosion method or wet corrosion method cut out does not have mask on the conductive material layer (11) part, constitute groove (8) and groove (9), groove (8) and groove (9) cause being connected source electrode (1) and the formation of the one-dimensional wave guide (10) of drain (2) in the conductive material layer (11);
7) utilize the overlay mark location, go up preparation photoresist figure mask, depositing metallic films on the photoresist figure mask of preparation at the conductive material layer (11) that has source electrode (1), drain electrode (2) and one-dimensional wave guide (10); Taking-up is made device and is put into solvent and soak, and the metal film outside stripping technology removes mask pattern stays the lines grid 5,6,4 and 7 in the mask pattern;
8) connect the coulombmeter of preparing the electric charge hypersensitization through lead-in wire.
11. the preparation method of the coulombmeter to the electric charge hypersensitization as claimed in claim 10, it is characterized in that: described corrosive liquid is (in volume ratio) H
2SO
4: H
2O
2: H
2O=1-100: 1-60: 1-500, NH
4OH: H
2O
2: H
2O=1-100: 1-60: 1-5000, H
3PO
4: H
2O
2: H
2O=1-100: 1-60: 1-500, H
2SO
4: H
3PO
4: H
2O=1-100: 1-60: 0-500, KOH: H
2O=1-100: 1-5000, NaOH: H
2O=1-100: 1-5000, HF: H
2O=1-100: 1-5000 or HCl: H
2The solution of O=1-100: 1-5000.
12. the preparation method of the coulombmeter to the electric charge hypersensitization as claimed in claim 10, it is characterized in that: described buffering epitaxial loayer is 1) Si, Ge or GeSi semiconductor element cellulosic material; 2) GaN, NAlGaAs, NInGaAs, NAlGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or InAlGaAs semiconducting compound; 3) by silicon, phosphonium ion, nitrogen ion, arsenic ion, oxonium ion or the boron fluoride ion doping compound substance in Si, Ge, GeSi, GaN, NAlGaAs, NInGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or the InAlGaAs semiconductor material; 4) above-mentioned 1), 2) and 3) but described grating constant is close and the material of combination in any; 5) monox, aluminium oxide, silicon nitride or titanium dioxide insulating material.
13. the preparation method of the coulombmeter to the electric charge hypersensitization as claimed in claim 10, it is characterized in that: described conductive material is 1) Si, Ge or SiGe semiconductor element cellulosic material; 2) GaN, NAlGaAs, NInGaAs, NAlGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or InAlGaAs semiconducting compound; 3) by silicon, magnesium, phosphonium ion, nitrogen ion, arsenic ion, oxonium ion or the boron fluoride ion doping compound substance in Si, Ge, SiGe, GaN, NAlGaAs, NInGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or the InAlGaAs semiconductor material; 4) above-mentioned 1), 2) and 3) but described grating constant is close and the material of combination in any.
14. the preparation method of the coulombmeter to the electric charge hypersensitization as claimed in claim 10, it is characterized in that: the film of the described deposition of step 7) in the step 3) in the method 1, step 7) or the method 2 is Al, Au, W, Cr, Ti, Ni, Pt, Ge, Ta or Mo metal level and any composite bed between them.
15. the preparation method of the coulombmeter to the electric charge hypersensitization as claimed in claim 10, it is characterized in that: the metal film of the described deposition of step 5) in method 1 or the method 2 is Pd, Zr, Ag, Gd, Al, Ni, Au, W, Cr, Ti, Ni, Pt, Ge, Ta, In or Mo metal level and any composite bed between them.
16. the preparation method of the coulombmeter to the electric charge hypersensitization as claimed in claim 10, it is characterized in that: the described annealing conditions of the step 5) in the method 1 is at N
2: H
2Alloy annealing in the mixed atmosphere of=1-900: 0-500, temperature is 300-1200 ℃.
17. the preparation method of the coulombmeter to the electric charge hypersensitization as claimed in claim 10, it is characterized in that: described mask material is 1) PMMA, ZEP, AZ or SAL photoresist, 2) Al, Ni, Au, W, Cr, Ti, Ni, Pt, Ge, Ta or Mo metal level and any composite bed between them, 3) monox, aluminium oxide, silicon nitride or titanium dioxide insulating material.
18. the preparation method of the coulombmeter to the electric charge hypersensitization as claimed in claim 10 is characterized in that: the step 2 method 2)) described film comprises metal level and any composite beds between them such as metal W, Cr, Pt, Ta or Mo.
19. the preparation method of the coulombmeter to the electric charge hypersensitization as claimed in claim 10, it is characterized in that: the described oxidizing condition of the step 1) method 2) is at (in volume ratio) N
2: O
2Oxidation in the mixed atmosphere of=0-900: 1-500, oxidizing temperature are 350-1200 ℃; Etching condition is with corrosive liquid (in volume ratio) HF: H
2O=1-100: 1-5000 or HCl: H
2O=1-100: 1-5000 removes oxide layer.
20. the preparation method of the coulombmeter to the electric charge hypersensitization as claimed in claim 10, it is characterized in that: the described injection element of the step 4) method 2) is silicon, phosphonium ion, nitrogen ion, arsenic ion, oxonium ion, nitrogen ion or boron fluoride ion.
21. the preparation method of the coulombmeter to the electric charge hypersensitization as claimed in claim 10, it is characterized in that: the described alloy annealing temperature of the step 5) in the method 2 is 300-800 ℃.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB011019441A CN1170318C (en) | 2001-01-18 | 2001-01-18 | Coulometer with supersensitivity to charge and its preparing process |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101359683B (en) * | 2007-08-01 | 2011-05-04 | 中国科学院半导体研究所 | Silicon based single electron device having double quantum point contact construction and producing method thereof |
| CN102751184A (en) * | 2012-07-20 | 2012-10-24 | 中国科学院上海微系统与信息技术研究所 | Method for reducing surface roughness of Si |
-
2001
- 2001-01-18 CN CNB011019441A patent/CN1170318C/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101359683B (en) * | 2007-08-01 | 2011-05-04 | 中国科学院半导体研究所 | Silicon based single electron device having double quantum point contact construction and producing method thereof |
| CN102751184A (en) * | 2012-07-20 | 2012-10-24 | 中国科学院上海微系统与信息技术研究所 | Method for reducing surface roughness of Si |
| CN102751184B (en) * | 2012-07-20 | 2015-05-06 | 中国科学院上海微系统与信息技术研究所 | Method for reducing surface roughness of Si |
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|---|---|
| CN1170318C (en) | 2004-10-06 |
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