CN1170319C

CN1170319C - Coulometer with self calibration function and supersensitivity to charge and its preparing process

Info

Publication number: CN1170319C
Application number: CNB01101945XA
Authority: CN
Inventors: 王太宏
Original assignee: Institute of Physics of CAS
Current assignee: Institute of Physics of CAS
Priority date: 2001-01-18
Filing date: 2001-01-18
Publication date: 2004-10-06
Anticipated expiration: 2021-01-18
Also published as: CN1366179A

Abstract

The present invention belongs to microelectronic devices and micro processing methods, which particularly relates to a charge super-sensitive coulometer with the self calibration function and a preparing method thereof. Tow source electrodes and two drain electrodes are respectively arranged in a conducting material layer on a substrate, the points of the source electrodes and the drain electrodes of the conducting material layer are respectively provided with two slots, a one-dimensional waveguide for connecting one source electrode with one drain electrodes is formed at a table board between two of the slots, and the width of each one-dimensional waveguide ranges from 3 to 800 nanometers. A line gate is deposited on one one-dimensional waveguide, and a suspension gate 23 for connecting quantum points 5 and 6 with each other is positioned at the points of the quantum points 5 and 6 of the one-dimensional waveguides. The present invention can be used for detecting 0.01% of electron charge.

Description

Have self-calibration function to Coulomb meter of electric charge hypersensitization and preparation method thereof

Technical field

The invention belongs to microelectronic component and micro-processing method, nano-device and nanoprocessing method, particularly relate to a kind of Coulomb meter that self-calibration function is arranged, and utilize micro-processing technology, nanofabrication technique to prepare the method for this device the electric charge hypersensitization.

Background technology

The speed of Nano-technology Development is very fast, and microelectronic component will be replaced, partly be replaced at least by nano-device in the near future.Now succeed and obtain the nano-device that everybody generally acknowledges single-electronic transistor and single-electron memory are arranged.We can say that single-electronic transistor is most promising nano-device.The conditional electronic transistor is realized functions such as switch, vibration and amplification by the collective motion of the electronics in groups of control more than ten million; The behavior that single-electronic transistor then needs only by an electronics just can realize specific function.Along with the raising of integrated level, power consumption has become the restraining factors of microelectronic device circuits stability.The element that constitutes with single-electronic transistor can improve microelectronic integrated level greatly and can make power consumption be reduced to 10 ^-5Single-electronic transistor so extremely low power consumption can solve the destabilizing factor problem that causes because of heat radiation in the existing integrated circuit.Its Highgrade integration degree can surmount the limit of present large scale integration far away, and can reach the limit that Heisenberg's uncertainty principle sets and become in the future can not substituted new device.In addition, along with the raising of microelectronic component integrated level, the unit component size constantly reduces, and contained electron number also constantly reduces.When the system unit electron number is less than 10,1 electronics of every fluctuation, the change of electron number is greater than 10% in the system, and the fluctuation of electron number will have a strong impact on the stability of integrated circuit.The unique channel that now addresses this problem is exactly: replace traditional device with single-electron device, and realize that it is integrated.

The integrated wireless coupling (" Applied Physics wall bulletin " Appl.Phys.Lett., 1996,69,406) that will depend on each former device of single-electronic transistor, these are different with traditional large scale integrated circuit principle.Integration principle based on this single-electron device, people such as Nakazato (" electronics wall bulletin " Electrinics Letters, 1993,29, " 384. Japanese Applied Physics wall bulletin " Jpn.J.Appl.Phys.Part 1,1995,34,700) single-electron memory and the single electron logical circuit of memory function have been realized having.They realize the integrated of single-electron device by coupling of the tunnelling between single-electronic transistor and capacitive coupling.The integrated electronic device that goes out of this integrated approach has following deficiency: 1) the quantum dot size is uncertain and fluctuation is serious, 2) number of quantum dot can't determine 3) barrier height of quantum dot is uncontrollable, unadjustable, and 4) stiffness of coupling between quantum dot is unadjustable.Thereby integrated single-electron device, the single electron circuit that goes out of this integrated approach has complicated difficult control and unsettled shortcoming.People such as Duncan (Appl.Phys.Lett.1999,74,1045) utilize surperficial grid depletion technology to realize the integrated of two single-electronic transistors, but existing capacitive coupling has the tunnelling coupling again between these two single-electronic transistors, and can not be the fully independent control of these two kinds of couplings, this makes integrated two single-electronic transistors that go out that the shortcoming of complicated difficult control be arranged.

Summary of the invention

One of purpose of the present invention is to overcome the defective of the above-mentioned integrated electronic device that goes out, and based on the coulomb blockade principle, provides a kind of Coulomb meter to the electric charge hypersensitization that self-calibration function is arranged that utilizes the integrated realization of single-electronic transistor.This have the Coulomb meter to the electric charge hypersensitization of self-calibration function can be used for surveying ten thousand/ electron charge, also can be used for surveying the superweak electric current that can't measure with known technology, comprise direct current, alternating current.

A further object of the present invention provides a kind of method to the Coulomb meter of electric charge hypersensitization of utilizing the preparation of micro-processing technology, nanofabrication technique that self-calibration function is arranged.

The present invention is by the quantum dot of table top restriction that mixes and lines grid depletion technology realization single-electronic transistor, between quantum dot again the capacitive coupling by the suspension grid all single-electronic transistors are integrated.Utilize this integrated approach, two single-electronic transistors are integrated by suspension grid, just constituted the Coulomb meter that self-calibration function is arranged the electric charge hypersensitization.There is the Coulomb meter to the electric charge hypersensitization of self-calibration function to be actually two integrated to the Coulomb meter of electric charge hypersensitization, can calibrate mutually between them, the state of the quantum dot separately of diagnosable two single-electronic transistors comprises that wherein electron number, energy level distribute and the electronic spin distribution.It is having important application aspect the detection of electronic logic circuit, memory, single photon detection and biological neuroelectricity.This Coulomb meter is detectable ten thousand/ electron charge, can aspect the detection of electronic logic circuit research, nano-device, single photon detection and biological neuroelectricity important application arranged.

Of the present invention have self-calibration function to the Coulomb meter of electric charge hypersensitization as shown in Figure 2:

First source electrode 1, second source electrode 2 and first drain electrode, 3, second drain electrode 4 are arranged in the conductive material layer 24 on substrate 25; First source electrode 1 and first drain electrode, 3 places at conductive material layer 24 have the table top between first groove 13 and second groove, 15, the first grooves 13 and second groove 15 to form first one-dimensional wave guide 17 that connects first source electrode 1 and first drain electrode 3, and its width is the 3-800 nanometer; At first one-dimensional wave guide 17 that deposits on first one-dimensional wave guide 17 between the first tunneling barrier lines grid 19 and the second tunneling barrier lines grid, 21, the first tunneling barrier lines grid 19 and the second tunneling barrier lines grid 21 is first quantum dot 5; There are the first lines grid 7 at first quantum dot, 5 places at first one-dimensional wave guide 17.

Second source electrode 2 and second drain electrode, 4 places at conductive material layer 24 have the table top between three-flute 14 and the 4th groove 16, the three-flutes 14 and the 4th groove 16 to form second one-dimensional wave guide 18 that connects second source electrode 2 and second drain electrode 4, and its width is the 3-800 nanometer; At second one-dimensional wave guide 18 that deposits on second one-dimensional wave guide 18 between the 3rd tunneling barrier lines grid 20 and the 4th tunneling barrier lines grid 22, the three tunneling barrier lines grid 20 and the 4th tunneling barrier lines grid 22 is second quantum dot 6; There are the second lines grid 8 at second quantum dot, 6 places at second one-dimensional wave guide 18.

At second quantum dot, 6 places of first quantum dot 5 and second one-dimensional wave guide 18 of first one-dimensional wave guide 17, the suspension grid 23 that connect first quantum dot 5 and second quantum dot 6 are arranged.

First source electrode 1, first drain electrode, 3, first one-dimensional wave guide 17, first quantum dot 5, the first tunneling barrier lines grid 19, the second tunneling barrier lines grid 21, the first lines grid 7 constitute single-electronic transistor 1; Second source electrode 2, second drain electrode, 4, second one-dimensional wave guide 18, second quantum dot 6, the 3rd tunneling barrier lines grid 20, the 4th tunneling barrier lines grid 22, the second lines grid 8 constitute single-electronic transistor 2.Apply back bias voltage respectively on the first tunneling barrier lines grid 19 and the second tunneling barrier lines grid 21, form first tunnel junctions 9 of single-electronic transistor 1, second tunnel junctions 11, and first one-dimensional wave guide 17 is divided into 3 sections, in the middle of this one section promptly first one-dimensional wave guide 17 between the first tunneling barrier lines grid 19 and the second tunneling barrier lines grid 21 be first quantum dot 5, the first lines grid 7 are in order to regulate, control electron number in first quantum dot 5 as sideline bar grid, or in order to being of coupled connections of detected object as the probe that self-calibration function is arranged to the Coulomb meter of electric charge hypersensitization; Apply back bias voltage respectively on the 3rd tunneling barrier lines grid 20 and the 4th tunneling barrier lines grid 22, form the 3rd tunnel junctions 10 of single-electronic transistor 2, the 4th tunnel junctions 12, and second one-dimensional wave guide 18 is divided into 3 sections, in the middle of this one section promptly second one-dimensional wave guide 18 between the 3rd tunneling barrier lines grid 20 and the 4th tunneling barrier lines grid 22 be second quantum dot 6, the second lines grid 8 are in order to regulate, control electron number in second quantum dot 6 as sideline bar grid, or in order to being of coupled connections of detected object as the probe that self-calibration function is arranged to the Coulomb meter of electric charge hypersensitization; Suspension grid 23 connect first quantum dot 5 and second quantum dot 6, and realize the capacitive coupling of single-electronic transistor 1 and single-electronic transistor 2.

On substrate, can further cover the buffering epitaxial loayer that following material is made: 1) Si, Ge or GeSi semiconductor element cellulosic material; 2) GaN, NAlGaAs, NInGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or InAlGaAs semiconducting compound; 3) be doped to composite material in Si, Ge, GeSi, GaN, NAlGaAs, NInGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or the InAlGaAs semi-conducting material by silicon, phosphonium ion, nitrogen ion, arsenic ion, oxonium ion or boron fluoride ion etc.; 4) above-mentioned 1), 2) and 3) but described lattice constant is close and the material of combination in any; 5) insulating material such as silica, aluminium oxide, silicon nitride or titanium oxide.These buffering epitaxial loayers can further improve the quality of conductive material layer.If the buffering epitaxial loayer is a non-doped layer, it can be used as the insulating barrier of doped substrate and conductive material layer, to stop the generation of leakage current.The buffering epitaxial loayer can be identical with the various materials that constitute conductive material layer, but the combination of material is inequality, and structure is also inequality.

Described substrate can be 1) silicon (being SOI) on the semiconducting insulation body; 2) oxide material is as sapphire Al ₂O ₃, silicon oxide sio ₂, magnesium oxide MgO or strontium titanates SrTiO ₃Deng; 3) glass, SiC, Ge, silicon or the monocrystalline silicon of one deck oxide is arranged on silicon face; 4) semi-conducting material of semi-conducting material of Can Zaing or non-doping is GaAs, Cr-GaAs, Si or InP etc. as the semi-conducting material of non-doping; The semi-conducting material that mixes is N ⁺GaAs, N ⁺-InP or N ⁺-GaN etc.

Described electric conducting material comprises 1) Si, Ge or SiGe semiconductor element cellulosic material; 2) GaN, NAlGaAs, NInGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or InAlGaAs semiconducting compound; 3) be doped to composite material in Si, Ge, SiGe, GaN, NAlGaAs, NInGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or the InAlGaAs semi-conducting material by silicon, magnesium, phosphonium ion, nitrogen ion, arsenic ion, oxonium ion or boron fluoride ion etc.; 4) above-mentioned 1), 2) and 3) but described lattice constant is close and the material of combination in any.

Described tunneling barrier lines grid, lines grid or suspension grid comprise metal level and any composite beds between them such as Al, Au, W, Cr, Ti, Ni, Pt, Ge, Ta or Mo.

The preparation method to the Coulomb meter of electric charge hypersensitization that self-calibration function is arranged of the present invention may further comprise the steps, in volume ratio:

Method 1

(1) preparation of substrate 25.Adopt ultrasonic and organic solvent water-bath that initial substrates is cleaned repeatedly, remove dust, greasy dirt and pollutant etc. on the initial substrates, after having cleaned, use H ₂SO ₄: H ₂O ₂: H ₂O=1-100: 1-60: 1-5000, NH ₄OH: H ₂O ₂: H ₂O=1-100: 1-60: 1-5000, H ₃PO ₄: H ₂O ₂: H ₂O=1-100: 1-60: 1-5000 or H ₂SO ₄: H ₃PO ₄: H ₂O=1-100: 1-60: corrosive liquids such as 0-500 are removed the lip-deep scar of initial substrates, make the initial substrates surfacing; Clean, remove substrate moisture content, then substrate is put into process chamber and carried out bake out, obtain accurately machined substrate 25; Utilize oxidation or deposition process, on accurately machined substrate 25, can cover one deck buffering epitaxial loayer;

Described buffering epitaxial loayer is: 1) Si, Ge or GeSi semiconductor element cellulosic material; 2) GaN, NAlGaAs, NInGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or InAlGaAs semiconducting compound; 3) be doped to composite material in Si, Ge, GeSi, GaN, NAlGaAs, NInGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or the InAlGaAs semi-conducting material by silicon, phosphonium ion, nitrogen ion, arsenic ion, oxonium ion or boron fluoride ion etc.; 4) above-mentioned 1), 2) and 3) but described lattice constant is close and the material of combination in any; 5) insulating material such as silica, aluminium oxide, silicon nitride or titanium oxide.

(2) utilize oxidation, corrosion or deposition process, directly covering conductive material layer 24 on the accurately machined substrate 25 or on the buffering epitaxial loayer on the substrate 25, utilize body doping, modulation doping or applying bias to cause electron gas in the conductive material layer, electron gas is the 2-300 nanometer to the distance of conductive material layer upper surface.

Electric conducting material comprises 1) Si, Ge or SiGe semiconductor element cellulosic material; 2) GaN, NAlGaAs, NInGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or InAlGaAs semiconducting compound; 3) be doped to composite material in Si, Ge, SiGe, GaN, NAlGaAs, NInGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or the InAlGaAs semi-conducting material by silicon, magnesium, phosphonium ion, nitrogen ion, arsenic ion, oxonium ion or boron fluoride ion etc.; 4) above-mentioned 1), 2) and 3) but described lattice constant is close and the material of combination in any.

(3) on conductive material layer 24, utilize preparation overlay marks such as conventional photoetching process, X-ray lithography method, electron beam lithography method, ion beam lithography method, phase shift mask lithography method, part table top, the groove of corrosion or the film (comprising metal film) of deposition etc. that can utilize corrosion to form are used as overlay mark; Its metal film is metal level and any composite beds between them such as Al, Au, W, Cr, Ti, Ni, Pt, Ge, Ta or Mo.

(4) utilize the overlay mark location, adopt conventional photoetching process preparation in order to make the mask of table top, corrosion has the conductive material layer 24 of overlay mark, erode the part in conductive material layer 24 mask patterns, the outer conductive material layer 24 of mask pattern is the table top of making device, described corrosion can be known dry etching or wet etching, and wherein: described wet etching liquid is H ₂SO ₄: H ₂O ₂: H ₂O=1-100: 1-60: 1-500, NH ₄OH: H ₂O ₂: H ₂O=1-100: 1-60: 1-5000, H ₂SO ₄: H ₃PO ₄: H ₂O=1-100: 1-60: 0-500 or H ₃PO ₄: H ₂O ₂: H ₂The solution of O=1-100: 1-60: 1-5000.

(5) utilize overlay mark location, prepare mask, by metal film deposition, peel off and step such as annealing prepare first source electrode 1, second source electrode 2 and first and drains and 3, second drain 4 in the conductive material layer 24 that has table top with conventional photoetching.The deposit metal films material comprises metal level and any composite beds between them such as Pd, Zr, Ag, Gd, Al, Ge, Ni, Au, W, Cr, Ti, Pt, Ge, Ta, In or Mo.Peel off in solvent and carry out ultrasonic cleaning.Annealing conditions is at N ₂: H ₂Alloy annealing in the mixed atmosphere of=1-900: 0-500, temperature is 300-1200 ℃.

(6) utilize the overlay mark location, adopt conventional photoetching process, X-ray lithography method, electron beam lithography method, ion beam lithography method or phase shift mask lithography method etc. directly on conductive material layer 24, to prepare in order to make the figure mask of first one-dimensional wave guide 17 and second one-dimensional wave guide 18, its mask material comprises 1) photoresist such as PMMA, ZEP, AZ or SAL, 2) metal level and any composite beds between them such as Al, Ge, Ni, Au, W, Cr, Ti, Pt, Ta or Mo, 3) insulating material such as silica, aluminium oxide, silicon nitride or titanium oxide.Utilize dry corrosion method or wet corrosion method in conductive material layer 24, to dig first groove 13, second groove 15, three-flute 14 and the 4th groove 16, cut out the part that does not have mask on the conductive material layer 24, constitute first groove 13, second groove 15, three-flute 14 and the 4th groove 16, first groove 13, second groove 15 cause connection first source electrode 1 in the conductive material layer 24 and the formation of first drain electrode, 3 first one-dimensional wave guide 17, its width is the 2-800 nanometer, highly is the 1-150 nanometer; Three-flute 14 and the 4th groove 16 cause the formation of second one-dimensional wave guide 18 that is connected second source electrode 2 and second drain electrode 4 in the conductive material layer 24, and its width is the 2-800 nanometer, highly is the 1-150 nanometer.

(7) utilize the overlay mark location, adopt conventional photoetching process, X-ray lithography method, electron beam lithography method, ion beam lithography method, phase shift mask lithography method, preparation is in order to make the photoresist figure mask of lines grid on the conductive material layer 24 that has first source electrode 1 and second source electrode 2, first drain electrode, 3 and second drain electrode 4, first one-dimensional wave guide 17 and second one-dimensional wave guide 18, depositing metallic films on the photoresist figure mask of preparation, its thickness of metal film is the 10-150 nanometer.The metal film of deposition comprises Al, Au, W, Cr, Ti, Ni, Pt, Ge, Ta or Mo and any composite bed between them.Taking-up is made device and is put into solvent and soak, remove metal film outside the mask pattern through technology such as peeling off, stay the first tunneling barrier lines grid 19, the first lines grid 7, the second tunneling barrier lines grid 21, suspension grid 23, the 3rd tunneling barrier lines grid 20, the second lines grid 8 and the 4th tunneling barrier lines grid 22 in the mask pattern.

(8) prepare the Coulomb meter that self-calibration function is arranged of the present invention through the lead-in wire connection to the electric charge hypersensitization.

Solvent for use is an acetone.

Method 2

(1) selects the material that on substrate 25, has been coated with conductive material layer 24 for use, by oxidation repeatedly, corroding method attenuate conductive material layer 24.At N ₂: O ₂Oxidation in the mixed atmosphere of=0-900: 1-500, its oxidizing temperature are 350-1200 ℃.Use corrosive liquid HF: H ₂O=1-100: 1-5000 or HCl: H ₂O=1-100: 1-5000 removes oxide layer.Reoxidize, corrosion again reaches the 2-300 nanometer up to the thickness of conductive material layer 24.Utilize body doping, modulation doping or applying bias to cause electron gas in the conductive material layer, electron gas is the 2-300 nanometer to the distance of conductive material layer upper surface.

(2) on the conductive material layer behind the attenuate 24, utilize preparation overlay marks such as conventional photoetching process, X-ray lithography method, electron beam lithography method, ion beam lithography method or phase shift mask lithography method, part table top, the groove of corrosion or the film (comprising metal film) of deposition etc. that can utilize corrosion to form are used as overlay mark; Its metal film is metal level and any composite beds between them such as W, Cr, Pt, Ta or Mo.

(3) utilize the overlay mark location, adopt conventional photoetching process to prepare mask, corrosion has the conductive material layer 24 of overlay mark, erode the part in conductive material layer 24 mask patterns, the outer conductive material layer 24 of mask pattern is the table top of making device, described corrosion can be known dry etching or wet etching, and wherein: described wet etching liquid is H ₂SO ₄: H ₂O ₂: H ₂O=1-100: 1-60: 1-500, NH ₄OH: H ₂O ₂: H ₂O=1-100: 1-60: 1-5000, H ₃PO ₄: H ₂O ₂: H ₂O=1-100: 1-60: 1-500, KOH: H ₂O=1-100: 1-5000, NaOH: H ₂O=1-100: 1-5000, HF: H ₂O=1-100: 1-5000 or HCl: H ₂The solution of O=1-100: 1-5000.

(4) utilize the overlay mark location, on the conductive material layer 24 that has overlay mark, prepare the mask that is used for the ion injection by photoetching process, its mask material comprises 1) photoresist such as PMMA, ZEP, AZ or SAL, 2) metal level and any composite beds between them such as Al, Ge, Ni, Au, W, Cr, Ti, Pt, Ta or Mo, 3) insulating material such as silica, aluminium oxide, silicon nitride or titanium oxide.Inject element to mask, wherein, the element of injection comprises silicon, phosphonium ion, nitrogen ion, arsenic ion, oxonium ion or boron fluoride ion etc.After ion injects, remove the mask that is used for the ion injection, the element that high-temperature annealing activation is injected, its annealing temperature is 500-1200 ℃, the time is 5-3600 second.

(5) utilize the overlay mark location, on accurately machined conductive material layer 24, prepare in order to make the figure photoresist mask of first source electrode 1, second source electrode 2 and first drain electrode, 3, second drain electrode 4 by photoetching, depositing metallic films on band photoresist figure mask, its thickness of metal film is the 5-900 nanometer.The metal film of deposition comprises Pd, Zr, Ag, Gd, Al, Ge, Ni, Au, W, Cr, Ti, Pt, Ta or Mo and any composite bed between them.Taking-up is made device and is put into solvent and soak.Remove metal film outside the mask pattern through technology such as peeling off, the metal film in the mask pattern that stays, ECDC annealing of gold are first source electrode 1, second source electrode 2 and first drain electrode, 3, second drain electrode 4, and its annealing temperature is 300-800 ℃, time 5-3600 second.

(6) utilize the overlay mark location, directly preparation is in order to make the figure mask of first one-dimensional wave guide 17, second one-dimensional wave guide 18 on conductive material layer 24 to adopt conventional photoetching process, X-ray lithography method, electron beam lithography method, ion beam lithography method or phase shift mask lithography method etc., and its mask material comprises 1) photoresists such as PMMA, ZEP, AZ or SAL; 2) metal level and any composite beds between them such as Al, Ge, Ni, Au, W, Cr, Ti, Pt, Ge, Ta or Mo; 3) insulating material such as silica, aluminium oxide, silicon nitride or titanium oxide.Utilize dry corrosion method or wet corrosion method in conductive material layer 24, to dig first groove 13, second groove 15, three-flute 14 and the 4th groove 16, cut out the part that does not have mask on the conductive material layer 24, constitute first groove 13, second groove 15, three-flute 14 and the 4th groove 16, first groove 13 and second groove 15 cause the formation of first one-dimensional wave guide 17 that is connected first source electrode 1 and first drain electrode 3 in the conductive material layer 24, its width is the 2-800 nanometer, highly is the 1-150 nanometer; Three-flute 14 and the 4th groove 16 cause the formation of second one-dimensional wave guide 18 that is connected second source electrode 2 and second drain electrode 4 in the conductive material layer 24, and its width is the 2-800 nanometer, highly is the 1-150 nanometer.

(7) utilize the overlay mark location, adopt conventional photoetching process, X-ray lithography method, electron beam lithography method, ion beam lithography method, phase shift mask lithography method, preparation is in order to make the photoresist figure mask of lines grid on the conductive material layer 24 that has first source electrode 1 and second source electrode 2, first drain electrode, 3 and second drain electrode 4, first one-dimensional wave guide 17 and second one-dimensional wave guide 18, depositing metallic films on the photoresist figure mask of preparation, its thickness of metal film is the 10-150 nanometer.The metal film of deposition comprises Al, Au, W, Cr, Ti, Ni, Pt, Ta or Mo and any composite bed between them.Taking-up is made device and is put into solvent and soak.Remove metal film outside the mask pattern through technology such as peeling off, stay the first tunneling barrier lines grid 19, the first lines grid 7, the second tunneling barrier lines grid 21, suspension grid 23, the 3rd tunneling barrier lines grid 20, the second lines grid 8 and the 4th tunneling barrier lines grid 22 in the mask pattern.

Solvent for use is an acetone.

Of the present invention to the first lines grid 7 in the electric charge hypersensitization Coulomb meter or the second lines grid 8 be detected object and be connected, as being connected, in order to survey the change in electrical charge in the quantum dot with the quantum dot that is detected object; Or be integrated and connected with the single electron logical circuit, in order to survey behavior, the path of electronics; Or be integrated and connected with single-electron memory, in order to survey the storing process of single electron; Or be embedded near the biological nerve, in order to survey neuroelectricity.

Of the present invention have self-calibration function to electric charge hypersensitization Coulomb meter, the more known integrated approach of its method when utilizing single-electronic transistor integrated has following advantage: 1) size of quantum dot, quantum dot potential barrier and their position thereof all can be realistic fully as required existing, make it be integrated with desirable controlled electrical characteristics; 2) the crystal intervalve coupling is determined by capacitive coupling between quantum dot fully, has avoided the tunnelling coupling between quantum dot, makes it integrated reliable and stable; 3) can realize the logical device and the circuit of Premium Features easily.

The Coulomb meter that self-calibration function is arranged of the present invention to the electric charge hypersensitization, more known Sensitive Apparatus has following advantage: 1) extremely responsive, detectable ten thousand to electric charge/ electron charge; 2) not only detectable static electric charge, the also electric charge of detectable motion; 3) can be integrated with microelectronic component, circuit, realize single-electron memory and can monitor its single electron process; 4) be used to replace known current transfer technology, the electrical characteristics of research nano-device, the characteristic of research quantum dot comprises energy level, fills electron distributions and static chemical potential etc.; 5) can be applicable to the biological information field, comprise the detection of neuroelectricity etc.

Description of drawings

The present invention is described in detail below in conjunction with drawings and Examples:

Fig. 1 principle schematic that self-calibration function is arranged of the present invention to electric charge hypersensitization Coulomb meter.

Fig. 2 perspective view that self-calibration function is arranged of the present invention to electric charge hypersensitization Coulomb meter.

Fig. 3 plane projection schematic diagram that self-calibration function is arranged of the present invention to electric charge hypersensitization Coulomb meter.

Indicate among the figure:

1,2.

source electrode

3,4.

drain electrode

5,6. quantum dot

7,8,19,20,21,22,23. lines grid, 9,10,11,12. tunnel junctions

13,14,15,16. grooves, 17,18. one-dimensional wave guides

Embodiment

Embodiment 1:

Selected Si-GaAs substrate is cleaned repeatedly: 1) the trichloroethylene ultrasonic cleaning is 5 times, each 10 minutes; 2) the acetone water-bath is cleaned each 10 minutes 5 times; 3) the alcohol ultrasonic cleaning is 5 times, each 10 minutes; 4) the deionized water ultrasonic cleaning is 6 times, each 10 minutes.Cleaned and used H again ₂SO ₄: H ₂O ₂: H ₂O=5: corrosive liquid was removed lip-deep scar and was made the surface more smooth in 1: 1.With deionized water rinsing 5 times, each 10 minutes.Pull out after the flushing, dry up moisture, import process chamber into and heat-treat degasification: heating-up temperature is 450 ℃, and the time is 30 minutes.Import substrate into the molecular beam epitaxial growth chamber after temperature is reduced to 50 ℃, under the rich As environment that As stove shutter is opened, slowly heat the Si-GaAs substrate.Burn the oxide (being the substrate demoulding) on the Si-GaAs substrate and monitor substrate demoulding process at 580 ℃ with high-energy electron diffiraction.After clear striped appearred in the high-energy electron diffiraction pattern, underlayer temperature was raised to 610 ℃ and kept 10 minutes again, and temperature drops to the GaAs buffering epitaxial loayer of 580 ℃ of growth 8000 nanometers on substrate then.Growth contains the conductive material layer of two-dimensional electron gas on the buffering epitaxial loayer.Concrete steps are: close Si stove shutter, open Ga stove shutter and Al stove shutter, improve underlayer temperature to 610 ℃, 10 nanometer thickness Al grow _0.3Ga _0.7The As barrier layer is opened Si stove shutter again, the Si-Al of 50 nanometers of growing _0.3Ga _0.7As, wherein the Si doping content is 1 * 10 ¹⁸Cm ^-3Close Ga, As, Al, Si stove shutter, reduce underlayer temperature to 580 ℃, then Ga, As shutter with 2 seconds the interval alternation switch, the 5 nanometer thickness GaAs layers of growing are closed the Ga shutter, reduce underlayer temperature.When underlayer temperature reaches 350 ℃, close As stove shutter, this has just finished the growth of the conductive material layer that has two-dimensional electron gas 24 on the substrate 25.

Utilize the overlay mark of electron beam lithography method preparation "+" font: the substrate that 1) will cover conductive material layer respectively in trichloroethylene, acetone, absolute ethyl alcohol, ultrasonic cleaning 5 minutes; 2), remove conductive material layer surface steam 110 ℃ of bakings 30 minutes; 3) toasted 60 minutes at the electron beam resist PMMA that covers 160 nanometer thickness on the electric conducting material laminar surface and at 170 ℃ with sol evenning machine; 4) prepare symmetrical two "+" word mark with the electron beam photoetching process; 5) developed 30 seconds with hexone, and with isopropyl acetone photographic fixing 50 seconds; 6) cleaned 60 seconds with absolute ethyl alcohol and put eb evaporation chambers into; 7) vacuum degree when vaporization chamber reaches 7 * 10 ^-4During Pa, evaporate 50 nanometer titaniums/300 nm of gold; 8) ultrasonic peeling off; Ti/Au in the mask pattern that stays is the overlay mark of "+" word figure.The width of forming two lines of "+" word figure all is 1 micron, and length all is 2000 microns.

Utilize the overlay mark location, adopt conventional photoetching process preparation in order to make the mask of table top, corrosion has the conductive material layer of overlay mark, erodes the part in the conductive material layer mask pattern, the outer conductive material layer of mask pattern is the table top of making device, and corrosive liquid is H ₂SO ₄: H ₂O ₂: H ₂O=5: 1: 50.Its corrosion depth is 120 nanometers.

Utilize the overlay mark of preparation, prepare in order to make the figure AZ1400 mask of first source electrode 1, second source electrode 2 and first drain electrode, 3, second drain electrode 4, deposition (Au on mask by photoetching process _0.88Ge _0.12) _0.92Ni _0.8, in acetone, soaked 60 minutes, remove (Au outside the mask pattern through technology such as peeling off _0.88Ge _0.12) _0.92Ni _0.8, stay (the Au in the mask pattern _0.88Ge _0.12) _0.92Ni _0.8, deionized water ultrasonic cleaning 6 times, each 10 minutes.At N ₂: H ₂Alloy annealing in=3: 1 the mixed atmosphere, temperature is 410 ℃, the time is 50 seconds.At this moment stay (the Au in the mask pattern _0.88Ge _0.12) _0.92Ni _0.8Be first source electrode 1, second source electrode 2 and first drain electrode, 3, second drain electrode 4.

Utilize the electron beam lithography method directly to prepare in order to make the PMMA figure mask of first one-dimensional wave guide 17, second one-dimensional wave guide 18 on conductive material layer 24, dig first groove 13, second groove 15, three-flute 14 and the 4th groove 16 with the wet etching method, its corrosive liquid is H ₂SO ₄: H ₂O ₂: H ₂O=5: 1: 50.Cut out the part that does not have mask on the conductive material layer 24, constitute first groove 13, second groove 15, three-flute 14 and the 4th groove 16, first groove 13 and second groove 15 cause the formation of first one-dimensional wave guide 17 that is connected first source electrode 1 and first drain electrode 3 in the conductive material layer 24, its width is 280 nanometers, highly is 60 nanometers; Three-flute 14 and the 4th groove 16 cause the formation of second one-dimensional wave guide 18 that is connected second source electrode 2 and second drain electrode 4 in the conductive material layer 24, and its width is 300 nanometers, highly is 60 nanometers.

Utilize the overlay mark location, adopt the electron beam lithography method, preparation is in order to make the PMMA photoresist figure mask of lines grid on the conductive material layer 24 that has first source electrode 1 and second source electrode 2, first drain electrode, 3 and second drain electrode 4, first one-dimensional wave guide 17 and second one-dimensional wave guide 18, deposition 10 nanometer Ti/30 nanometer Au films on the photoresist figure mask of preparation, taking-up is made device and is put into solvent and soak.Remove Ti/Au film outside the mask pattern through technology such as peeling off, stay the first tunneling barrier lines grid 19, the first lines grid 7, the second tunneling barrier lines grid 21, suspension grid 23, the 3rd tunneling barrier lines grid 20, the second lines grid 8 and the 4th tunneling barrier lines grid 22 in the mask pattern.

Lead-in wire has just been prepared the Coulomb meter to the electric charge hypersensitization that self-calibration function is arranged as Figure 1-3 after connecting.

Embodiment 2:

Press the method for embodiment 1, selected Cr-GaAs substrate is cleaned repeatedly.Cleaned and used H again ₂SO ₄: H ₂O ₂: H ₂O=8: corrosive liquid was removed lip-deep scar and was made surfacing in 1: 1.Wash, dry up, import substrate into the molecular beam epitaxial growth chamber after the degasification, slow heating Cr-GaAs substrate under the rich As environment that As stove shutter is opened.Burn the oxide (being the substrate demoulding) on the Cr-GaAs substrate and monitor substrate demoulding process at 590 ℃ with high-energy electron diffiraction.After clear striped appearred in the high-energy electron diffiraction pattern, underlayer temperature was raised to 620 ℃ and kept 10 minutes again, and temperature drops to the GaAs buffering epitaxial loayer of 590 ℃ of growth 8000 nanometers on substrate then.Close Ga stove shutter, open Si stove shutter deposition Si atom on the buffering epitaxial loayer, the surface density of the Si atom of its deposition is 1 * 10 ¹³Cm ^-2Close Si stove shutter, open Ga stove shutter, at the GaAs of 590 ℃ of growth 30 nanometers.Close Ga stove shutter, reduce underlayer temperature.When underlayer temperature reaches 350 ℃, close As stove shutter, this has just finished the growth of the conductive material layer that has two-dimensional electron gas on the substrate.

Utilize the electron beam lithography method preparation " overlay mark of " " font: the 1) substrate that will cover conductive material layer ultrasonic cleaning 5 minutes in trichloroethylene, acetone, absolute ethyl alcohol respectively; 2), remove conductive material layer surface steam 110 ℃ of bakings 30 minutes; 3) toasted 60 minutes at the electron beam resist PMMA that covers 160 nanometer thickness on the electric conducting material laminar surface and at 170 ℃ with sol evenning machine; 4) " " " word mark, its live width are 1 micron, and the length of side is 2000 microns to prepare symmetrical two with the electron beam photoetching process; 5) developed 30 seconds with hexone, and with isopropyl acetone photographic fixing 50 seconds; 6) cleaned 60 seconds with absolute ethyl alcohol and put eb evaporation chambers into; 7) vacuum degree when vaporization chamber reaches 3 * 10 ^-4During Pa, evaporate 50 nanometer Cr/300 nm of gold; 8) ultrasonic peeling off; 9) long-time UV exposure was developed 80 seconds more than 60 minutes and with hexone, and with isopropyl acetone photographic fixing 50 seconds to remove the electron beam resist of remnants.

Utilize the overlay mark location, adopt conventional photoetching process preparation in order to make the AZ1400 mask of table top, corrosion has the conductive material layer of overlay mark, wherein, erode the part in the conductive material layer mask pattern, the outer conductive material layer of mask pattern is the table top of making device, and corrosive liquid is H ₂SO ₄: H ₂O ₂: H ₂O=5: 1: 50.Its corrosion depth is 90 nanometers.

Utilize the overlay mark location, prepare the AZ1400 mask that is used to make first source electrode 1, second source electrode 2 and first drain electrode, 3, second drain electrode 4, deposition (Au on mask by conventional photoetching process _0.88Ge _0.12) _0.92Ni _0.8, in acetone, soaked 60 minutes, remove (Au outside the mask pattern through technology such as peeling off _0.88Ge _0.12) _0.92Ni _0.8, (the Au in the mask pattern that stays _0.88Ge _0.12) _0.92Ni _0.8, deionized water ultrasonic cleaning 6 times, each 10 minutes.At N ₂: H ₂Alloy annealing in=3: 1 the mixed atmosphere, temperature is 410 ℃, the time is 50 seconds.At this moment stay (the Au in the mask pattern _0.88Ge _0.12) _0.92Ni _0.8Be first source electrode 1, second source electrode 2 and first drain electrode, 3, second drain electrode 4.

Utilize the electron beam lithography method directly to prepare in order to make the PMMA figure mask of first one-dimensional wave guide 17, second one-dimensional wave guide 18 on conductive material layer 24, dig first groove 13, second groove 15, three-flute 14 and the 4th groove 16 with the wet etching method, its corrosive liquid is H ₂SO ₄: H ₂O ₂: H ₂O=7: 1: 30.Cut out the part that does not have mask on the conductive material layer 24, constitute and dig first groove 13, second groove 15, three-flute 14 and the 4th groove 16, first groove 13, second groove 15 cause connection first source electrode 1 in the conductive material layer 24 and the formation of first drain electrode, 3 first one-dimensional wave guide 17, its width is 250 nanometers, highly is 50 nanometers; Three-flute 14 and the 4th groove 16 cause the formation of second one-dimensional wave guide 18 that is connected second source electrode 2 and second drain electrode 4 in the conductive material layer 24, and its width is 260 nanometers, highly is 50 nanometers.

Utilize the overlay mark location, adopt the electron beam lithography method, preparation is in order to make the PMMA photoresist figure mask of lines grid on the conductive material layer 24 that has first source electrode 1 and second source electrode 2, first drain electrode, 3 and second drain electrode 4, first one-dimensional wave guide 17 and second one-dimensional wave guide 18, deposition 15 nanometer Ti/26 nanometer Au films on the photoresist figure mask of preparation, taking-up is made device and is put into solvent and soak.Remove Ti/Au film outside the mask pattern through technology such as peeling off, stay the first tunneling barrier lines grid 19, the first lines grid 7, the second tunneling barrier lines grid 21, suspension grid 23, the 3rd tunneling barrier lines grid 20, the second lines grid 8 and the 4th tunneling barrier lines grid 22 in the mask pattern.

Lead-in wire has just been prepared the Coulomb meter to the electric charge hypersensitization that self-calibration function is arranged of the present invention after connecting.

Embodiment 3:

With selected sapphire (Al ₂O ₃) substrate cleans repeatedly: 1) the trichloroethylene ultrasonic cleaning is 5 times, each 10 minutes; 2) the acetone water-bath is cleaned each 10 minutes 5 times; 3) the alcohol ultrasonic cleaning is 5 times, each 10 minutes; 4) the deionized water ultrasonic cleaning is 3 times, each 4 minutes.Cleaned and used H again ₂SO ₄: H ₃PO ₄=3: 1 corrosive liquid is removed sapphire Al ₂O ₃Scar on the substrate surface also makes surfacing, and the temperature of its corrosive liquid is 160 ℃.With deionized water rinsing 3 times, each 8 minutes.Pull out after the flushing, dry up moisture, importing that process chamber heat-treats into is degasification: heating-up temperature is 450 ℃, and the time is 30 minutes.Temperature is imported substrate into the molecular beam epitaxial growth chamber after reducing to room temperature.Close the shutter of all stoves, the Sapphire Substrate surface spray nitrogen that imports the growth room after cleaning into is the nitrogenize of substrate, and its nitriding temperature is 800 ℃.Monitor the annealing process of AlN with high-energy electron diffiraction, improve and keep underlayer temperature, after clear striped appears in the high-energy electron diffiraction pattern, reduce the temperature to the GaN of 820 ℃ of growth 2 micron thickness, temperature is raised to the Al of 850 ℃ of growth 10 nanometer thickness at 850 ℃ _0.22Ca _0.78The Si-Al of N and 25 nanometer thickness _0.22Ga _0.78N, the doping content of its Si is 1 * 10 ¹⁸Cm ^-22 microns GaN that grown, 10 nanometer Al _0.22Ga _0.78N and 25 nanometer Si-Al _0.22Ga _0.78N is the conductive material layer that has two-dimensional electron gas 24 of growing on the Sapphire Substrate.

Utilize the overlay mark of electron beam lithography method at preparation "+" font on the conductive material layer 24: 1) substrate that will cover conductive material layer respectively in trichloroethylene, acetone, absolute ethyl alcohol, ultrasonic cleaning 5 minutes; 2), remove conductive material layer surface steam 110 ℃ of bakings 30 minutes; 3) toasted 60 minutes at the electron beam resist PMMA that covers 160 nanometer thickness on the electric conducting material laminar surface and at 170 ℃ with sol evenning machine; 4) prepare symmetrical two "+" word mark with the electron beam photoetching process, the live width of forming two lines of "+" word mark all is 1 micron, and length all is 2000 microns; 5) developed 30 seconds with hexone, and with isopropyl acetone photographic fixing 50 seconds; 6) cleaned 60 seconds with absolute ethyl alcohol.Utilize the electron beam lithography method to go up preparation in order to make the PMMA figure mask of "+" overlay mark and isolation table top at conductive material layer (7).Utilize reactive ion etching to prepare overlay mark table top and device isolation table top, its etching gas is Cl ₂, etching temperature is 120 ℃.

Utilize the overlay mark of preparation, prepare in order to make the figure AZ1400 mask of first source electrode 1, second source electrode 2 and first drain electrode, 3, second drain electrode 4 by conventional photoetching process, deposition 20 nanometer Ti/10 nanometer Al on figure AZ1400 mask, in acetone, soaked 60 minutes, remove Ti/Al outside the mask pattern through technology such as peeling off, Ti/Al in the mask pattern that stays, deionized water ultrasonic cleaning 5 times, each 8 minutes.At N ₂Middle annealing 40 seconds, its temperature is 900 ℃.At this moment the Ti/Al that stays in the mask pattern is first source electrode 1, second source electrode 2 and first drain electrode, 3, second drain electrode 4.

Utilize the electron beam lithography method directly on conductive material layer 24, to prepare in order to make the PMMA figure mask of first one-dimensional wave guide 17, second one-dimensional wave guide 18, adopt the reactive ion etching method to dig first groove 13, second groove 15, three-flute 14 and the 4th groove 16, its etching gas is Cl ₂Cut out the part that does not have mask on the conductive material layer 24, constitute first groove 13, second groove 15, three-flute 14 and the 4th groove 16, first groove 13, second groove 15 cause connection first source electrode 1 in the conductive material layer 24 and the formation of first drain electrode, 3 first one-dimensional wave guide 17, its width is 300 nanometers, highly is 30 nanometers; Three-flute 14 and the 4th groove 16 cause the formation of second one-dimensional wave guide 18 that is connected second source electrode 2 and second drain electrode 4 in the conductive material layer 24, and its width is 300 nanometers, highly is 30 nanometers.

Utilize the overlay mark location, adopt the electron beam lithography method, preparation is in order to make the PMMA photoresist figure mask of lines grid on the conductive material layer 24 that has first source electrode 1 and second source electrode 2, first drain electrode, 3 and second drain electrode 4, first one-dimensional wave guide 17 and second one-dimensional wave guide 18, deposition 50 nanometer Au films on the photoresist figure mask of preparation, taking-up is made device and is put into solvent and soak.Remove Au film outside the mask pattern through technology such as peeling off, stay the first tunneling barrier lines grid 19, the first lines grid 7, the second tunneling barrier lines grid 21, suspension grid 23, the 3rd tunneling barrier lines grid 20, the second lines grid 8 and the 4th tunneling barrier lines grid 22 in the mask pattern.

Lead-in wire has just been prepared the Coulomb meter to the electric charge hypersensitization that self-calibration function is arranged after connecting.

Embodiment 4:

Select the P type SOI substrate of (001) orientation for use, the oxygen buried layer among the SOI is the substrate 25 of preparation single-electronic transistor of the present invention, and the Si single crystal film on the SOI is conductive material layer 24.After known SOI substrate cleaning method cleaning, lead Si single crystal film 24 by oxidation repeatedly, corroding method attenuate, make its thickness reach 70 nanometers.Described oxidation is a dry-oxygen oxidation, at N ₂: O ₂Oxidation in=1: 1 the mixed atmosphere, its oxidizing temperature are 850 ℃.In volume ratio, use corrosive liquid HF: H ₂O=1: 10 remove oxide layer.Apply bias voltage on the substrate, form the two-dimensional electron gas in the conductive material layer 11.

Utilize the electron beam lithography method on the Si single crystal film 24 behind the attenuate, the photoresist PMMA mask of preparation band "+" word figure, with the low-priced method depositing metallic films of penetrating, its metal film is 50 nanometer Cr/300 nanometer W/50 nanometer Cr on band photoresist figure PMMA mask.Taking-up is made device and is put into solvent and soak.Remove Cr/W/Cr outside the mask pattern through technology such as peeling off, the Cr/W/Cr in the mask pattern that stays is the overlay mark of "+" word figure.The width of forming two lines of "+" word figure all is 1 micron, and length all is 2000 microns.

Having deposition 20 nanometer thickness SiO on the Si single crystal film 24 of overlay mark ₂Si with 120 nanometer thickness ₃N ₄Utilize known reactive ion etching method to remove the Si of 120 outer nanometer thickness of active area ₃N ₄, use HF: H ₂O=1: 10 corrosive liquids remove the 20 nanometer thickness SiO that expose ₂, the Si single crystal film 24 that utilizes known wet-oxygen oxidation method oxidation to expose is realized the isolation of device and the table top of making device.

Having deposition 20 nanometer thickness SiO on the Si single crystal film 24 of overlay mark ₂Si with 120 nanometer thickness ₃N ₄Utilize the overlay mark location, by the 20 nanometer thickness SiOs of photoetching process in deposition ₂Si with 120 nanometer thickness ₃N ₄Last preparation is used for the mask that arsenic ion injects, and injects the 100keV arsenic ion to mask, and dosage is 8 * 10 ¹⁵Cm ^-2Arsenic ion is used undiluted H after injecting ₃PO ₄Boil the Si that removed 120 nanometer thickness in 38 minutes at 80 ℃ ₃N ₄, use HF: H ₂O=1: 10 corrosive liquids remove 20 nanometer thickness SiO ₂At N ₂: H ₂Anneal in=2: 1 the mixed atmosphere, its temperature is 1080 ℃, is 7 seconds between annealing.

On conductive material layer 24, prepare in order to make the figure AZ1400 photoresist mask of first source electrode 1, second source electrode 2 and first drain electrode, 3, second drain electrode 4, the Al film of deposition 1 micron thickness on band photoresist figure mask with conventional photoetching process again.Taking-up is made device and is put into solvent and soak.Remove metal film outside the mask pattern through technology such as peeling off, the metal film ECDC annealing of gold in the mask pattern that stays is first source electrode 1, second source electrode 2 and first drain electrode, 3, second drain electrode 4, and its annealing temperature is 450 ℃.

Utilize overlay mark location, directly preparation is in order to make the PMMA figure mask of first one-dimensional wave guide 17, second one-dimensional wave guide 18 on the Si single crystal film 24 of overlay mark having to adopt the electron beam lithography method, and the etching method of utilizing the electron cyclotron resonace dry method is at SF ₆The Si single crystal film 24 that atmosphere and 120 ℃ of etchings have the figure mask falls the partial etching that does not have mask on the Si single crystal film 24 promptly to dig first groove 13, second groove 15, three-flute 14 and the 4th groove 16.First groove 13, second groove 15 cause connection first source electrode 1 in the conductive material layer 24 and the formation of first drain electrode, 3 first one-dimensional wave guide 17, and its width is 300 nanometers, highly is 70 nanometers; Three-flute 14 and the 4th groove 16 cause the formation of second one-dimensional wave guide 18 that is connected second source electrode 2 and second drain electrode 4 in the conductive material layer 24, and its width is 310 nanometers, highly is 70 nanometers.

Utilize the overlay mark location, adopt the electron beam lithography method on the Si single crystal film 24 that has first source electrode 1 and second source electrode 2, first drain electrode, 3 and second drain electrode 4, first one-dimensional wave guide 17 and second one-dimensional wave guide 18, to prepare in order to make the PMMA photoresist figure mask of lines grid, deposition 80 nanometer Al films on the photoresist figure mask of preparation, taking-up is made device and is put into solvent and soak.Remove Al film outside the mask pattern through technology such as peeling off, stay the first tunneling barrier lines grid 19, the first lines grid 7, the second tunneling barrier lines grid 21, suspension grid 23, the 3rd tunneling barrier lines grid 20, the second lines grid 8 and the 4th tunneling barrier lines grid 22 in the mask pattern.

Lead-in wire connects, and just prepares the Coulomb meter to the electric charge hypersensitization that self-calibration function is arranged of the present invention.

Claims

1. the Coulomb meter to the electric charge hypersensitization that self-calibration function is arranged is characterized in that: first source electrode (1), second source electrode (2) and first drain electrode (3), second drain electrode (4) are arranged in the conductive material layer (24) on substrate (25); First groove (13) and second groove (15) have been located in first source electrode (1) and first drain electrode (3) at conductive material layer (24), and the table top between first groove (13) and second groove (15) forms first one-dimensional wave guide (17) that connects first source electrode (1) and first drain electrode (3); Deposit the first tunneling barrier lines grid (19) and the second tunneling barrier lines grid (21) on first one-dimensional wave guide (17), first one-dimensional wave guide (17) between the first tunneling barrier lines grid (19) and the second tunneling barrier lines grid (21) is first quantum dot (5); The first lines grid (7) have been located at first quantum dot (5) of first one-dimensional wave guide (17);

Three-flute (14) and the 4th groove (16) have been located in second source electrode (2) and second drain electrode (4) at conductive material layer (24), and the table top between three-flute (14) and the 4th groove (16) forms second one-dimensional wave guide (18) that connects second source electrode (2) and second drain electrode (4); Deposit the 3rd tunneling barrier lines grid (20) and the 4th tunneling barrier lines grid (22) on second one-dimensional wave guide (18), second one-dimensional wave guide (18) between the 3rd tunneling barrier lines grid (20) and the 4th tunneling barrier lines grid (22) is second quantum dot (6); The second lines grid (8) have been located at second quantum dot (6) of second one-dimensional wave guide (18);

Locate at first quantum dot (5) of first one-dimensional wave guide (17) and second quantum dot (6) of second one-dimensional wave guide (18), the suspension grid (23) that connect first quantum dot (5) and second quantum dot (6) are arranged.

2. the Coulomb meter to the electric charge hypersensitization that self-calibration function is arranged as claimed in claim 1 is characterized in that: the width of described first one-dimensional wave guide (17) or second one-dimensional wave guide (18) is the 3-800 nanometer.

3. the Coulomb meter to the electric charge hypersensitization that self-calibration function is arranged as claimed in claim 1 is characterized in that: further be coated with the buffering epitaxial loayer on the described substrate.

4. the Coulomb meter to the electric charge hypersensitization that self-calibration function is arranged as claimed in claim 3 is characterized in that: described buffering epitaxial loayer is 1) Si, Ge or GeSi semiconductor element cellulosic material; 2) GaN, NAlGaAs, NInGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or InAlGaAs semiconducting compound; 3) by silicon, phosphonium ion, nitrogen ion, arsenic ion, oxonium ion or the boron fluoride ion doping composite material in Si, Ge, GeSi, GaN, NAlGaAs, NInGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or the InAlGaAs semi-conducting material; 4) above-mentioned 1), 2) and 3) but described lattice constant is close and the material of combination in any; 5) silica, aluminium oxide, silicon nitride or titanium oxide insulating material.

5. the Coulomb meter to the electric charge hypersensitization that self-calibration function is arranged as claimed in claim 1 is characterized in that: described substrate is 1) silicon on the semiconducting insulation body; 2) oxide material; 3) glass, SiC, Ge, silicon or the monocrystalline silicon of one deck oxide is arranged on silicon face; 4) semi-conducting material of semi-conducting material of Can Zaing or non-doping.

6. the Coulomb meter to the electric charge hypersensitization as claimed in claim 5 is characterized in that: described oxide material is Al ₂O ₃, silica, magnesium oxide or strontium titanates.

7. the Coulomb meter to the electric charge hypersensitization that self-calibration function is arranged as claimed in claim 5 is characterized in that: the semi-conducting material of described non-doping is GaAs, Cr-GaAs, Si or InP; The semi-conducting material that mixes is N ⁺-GaAs, N ⁺-InP or N ⁺-GaN.

8. the Coulomb meter that self-calibration function is arranged as claimed in claim 1 to the electric charge hypersensitization, it is characterized in that: described electric conducting material is 1) Si, Ge or SiGe semiconductor element cellulosic material; 2) GaN, NAlGaAs, NInGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or InAlGaAs semiconducting compound; 3) by silicon, magnesium, phosphonium ion, nitrogen ion, arsenic ion, oxonium ion or the boron fluoride ion doping composite material in Si, Ge, SiGe, GaN, NAlGaAs, NInGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or the InAlGaAs semi-conducting material; 4) above-mentioned 1), 2) and 3) but described lattice constant is close and the material of combination in any.

9. the Coulomb meter to the electric charge hypersensitization that self-calibration function is arranged as claimed in claim 1 is characterized in that: described tunneling barrier lines grid, lines grid or suspension grid are Al, Au, W, Cr, Ti, Ni, Pt, Ge, Ta or Mo metal level and any composite bed between them.

10. as each described preparation method to the Coulomb meter of electric charge hypersensitization that self-calibration function is arranged of claim 1-9, it is characterized in that: this method may further comprise the steps,

Method 1

1) initial substrates is cleaned repeatedly, after having cleaned, remove the lip-deep scar of initial substrates, make the initial substrates surfacing with corrosive liquid; Clean, remove substrate moisture content,, obtain accurately machined substrate (25) then with the substrate degasification; Utilize oxidation or deposition process, go up at accurately machined substrate (25) and cover one deck buffering epitaxial loayer;

2) utilize oxidation, corrosion or deposition process, directly go up or on the buffering epitaxial loayer on the substrate (25), cover conductive material layer (24), utilize body doping, modulation doping or applying bias to cause electron gas in the conductive material layer at accurately machined substrate (25);

3) on conductive material layer (24), the part table top, the groove of corrosion or the film of deposition that utilize corrosion to form are used as overlay mark;

4) utilize the overlay mark location, adopt the conventional method preparation in order to make the mask of table top, corrosion has the conductive material layer (24) of overlay mark, erodes the part in conductive material layer (24) mask pattern, and the outer conductive material layer (24) of mask pattern is the table top of making device;

5) utilize overlay mark location, prepare mask, by metal film deposition, peel off and prepare during having the conductive material layer of table top (24) with annealing steps that first source electrode (1), second source electrode (2) and first drain (3), second drain (4) with conventional method;

6) utilize the overlay mark location, directly go up preparation in order to make the figure mask of first one-dimensional wave guide (17) and second one-dimensional wave guide (18) at conductive material layer (4); Utilize dry corrosion method or wet corrosion method in conductive material layer (24), to dig first groove (13), second groove (15), three-flute (14) and the 4th groove (16), cut out the part that does not have mask on the conductive material layer (24), constitute first groove (13), second groove (15), three-flute (14) and the 4th groove (16), first groove (13) and second groove (15) cause the formation of first one-dimensional wave guide (17) that is connected first source electrode (1) and first drain electrode (3) in the conductive material layer (24); Three-flute (14) and the 4th groove (16) cause the formation of second one-dimensional wave guide (18) that is connected second source electrode (2) and second drain electrode (4) in the conductive material layer (24);

7) utilize the overlay mark location, go up preparation in order to make the photoresist figure mask of lines grid, depositing metallic films on the photoresist figure mask of preparation at the conductive material layer (24) that has first source electrode (1) and second source electrode (2), first drain electrode (3) and second drain electrode (4), first one-dimensional wave guide (17) and second one-dimensional wave guide (18); Taking-up is made device and is put into solvent and soak, metal film outside stripping technology removes mask pattern stays the first tunneling barrier lines grid (19), the first lines grid (7), the second tunneling barrier lines grid (21), suspension grid (23), the 3rd tunneling barrier lines grid (20), the second lines grid (8) and the 4th tunneling barrier lines grid (22) in the mask pattern;

8) connect the Coulomb meter of preparing self-calibration function through lead-in wire to the electric charge hypersensitization; Or

Method 2

1) selects the material that on substrate (25), has been coated with conductive material layer (24) for use, by oxidation repeatedly, corroding method attenuate conductive material layer (24); Utilize body doping, modulation doping or applying bias to cause electron gas in the conductive material layer;

2) on the conductive material layer behind the attenuate (24), the part table top, the groove of corrosion or the film of deposition that utilize corrosion to form are used as overlay mark;

3) utilize the overlay mark location, adopt conventional method to prepare mask, corrosion has the conductive material layer (24) of overlay mark, erode the part in conductive material layer (24) mask pattern, the outer conductive material layer (24) of mask pattern is the table top of making device, and described corrosion is dry etching or wet etching;

4) utilize overlay mark location, go up preparation and be used for the mask that ion injects having the conductive material layer of overlay mark (24), after ion injects, remove and be used for the mask that ion injects, the element that high-temperature annealing activation is injected, its annealing temperature is 500-1200 ℃;

5) utilize the overlay mark location, go up preparation in order to make the figure photoresist mask of first source electrode (1), second source electrode (2) and first drain electrode (3), second drain electrode (4), depositing metallic films on band photoresist figure mask by photoetching at accurately machined conductive material layer (24); Taking-up is made device and is put into solvent and soak, and the metal film outside stripping technology removes mask pattern stays the metal film in the mask pattern, and the ECDC annealing of gold is first source electrode (1), second source electrode (2) and first drain electrode (3), second drain electrode (4);

6) utilize the overlay mark location, directly go up preparation in order to make the figure mask of first one-dimensional wave guide (17), second one-dimensional wave guide (18) at conductive material layer (24); Utilize dry corrosion method or wet corrosion method in conductive material layer (24), to dig first groove (13), second groove (15), three-flute (14) and the 4th groove (16), cut out the part that does not have mask on the conductive material layer (24), constitute first groove (13), second groove (15), three-flute (14) and the 4th groove (16), first groove (13) and second groove (15) cause the formation of first one-dimensional wave guide (17) that is connected first source electrode (1) and first drain electrode (3) in the conductive material layer (24); Three-flute (14) and the 4th groove (16) cause the formation of second one-dimensional wave guide (18) that is connected second source electrode (2) and second drain electrode (4) in the conductive material layer (24);

8) connect the Coulomb meter of preparing self-calibration function through lead-in wire to the electric charge hypersensitization.

11. preparation method as claimed in claim 10 is characterized in that: in volume ratio, described corrosive liquid is H ₂SO ₄: H ₂O ₂: H ₂O=1-100: 1-60: 1-500, NH ₄OH: H ₂O ₂: H ₂O=1-100: 1-60: 1-5000, H ₃PO ₄: H ₂O ₂: H ₂O=1-100: 1-60: 1-500, H ₂SO ₄: H ₃PO ₄: H ₂O=1-100: 1-60: 0-500, KOH: H ₂O=1-100: 1-5000, NaOH: H ₂O=1-100: 1-5000, HF: H ₂O=1-100: 1-5000 or HCl: H ₂The solution of O=1-100: 1-5000.

12. preparation method as claimed in claim 10 is characterized in that: described buffering epitaxial loayer is: 1) Si, Ge or GeSi semiconductor element cellulosic material; 2) GaN, NAlGaAs, NInGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or InAlGaAs semiconducting compound; 3) by silicon, phosphonium ion, nitrogen ion, arsenic ion, oxonium ion or the boron fluoride ion doping composite material in Si, Ge, GeSi, GaN, NAlGaAs, NInGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or the InAlGaAs semi-conducting material; 4) above-mentioned 1), 2) and 3) but described lattice constant is close and the material of combination in any; 5) silica, aluminium oxide, silicon nitride or titanium oxide insulating material.

13. the preparation method of the Coulomb meter to the electric charge hypersensitization as claimed in claim 10, it is characterized in that: described electric conducting material is 1) Si, Ge or SiGe semiconductor element cellulosic material; 2) GaN, NAlGaAs, NInGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or InAlGaAs semiconducting compound; 3) by silicon, magnesium, phosphonium ion, nitrogen ion, arsenic ion, oxonium ion or the boron fluoride ion doping composite material in Si, Ge, SiGe, GaN, NAlGaAs, NInGaAs, NInAlGaAs, GaAs, AlGaAs, InGaAs or the InAlGaAs semi-conducting material; 4) above-mentioned 1), 2) and 3) but described lattice constant is close and the material of combination in any.

14. the preparation method of the Coulomb meter to the electric charge hypersensitization as claimed in claim 10, it is characterized in that: the film of the described deposition of step 7) in the step 3) in the method 1, step 7) or the method 2 is Al, Au, W, Cr, Ti, Ni, Pt, Ge, Ta or Mo metal level and any composite bed between them.

15. the preparation method of the Coulomb meter to the electric charge hypersensitization as claimed in claim 10, it is characterized in that: the metal film of the described deposition of step 5) in method 1 or the method 2 is Pd, Zr, Ag, Gd, Al, Ni, Au, W, Cr, Ti, Pt, Ge, Ta, In or Mo metal level and any composite bed between them.

16. the preparation method of the Coulomb meter to the electric charge hypersensitization as claimed in claim 10, it is characterized in that: the described annealing conditions of the step 5) in the method 1 is at N ₂: H ₂Alloy annealing in the mixed atmosphere of=1-900: 0-500, temperature is 300-1200 ℃.

17. the preparation method of the Coulomb meter to the electric charge hypersensitization as claimed in claim 10, it is characterized in that: described mask material is 1) PMMA, ZEP, AZ or SAL photoresist; 2) Al, Ni, Au, W, Cr, Ti, Pt, Ge, Ta or Mo metal level and any composite bed between them; 3) silica, aluminium oxide, silicon nitride or titanium oxide insulating material.

18. the preparation method of the Coulomb meter to the electric charge hypersensitization as claimed in claim 10 is characterized in that: the step 2 method 2)) described film comprises metal W, Cr, Pt, Ta or Mo metal level and any composite bed between them.

19. the preparation method of the Coulomb meter to the electric charge hypersensitization as claimed in claim 10, it is characterized in that: the described oxidizing condition of the step 1) method 2) is at N in volume ratio ₂: O ₂Oxidation in the mixed atmosphere of=0-900: 1-500, oxidizing temperature are 350-1200 ℃; Etching condition is to use corrosive liquid, in volume ratio, and HF: H ₂O=1-100: 1-5000 or HCl: H ₂O=1-100: 1-5000 removes oxide layer.

20. the preparation method of the Coulomb meter to the electric charge hypersensitization as claimed in claim 10, it is characterized in that: the described injection element of the step 4) method 2) is silicon, phosphonium ion, nitrogen ion, arsenic ion, oxonium ion or boron fluoride ion.

21. the preparation method of the Coulomb meter to the electric charge hypersensitization as claimed in claim 10, it is characterized in that: the described alloy annealing temperature of the step 5) in the method 2 is 300-800 ℃.