CN1298031C - Encapsulation process for raising effect area of sticking crystal - Google Patents

Encapsulation process for raising effect area of sticking crystal Download PDF

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Publication number
CN1298031C
CN1298031C CNB031500102A CN03150010A CN1298031C CN 1298031 C CN1298031 C CN 1298031C CN B031500102 A CNB031500102 A CN B031500102A CN 03150010 A CN03150010 A CN 03150010A CN 1298031 C CN1298031 C CN 1298031C
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China
Prior art keywords
rank
substrate
wafer
pressing
rete
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Expired - Fee Related
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CNB031500102A
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Chinese (zh)
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CN1577780A (en
Inventor
顾沛川
鲁明联
林俊宏
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BERMUDA CHIPMOS TECHNOLOGIES Co Ltd
Chipmos Technologies Shanghai Ltd
Chipmos Technologies Inc
Original Assignee
BERMUDA CHIPMOS TECHNOLOGIES Co Ltd
Chipmos Technologies Shanghai Ltd
Chipmos Technologies Inc
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Application filed by BERMUDA CHIPMOS TECHNOLOGIES Co Ltd, Chipmos Technologies Shanghai Ltd, Chipmos Technologies Inc filed Critical BERMUDA CHIPMOS TECHNOLOGIES Co Ltd
Priority to CNB031500102A priority Critical patent/CN1298031C/en
Publication of CN1577780A publication Critical patent/CN1577780A/en
Application granted granted Critical
Publication of CN1298031C publication Critical patent/CN1298031C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/4824Connecting between the body and an opposite side of the item with respect to the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73215Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222Sequential connecting processes
    • H01L2224/92242Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

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  • Adhesives Or Adhesive Processes (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

The present invention relates to an encapsulation process for increasing effect areas of sticking crystals. The present invention is proposed in order to provide a volume circuit encapsulation process for enhancing sticking strength and densifying plastic material. The present invention comprises a step for providing a basal plate which is provided with a crystal sticking surface, a step for forming A stage liquid state glue which comprises thermosetting compounds and solvents can be formed on the sticking crystal surfaces of the basal plate, a step for removing the solvents of the A stage liquid state glue and forming a baking basal plate of a dry B stage film layer by the A stage liquid state glue, a step for sticking chips to press fit chips of the sticking crystal surfaces of the basal plate by the B stage film layer which is not completely solidified, a step for electrically connecting the chips by welding wires electrically connecting the chips and the basal plate, and a step for forming a sealing colloid by pouring the sealing colloid. The pouring pressure of the sealing colloid in the step for forming the sealing colloid is larger than the press fit pressure of the press fit chips, and the B stage film layer which is not completely solidified in the step for pressing the chips can be tightly compressed for increasing effective sticking crystal areas.

Description

Promote the encapsulation procedure of effective adhesive crystal area
Technical field
The invention belongs to the integrated circuit encapsulation procedure, particularly a kind of encapsulation procedure of promoting effective adhesive crystal area.
Background technology
Utilize B rank glue material (B-stage compound) to be known techniques as glutinous brilliant material.As disclosed polycrystalline sheet piled-up packing assembly.Known B rank glue material is in order to cohering two plates, because of thermal coefficient of expansion is identical, can not produce adaptability to changes (stress) between two plates, and B rank glue material is to be sealed in adhesive body inside, so require lower to B rank glue material bond strength.
As shown in Figure 1, when directly utilizing B rank glue material to cohere wafer and substrate, generally speaking, be that B rank glue material is set on the glutinous crystal face 11 prior to substrate 10, then, be pressure bonded to the glutinous crystal face 11 of substrate 10 with the back side 23 of wafer 20, heating is solidified C rank rete 13 so that the glue material thermosetting of B rank is turned in pressing.Solidified C rank rete 13 in successive process, the bonding wire 30 and the pressing mold step that form as the lead-in wire bonding between the pad 12 of the weld pad 21 in connecting wafer 20 fronts 22 and substrate 10 will not have any phase change and chemical reaction.Yet, B rank glue material is to spread formation with printing or other liquid state, it is not smooth fully that B rank glue material forms the surface, and make B rank glue material can't essence closely knit between wafer 20 and substrate 10 by the pressure of pressing wafer 20, after encapsulation, carry out reliability test (reliability test), during as humidity, pre-burning test, be easy to generate " puffed rice " phenomenon (popcorn).Therefore, as shown in Figure 2, before pressing mold, pull out wafer 20 discoveries curing C rank rete 13 and only stick 50% of crystal face 11 areas less than substrate 10 at effective adhesive crystal area of substrate 10, even some is lower than 30%, obviously, it is not enough and can't be closely knit to have solidified the cohesion of 13 pairs of wafers of C rank rete 20 and substrate 10, has bubble and gap between wafer 20 and substrate 10.
Summary of the invention
The purpose of this invention is to provide a kind of encapsulation procedure that improves the effective adhesive crystal area of enhancement of bond strength, closely knit glue material.
The present invention includes following steps:
Provide have a glutinous crystal face substrate the substrate step is provided;
What form the liquid glue in A rank comprise heat-curable compounds and solvent on the glutinous crystal face of substrate forms the liquid glue step in A rank in substrate;
Remove the solvent of the liquid glue in A rank and make the liquid glue in A rank form the baking substrate step of dry B rank rete;
The wafer gluing is sticked the pressing wafer step of crystal face with not completely crued B rank rete in substrate;
Electrically connect the electric connection wafer step of wafer and substrate with bonding wire;
The formation adhesive body step of perfusion adhesive body, the filler densification pressure of adhesive body is greater than the pressing pressure of pressing wafer, so that not completely crued B rank rete is closely oppressed in pressing wafer step, to promote effective adhesive crystal area.
Wherein:
The liquid glue in A rank is to be formed at the glutinous crystal face of substrate with stencil printing patterning part in the liquid glue step in substrate formation A rank.
The filler densification pressure that forms adhesive body in the adhesive body step is between 1000 to 1500psi.
Pressing mold provides the injecting glue temperature between 150 ℃~200 ℃ simultaneously in the formation adhesive body step, so that B rank rete full solidification is C rank retes.
The injecting glue temperature is higher than the temperature in the baking substrate step in the formation adhesive body step.
Pressing-in temp in the pressing wafer step should be higher than the glass transition temperature of B rank rete.
The liquid glue in A rank is to be formed at the glutinous crystal face of substrate with printing, spraying, spin coating or dip-dye in the liquid glue step in substrate formation A rank.
The liquid glue in A rank is to be formed at the glutinous crystal face of substrate with screen printing or mould printing in the liquid glue step in substrate formation A rank.
B rank rete is the back side, front or the side of gluing wafer in the pressing wafer step.
After described formation adhesive body step, cutting substrate is single from package assembling to constitute, and the glutinous crystal face area size of substrate is not more than 1.5 times of front wafer surface area.
Since the present invention includes provide have a glutinous crystal face substrate the substrate step is provided, what form the liquid glue in A rank comprise heat-curable compounds and solvent on the glutinous crystal face of substrate forms the liquid glue step in A rank in substrate, remove the solvent of the liquid glue in A rank and make the liquid glue in A rank form the baking substrate step of dry B rank rete, the wafer gluing is sticked the pressing wafer step of crystal face with not completely crued B rank rete in substrate, electrically connect the electric connection wafer step of wafer and substrate and the formation adhesive body step of perfusion adhesive body with bonding wire; Form the pressing pressure of the filler densification pressure of adhesive body in the adhesive body step, so that not completely crued B rank rete is closely oppressed in pressing wafer step, to promote effective adhesive crystal area greater than the pressing wafer.B rank rete can not pollute the pad of substrate in the processing procedure of the present invention, so pad in design can be closely near wafer, preferably list is from becoming package assembling; The filler densification pressure that forms in the adhesive body step makes B rank rete by urgent and closely knit, reaches the effect of promoting effective adhesive crystal area.Not only improve bond strength, and closely knit glue material, thereby reach purpose of the present invention.
Description of drawings
Fig. 1, be known integrated circuit package assembling structural representation cutaway view.
Fig. 2, be the known effective adhesive crystal area photo of integrated circuit package assembling substrate.
Fig. 3, for processing procedure block diagram of the present invention.
Fig. 4, for step 1 schematic diagram of the present invention.
Fig. 5, for step 2 schematic diagram of the present invention.
Fig. 6, for step 3 schematic diagram of the present invention.
Fig. 7, for step 4 schematic diagram of the present invention.
Fig. 8, for step 5 schematic diagram of the present invention.
Fig. 9, for step 6 schematic diagram of the present invention.
Figure 10, be the integrated circuit package assembling structural representation cutaway view that forms with the present invention.
Figure 11, cohere pressing mold view afterwards for integrated circuit package assembling substrate and the wafer that forms with the present invention
Embodiment
As shown in Figure 3, the present invention includes following steps:
Step 1
Substrate is provided
As shown in Figure 3, Figure 4, the substrate that provides 110 is for being applicable to the circuit substrate of integrated circuit encapsulation, and as BT printed circuit board (PCB) or film circuit board, substrate 110 has glutinous crystal face 111 and corresponding and with the electrically conduct surface engagement face 113 of glutinous crystal face 111 of circuit.The pad 112 that glutinous crystal face 111 forms in order to be electrically conducted wafer 130.
Step 2
Form the liquid glue in A rank in substrate
As Fig. 3, shown in Figure 5, on the glutinous crystal face 111 of substrate 110, form the liquid glue in A rank (A-stageliquid compound) 121, the liquid glue 121 in A rank is to be formed on the substrate 110 glutinous crystal faces 111 with screen printing (screen printing) mode patterning part, perhaps other liquid formation method is as printing (printing), screen printing (screen printing), mould printing (stencil printing), spraying (spraying), spin coating (spin coating) or contaminate methods such as (dipping).
The liquid glue 121 in A rank comprises heat-curable compounds, as Polyimide (polyimide), polyquinoxaline (polyquinoxalin) or benzocyclobutene heat-curable compounds such as (benzocyclobutene) and solvent that can the heat of solution thermosetting resin, as fourth lactones (butyrolactone) and cyclopentanone (cyclopentanone) mixed solvent or 1,3,5-trimethylbenzene (mesitylene).
Step 3
The baking substrate
As Fig. 3, shown in Figure 6, substrate 110 is heated, operation such as vacuumize or ultraviolet irradiation, to remove the solvent of the liquid glue 121 in A rank, make the liquid glue 121 in A rank change the B rank rete (B-stage film layer) 122 that forms dry and not hot curing, B rank rete 122 has thermoplasticity (thermoplastic) and thermal curable, the uncured preimpregnation material (uncuringprepreg) that just is commonly called as, B rank rete 122 has glass transition temperature (glass transition temperature, Tg) and heat curing temperature, B rank rete 122 conversion temperatures are not higher than the temperature of pressing wafer, about 35 ℃~70C, be that B rank rete 122 is no stickiness dried film when the following environment of glass transition temperature, under room temperature state, be easy to carrying and store substrate, when environment that B rank rete 122 is in more than the glass transition temperature, to be sticky flowability, for the moistening wafer 130 that sticks together, and the heat curing temperature of B rank rete 122 is not higher than the injecting glue temperature that forms adhesive body, promptly is lower than 175 ℃.
Step 4
The pressing wafer
As Fig. 3, shown in Figure 7, wafer 130 is pressure bonded to the glutinous crystal face 111 of substrate 110, pressing-in temp should be higher than the glass transition temperature of B rank rete 122, so that B rank rete 122 gluing substrates 110 and wafers 130.According to encapsulation form difference, B rank rete 122 is the back side 133 of gluing wafer 130, but the also front 132 or the side of gluing wafer 130.Wafer 130 positive 132 forms weld pads 131, and keeps B rank rete 122 in full solidification state not after pressing.
Step 5
Electrically connect wafer
As Fig. 3, shown in Figure 8, form metal bonding wire 140 in the mode of lead-in wire bonding, with the weld pad 131 that electrically connects wafer 130 and the pad 112 on the substrate 110.At this moment, B rank rete 122 still keeps not full solidification state.In addition, electric connection method can use winding engage automatically (Tape Automated Bonding, TAB) or other known techniques.
Step 6
Form adhesive body
As Fig. 3, shown in Figure 9, to insert in the encapsulating mould with the substrate 110 of B rank rete 122 gluing wafers 130, with mold 151 and bed die 152 moulds envelope substrate 110, make substrate 110 be arranged in the die cavity that upper and lower mould 151,152 forms, then, along the gum-injecting port perfusion adhesive body (moldingcompound) 150 of mould, adhesive body 150 includes thermosetting resin, silicon oxygen compound, release agent and a little colorant.The filler densification pressure of adhesive body 150 is between 1000 to 1500psi, and it is the pressure during greater than pressing wafer step.Because B rank rete 122 still is in not full solidification state through pressing wafer step and after electrically connecting the wafer step, it has appropriate deformability, under the hyperbaric environment that adhesive body 150 forms, B rank rete 122 is closely oppressed and is seemed closely knit, get rid of the gap or the bubble that originally may be present in the B rank rete 122, to promote effective adhesive crystal area of 110 pairs of wafers 130 of substrate.Preferably, the pressing mold of formation adhesive body step provides the injecting glue temperature between 150 ℃~200 ℃ simultaneously, to be higher than the temperature in the baking substrate step, as shown in figure 10, so that B rank rete 122 full solidification are C rank rete 123.C rank rete 123 is to have finished hot curing reaction and be firm fixedly rete.Then several soldered balls 160 are grafted surface engagement face 113, and cutting is single from substrate 110, to constitute the good sphere grid array package assembling (Ball Grid Array package) of reliability-test in substrate 110.
The present invention is applicable to multiple encapsulation form, and the package assembling of particularly approximate wafer size (Chip ScalePackage, CPS).Can not pollute the pad 112 of substrate 110 by B rank rete 122 in processing procedure, so pad 112 in design can be closely near wafer 130, preferably single from becoming package assembling, glutinous crystal face 111 area size of substrate 110 are not more than 1.5 times of wafer 130 fronts 132, to form the CSP package assembling of approximate wafer size.
The present invention can apply to the package assembling of other different shape.As shown in Figure 6, B rank rete 222 is to be formed between substrate 210 glutinous crystal faces 211 and wafer 230 fronts 232, the weld pad 231 that wafer 230 positive 232 forms corresponding to the window 214 of substrate 210, and with the pad 212 of bonding wire 240 electric connection wafers 230 weld pads 231 with substrate 210, in pressing wafer and electric connection wafer step, B rank rete 222 is not hot curing fully, when mold 151 seals substrate 210 with bed die 152 moulds, the filler densification pressure of adhesive body makes B rank rete 222 by urgent and closely knit, reaches the effect of promoting effective adhesive crystal area.

Claims (10)

1, a kind of encapsulation procedure of promoting effective adhesive crystal area, it comprises the steps:
Provide have a glutinous crystal face substrate the substrate step is provided;
With the pressing wafer step of wafer gluing in the glutinous crystal face of substrate;
Electrically connect the electric connection wafer step of wafer and substrate with bonding wire;
The formation adhesive body step of perfusion adhesive body;
It is characterized in that described providing is provided with between substrate step and the pressing wafer step in liquid glue step in substrate formation A rank and baking substrate step;
Forming the liquid glue step in A rank in substrate is to form the liquid glue in the A rank that comprise heat-curable compounds and solvent on the glutinous crystal face at substrate;
Baking substrate step is to remove the solvent of the liquid glue in A rank, to make the liquid glue in A rank form dry B rank rete;
Pressing wafer step is with not completely crued B rank rete the wafer gluing to be sticked crystal face in substrate;
Form the pressing pressure of the filler densification pressure of adhesive body in the Feng Titi step, so that not completely crued B rank rete is closely oppressed in pressing wafer step, to promote effective adhesive crystal area greater than the pressing wafer.
2, the encapsulation procedure of the effective adhesive crystal area of enhancement according to claim 1 is characterized in that describedly forming in substrate that the liquid glue in A rank is to be formed at the glutinous crystal face of substrate with stencil printing patterning part in the liquid glue step in A rank.
3, the encapsulation procedure of the effective adhesive crystal area of enhancement according to claim 1, the filler densification pressure that it is characterized in that adhesive body in the described formation adhesive body step is between 1000 to 1500psi.
4, the encapsulation procedure of the effective adhesive crystal area of enhancement according to claim 1 is characterized in that pressing mold in the described formation adhesive body step provides the injecting glue temperature between 150 ℃~200 ℃ simultaneously, so that B rank rete full solidification is C rank retes.
5,, it is characterized in that the injecting glue temperature is higher than the temperature of toasting in the substrate step in the described formation adhesive body step according to the encapsulation procedure of claim 1 or the effective adhesive crystal area of 4 described enhancements.
6, the encapsulation procedure of the effective adhesive crystal area of enhancement according to claim 1 is characterized in that the pressing-in temp in the described pressing wafer step should be higher than the glass transition temperature of B rank rete.
7, the encapsulation procedure of the effective adhesive crystal area of enhancement according to claim 1 is characterized in that describedly forming in substrate that the liquid glue in A rank is to be formed at the glutinous crystal face of substrate with printing, spraying, spin coating or dip-dye in the liquid glue step in A rank.
8, the encapsulation procedure of the effective adhesive crystal area of enhancement according to claim 1 is characterized in that describedly forming in substrate that the liquid glue in A rank is to be formed at the glutinous crystal face of substrate with screen printing or mould printing in the liquid glue step in A rank.
9, the encapsulation procedure of the effective adhesive crystal area of enhancement according to claim 1 is characterized in that B rank rete is the back side, front or the side of gluing wafer in the described pressing wafer step.
10, the encapsulation procedure of the effective adhesive crystal area of enhancement according to claim 1 is characterized in that cutting substrate is single from package assembling to constitute after described formation adhesive body step, and the glutinous crystal face area size of substrate is not more than 1.5 times of front wafer surface area.
CNB031500102A 2003-07-29 2003-07-29 Encapsulation process for raising effect area of sticking crystal Expired - Fee Related CN1298031C (en)

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Application Number Priority Date Filing Date Title
CNB031500102A CN1298031C (en) 2003-07-29 2003-07-29 Encapsulation process for raising effect area of sticking crystal

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Application Number Priority Date Filing Date Title
CNB031500102A CN1298031C (en) 2003-07-29 2003-07-29 Encapsulation process for raising effect area of sticking crystal

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CN1577780A CN1577780A (en) 2005-02-09
CN1298031C true CN1298031C (en) 2007-01-31

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5972735A (en) * 1998-07-14 1999-10-26 National Starch And Chemical Investment Holding Corporation Method of preparing an electronic package by co-curing adhesive and encapsulant
CN1298202A (en) * 1999-11-30 2001-06-06 中国科学院电子学研究所 Packaging method of hydrogen ion sensitive FET
US6506628B2 (en) * 1997-04-29 2003-01-14 Micron Technology, Inc. Method of attaching a leadframe to singulated semiconductor dice

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6506628B2 (en) * 1997-04-29 2003-01-14 Micron Technology, Inc. Method of attaching a leadframe to singulated semiconductor dice
US5972735A (en) * 1998-07-14 1999-10-26 National Starch And Chemical Investment Holding Corporation Method of preparing an electronic package by co-curing adhesive and encapsulant
CN1298202A (en) * 1999-11-30 2001-06-06 中国科学院电子学研究所 Packaging method of hydrogen ion sensitive FET

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