CN1285764C - Electroless-plating solution and semiconductor device - Google Patents

Electroless-plating solution and semiconductor device Download PDF

Info

Publication number
CN1285764C
CN1285764C CNB028111192A CN02811119A CN1285764C CN 1285764 C CN1285764 C CN 1285764C CN B028111192 A CNB028111192 A CN B028111192A CN 02811119 A CN02811119 A CN 02811119A CN 1285764 C CN1285764 C CN 1285764C
Authority
CN
China
Prior art keywords
electroless
plating
alloy
semiconducter substrate
semiconducter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB028111192A
Other languages
Chinese (zh)
Other versions
CN1527888A (en
Inventor
井上裕章
中村宪二
松本守治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ebara Corp
Original Assignee
Ebara Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ebara Corp filed Critical Ebara Corp
Publication of CN1527888A publication Critical patent/CN1527888A/en
Application granted granted Critical
Publication of CN1285764C publication Critical patent/CN1285764C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76843Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76849Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601Process or apparatus
    • C23C18/1603Process or apparatus coating on selected surface areas
    • C23C18/1607Process or apparatus coating on selected surface areas by direct patterning
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601Process or apparatus
    • C23C18/1633Process of electroless plating
    • C23C18/1635Composition of the substrate
    • C23C18/1637Composition of the substrate metallic substrate
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601Process or apparatus
    • C23C18/1633Process of electroless plating
    • C23C18/1646Characteristics of the product obtained
    • C23C18/165Multilayered product
    • C23C18/1653Two or more layers with at least one layer obtained by electroless plating and one layer obtained by electroplating
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/31Coating with metals
    • C23C18/32Coating with nickel, cobalt or mixtures thereof with phosphorus or boron
    • C23C18/34Coating with nickel, cobalt or mixtures thereof with phosphorus or boron using reducing agents
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/52Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating using reducing agents for coating with metallic material not provided for in a single one of groups C23C18/32 - C23C18/50
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Materials Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemically Coating (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

The present invention relates to an electroless-plating liquid useful for forming a protective film for selectively protecting surface of exposed interconnects of a semiconductor device which has an embedded interconnect structure formed by an electric conductor, such as copper or silver, embedded in fine recesses for interconnects formed in a surface of a semiconductor substrate, and also to a semiconductor device in which surfaces of exposed interconnects are selectively protected with a protective film. The electroless-plating liquid contains cobalt ions, a complexing agent and a reducing agent containing no alkali metal.

Description

Electroless-plating solution
Technical field
The present invention relates to electroless-plating (electroless-plating) solution and semiconducter device.More clearly say; the present invention relates to be used to form the electroless-plating solution of protective membrane; this protective membrane is used for the surface of the interconnection of selective protection semiconducter device exposure; and semiconducter device has following embedding interconnection structure; electric conductor wherein; as copper or silver, be embedded in and be used on the surface of semiconducter substrate or analogue forming interconnection in the meticulous groove.The invention still further relates to a kind of semiconducter device, wherein the surface of the interconnection of Bao Luing is protected with the protective membrane selectivity.
Background technology
As the processing that is used for forming interconnection in semiconducter device, promptly so-called " damascene " (damascene process) had actual application, and it comprises the groove and the contact hole of filling interconnection with metal (electric conductor).According to this processing, aluminium, perhaps the metal of more recent use such as copper or silver are embedded in the groove and contact hole of interconnection, and it is pre-formed in inter-stage (interlevel) dielectric medium in semiconducter substrate.Afterwards by chemically machinery polished (CMP) thus removing unnecessary metal makes substrate surface smooth.
In the last few years, a tangible trend occurred, and be exactly not re-use the material of aluminum or aluminum alloy, and be to use copper (Cu) with low resistance and high electromigration resistance as formation interconnection circuit on semiconducter substrate.Copper-connection forms by filling the meticulous groove that is formed in the substrate surface with copper usually.Known have a multiple method that is used to make this copper-connection, comprises CVD, sputter and plating.Any according in these technology, copper film forms on the almost whole surface of substrate, then removes unwanted copper by CMP.
Handling by this kind in the example that forms interconnection, embedding has exposed surface after being interconnected in smooth processing.When on other embedding is interconnected in the interconnection-exposed surface of this semiconducter substrate, forming, may run into following problem.For example, form the new SiO of formation in the processing at next interlayer dielectric 2During this time, forming the exposed surface that connects earlier may oxidation.Further, at corrosion SiO 2When layer forms interconnected pores, be exposed to the pollutions such as resist that the interconnection of formation earlier on the interconnected pores bottom may be corroded agent, peel off.
For fear of these problems, traditional way is not only on the semiconductor substrate surface zone that exposes interconnection, and all forms the protective layer of SiN or analogue on the whole surface of substrate, prevents to expose the interconnection pollutions such as agent that are corroded whereby.
Yet; in having the semiconducter device that embeds interconnection structure; on the whole surface of semiconducter substrate, all provide the protective membrane of SiN or analogue can improve the specific inductivity of interlayer dielectric; even also can make interconnect delay thereby cause using low electrical resistant material such as copper or silvery to make interconnection, the result weakens the performance of semiconducter device.
In view of this, the someone has proposed selectivity and has covered the surface that exposes interconnection, uses interconnection material such as copper or silver has high-adhesiveness and the low alloy film of resistivity (ρ) is protected interconnection.Alloy film obtains by for example electroless-plating.
Yet, provide this protection alloy film to have the problem that the following sodium hypophosphite with being used as the electroless-plating reductive agent usually interrelates by electroless-plating:
1) containing sodium in the reductive agent can cause semiconducter device to be polluted by basic metal.
2) when using sodium hypophosphite, just can not apply the oxidisability electric current to copper or analogue as reductive agent.This just must provide palladium catalyst to copper or analogue, has reduced output thereby increased treatment step.
3) provide palladium catalyst to copper or analogue, on the principle, the interconnection of the below of copper or analogue can be substituted by palladium, thereby causes forming useless interconnection, and the result has reduced the stability of interconnection.
4) because palladium has the character to copper or analogue diffusion, provide palladium catalyst can improve the resistance of interconnection.
5) except on the zone that forms interconnection, plated film may also can be deposited on the insulating film, makes to be difficult to carry out desired selectivity plated film.
Summary of the invention
The present invention makes in view of the above-mentioned shortcoming in the correlation technique.Therefore the objective of the invention is to carry a kind of electroless-plating solution; thereby it can form the plated film (protective membrane) that a selectivity covers the surface protection interconnection of interconnection; and can not cause any basic metal to pollute and the formation of useless interconnection; and a kind of semiconducter device is provided, wherein exposes interconnection and optionally protected with protective membrane.
In order to obtain above-mentioned purpose, the invention provides a kind of electroless-plating liquid, be used at semiconducter device, it has the embedding interconnection structure, selectivity forms plated film on the surface of the interconnection that exposes, and this electroless-plating liquid comprises the reductive agent of cobalt ion, coordination agent and alkali metal-free.
Use the alkali metal-free reductive agent can avoid semiconducter device to be polluted by basic metal.
Alkylamine borine (alkylamine borane) can be as the reductive agent of alkali metal-free.Use this reductive agent just may be to copper or copper alloy, silver or silver alloys apply oxidation current, thereby can directly carry out electroless-plating.Further, use the alkylamine borine of alkali metal-free can prevent that semiconducter device from being polluted by basic metal, might under the condition of not using palladium catalyst, carry out electroless-plating in addition.
The special example of alkylamine borine can comprise dimethyamine borane, diethylamine borane and Trimethylamine borine.
Electroless-plating liquid can further contain at least a stablizer, and it is selected from one or more heavy metal compounds and sulfide, and tensio-active agent.
The pH value of electroless-plating liquid preferably is adjusted in the scope of 5-14 with the pH regulator agent of alkali metal-free.Use the pH regulator agent of alkali metal-free,, can keep the electroless-plating solution alkali metal-free as ammoniacal liquor or quaternary ammonium hydroxide.The pH value of plating bath is preferably 6-10.
The present invention further provides the electroless-plating liquid that is used for exposing selectivity formation plated film on the surface that interconnects at semiconducter device, this semiconducter device has the embedding interconnection structure, and this electroless-plating solution comprises cobalt ion, coordination agent, contains the compound of refractory metal and the reductive agent of alkali metal-free.
At least a of tungsten and molybdenum can be used as refractory metal.Reductive agent can be the alkylamine borine.By using this kind compound, electroless-plating liquid can provide the protective membrane of Co-W-B alloy, Co-Mo-B alloy or Co-Mo-W-B alloy to cover the surface that exposes interconnection.
The present invention further provides a kind of semiconducter device; it has the embedding interconnection structure of copper or copper alloy or silver or silver alloys interconnection; the surface that wherein exposes interconnection is covered with the protective membrane selectivity; protective membrane is handled by electroless-plating with electroless-plating liquid and is formed, and electroless-plating liquid comprises the reductive agent of cobalt ion, coordination agent and alkali metal-free.
By so optionally covering interconnect surface and using silver or copper are had high-adhesiveness and the low alloy protecting film protection interconnection of resistivity (ρ), just can suppress semiconducter device, it has the embedding interconnection structure, the increase of interlayer dielectric specific inductivity.Further, use low electrical resistant material such as silver or copper, can realize semi-conductive acceleration and enrichment as interconnection material.
The present invention further provides a kind of semiconducter device that embeds interconnection structure that has, the surface that wherein exposes interconnection is optionally covered with the protective membrane that contains the cobalt metal.The thickness of metallic membrane is preferably 0.1-500nm.
The present invention further provides a kind of semiconducter device that embeds interconnection structure that has, the surface that wherein exposes interconnection is optionally covered with the alloy that contains cobalt and refractory metal.Refractory metal is preferably at least a in tungsten and the molybdenum.
The invention provides a kind of method that is used for producing the semiconductor devices, comprising: thus carrying out electroless-plating selectivity formation plated film protective layer on the surface of this semiconducter substrate interconnection on the semiconducter substrate with embedding interconnection structure with electroless-plating liquid; Wherein electroless-plating liquid comprises the reductive agent of cobalt ion, coordination agent and alkali metal-free.
The present invention further provides a kind of method that is used for producing the semiconductor devices, having comprised: thus carrying out electroless-plating selectivity formation plated film protective layer on the surface of this semiconducter substrate interconnection on the semiconducter substrate with embedding interconnection structure with electroless-plating liquid; Wherein electroless-plating liquid comprises cobalt ion, coordination agent, contains the compound of refractory metal and the reductive agent of alkali metal-free.
The example of alloy comprises the Co-B alloy, the Co-P alloy, the Co-W-B alloy, the Co-W-P alloy, the Co-Mo-B alloy, the Co-Mo-P alloy, the Co-W-Mo-B alloy, the Co-W-Mo-P alloy, the Co-Ti-B alloy, the Co-Ti-P alloy, the Co-Ta-B alloy, the Co-Ta-P alloy, the Co-Ti-Ta-B alloy, the Co-Ti-Ta-P alloy, the Co-Ti-W-B alloy, the Co-Ti-W-P alloy, the Co-Ti-Mo-B alloy, the Co-Ti-Mo-P alloy, the Co-Ti-Ta-B alloy, the Co-Ti-Ta-P alloy, the Co-Ta-W-B alloy, the Co-Ta-W-P alloy, the Co-Ta-Mo-B alloy, the Co-Ta-Mo-P alloy, the Co-Ti-W-Mo-B alloy, the Co-Ti-W-Mo-P alloy, the Co-Ta-W-Mo-B alloy, the Co-Ta-W-Mo-P alloy, Co-Ti-Ta-W-Mo-B alloy and Co-Ti-Ta-W-Mo-P alloy.
The accompanying drawing summary
Figure 1A-C illustrates according to the present invention the example that forms copper-connection in semiconducter device according to processing sequence;
Fig. 2 is the sketch plan of electroless-plating device example;
Fig. 3 is the sketch plan of another example of electroless-plating device;
Fig. 4 is the orthographic plan of the semiconductor-fabricating device example that is used for producing the semiconductor devices according to the present invention;
Fig. 5 is the orthographic plan of another example of semiconductor-fabricating device of being used for producing the semiconductor devices according to the present invention;
Fig. 6 is the orthographic plan of another example of semiconductor-fabricating device that is used for producing the semiconductor devices according to the present invention;
Fig. 7 A and 7B are the sketches of the test specimens SEM image that obtains in example; With
Fig. 8 A and 8B are the sketches of the specimen SEM image that obtains in comparative example.
Realize optimal mode of the present invention
With reference now to description of drawings the preferred embodiments of the present invention.
Figure 1A-2C illustrates according to the present invention the example that forms copper-connection in semiconducter device according to the order of treatment step.Shown in Figure 1A, SiO 2Insulating film 2 is deposited on the conductive layer 1a, and it is formed on the semi-conductor base portion that bears semiconducter device.The contact hole 3 and the groove 4 of interconnection are formed in the insulating film 2 by photoetching/etching technique.Afterwards, the blocking layer of TaN or analogue (barrier layer) forms on whole surface, as copper seed layer (the copper seed layer) 6 that electroplates electric accommodating layer formation on blocking layer 5 by sputter or similar approach.
Then, shown in Figure 1B, plate with copper filling contact hole 3 and groove 4 thereby on the surface of semiconducter substrate W, carry out copper, simultaneously depositing copper film 7 on insulating film 2.Afterwards, remove by chemically machinery polished (CMP) on copper film 7 on the insulation layer 2 and blocking layer 5, thereby make the surface of the copper film 7 of filling interconnection contact hole 3 and groove 4 and the surface of insulating film 2 be located substantially on same plane.The interconnection 8 that is made of copper seed layer 6 and copper film 7 is shown in Fig. 1 C, just be formed in the insulation layer 2.
Then, carry out electroless-plating on the surface of semiconducter substrate W, thereby optionally form the protective membrane 9 that is made of alloy film on the exposed surface of interconnection 8, the protection interconnection 8 whereby.The thickness of protective membrane 9 is generally 0.1-500nm, is preferably 1-200nm, more preferably is 10-100nm.
Protective membrane forms by for example using the electroless-plating liquid that contains cobalt ion, coordination agent, pH damping fluid, pH regulator agent and be used as the alkylamine borine of reductive agent; be immersed in the plating bath perhaps with the plating bath that further contains infusibility (high-melting-point) metal such as tungsten and molybdenum, and with semiconducter substrate W surface.
If desired, plating bath can further contain at least a stablizer, and it is selected from one or more heavy metal compounds and sulfide, and tensio-active agent.Further, with pH regulator agent such as ammoniacal liquor or quaternary ammonium hydroxide the pH value of plating bath preferably being adjusted in 5-14, more preferably is 6-10.The temperature of plating bath is generally 30-90 ℃, is preferably 40-80 ℃.
By providing protectiveness film 9 to protect interconnection 8, when then forming other embedding interconnection structure thereon, can form at next interlayer dielectric and form new SiO in the processing 2Prevent interconnect surface generation oxidation during this time, and prevent at corrosion SiO 2The pollutions such as resist that interconnection is corroded agent, peels off during layer.
Use contains cobalt ion, coordination agent, pH damping fluid, pH regulator agent and is used as the plating bath of the alkylamine borine of reductive agent, and the protective membrane 9 that is made of the Co-B alloy film is provided.Use and further to contain refractory metal, as tungsten and molybdenum, plating bath, the protective membrane that is made of Co-W-B alloy film, Co-Mo-B alloy film or Co-Mo-W-B alloy film is provided.
Cover the surface of interconnection 8 and interconnect 8 by selectivity with protective membrane 9 protections; wherein protective membrane 9 is by the copper as interconnection material being had high-adhesiveness and having the alloy film formation of low-resistivity (ρ); can suppress the raising of semiconducter device inter-stage dielectric Constant, wherein this semiconducter device has the embedding interconnection structure.Further, use low electrical resistant material copper can realize semi-conductive acceleration and enrichment as interconnection material.
Although what this example showed is to use copper as interconnection material, copper alloy, silver or silver alloys also can use.
Cobalt ion contained in the plating bath can be provided by cobalt salt, for example rose vitriol, cobalt chloride or Cobaltous diacetate.The content of cobalt ion is generally 0.001-1mol/L, is preferably 0.01-0.3mol/L.
The special example of coordination agent can comprise carboxylic acid, for example acetic acid, and salt; Hydroxy carboxylic acid (oxycarboxylic acid), for example tartrate and citric acid, and salt; Amido carboxylic acid (aminocarboxylic acid), for example Padil, and salt.These compounds can use separately or use as two or more mixture.The total amount of coordination agent is generally 0.001-1.5mol/L, is preferably 0.01-1.0mol/L.
About the pH damping fluid, anyly do not contain sodium or any other alkali-metal damping fluid can use.Ammonium sulfate, ammonium chloride and boric acid can be used as special example.The content of used pH damping fluid is generally 0.01-1.5mol/L, is preferably 0.1-1mol/L.
About the pH regulator agent, anyly do not contain sodium or any other alkali-metal pH regulator agent can be used.Ammoniacal liquor and tetramethyl ammonium hydroxide (TMAH) can be used as special example.By using the pH regulator agent, the pH of plating bath can be adjusted in 5-14 usually, is preferably 6-10.
Similarly, reductive agent also should not contain sodium or any other basic metal.Preferably use the alkylamine borine.As the alkylamine borine, can should be mentioned that dimethyamine borane (DMAB) and diethylamine borane.The content of used reductive agent is generally 0.01-1mol/L, is preferably 0.01-0.5mol/L.
The examples for compounds that contains refractory metal can comprise wolframic acid, molybdic acid and salt thereof; And heteropolyacid (heteropoly acid), for example phospho-wolframic acid (H for example 3(PW 12P 40) nH 2And salt O).When protective membrane is not can use Ti or Ta when forming with electroless-plating yet.The used content that contains the compound of refractory metal is generally 0.001-1mol/L, is preferably 0.01-0.1mol/L.The example of cobalt/refractory metal alloy comprises the Co-B alloy, the Co-P alloy, the Co-W-B alloy, the Co-W-P alloy, the Co-Mo-B alloy, the Co-Mo-P alloy, the Co-W-Mo-B alloy, the Co-W-Mo-P alloy, the Co-Ti-B alloy, the Co-Ti-P alloy, the Co-Ta-B alloy, the Co-Ta-P alloy, the Co-Ti-Ta-B alloy, the Co-Ti-Ta-P alloy, the Co-Ti-W-B alloy, the Co-Ti-W-P alloy, the Co-Ti-Mo-B alloy, the Co-Ti-Mo-P alloy, the Co-Ti-Ta-B alloy, the Co-Ti-Ta-P alloy, the Co-Ta-W-B alloy, the Co-Ta-W-P alloy, the Co-Ta-Mo-B alloy, the Co-Ta-Mo-P alloy, the Co-Ti-W-Mo-B alloy, the Co-Ti-W-Mo-P alloy, the Co-Ta-W-Mo-B alloy, the Co-Ta-W-Mo-P alloy, Co-Ti-Ta-W-Mo-B alloy and Co-Ti-Ta-W-Mo-P alloy.Wherein, according to the present invention, in electroless-plating, particularly preferably use the alloy of tungstenic and/or molybdenum.Because do not contain basic metal, the alloy of boracic or phosphorus also belongs to usable range.The alloy that contains Ti or Ta uses in non-electroless-plating is handled.
Except the top compound of mentioning, other known additives also can join in the plating bath.The example of useful additives comprises bath stability agent (bath stabilizer), and it can be a heavy metal compound, for example lead compound, sulphur compound such as thiocyanate-or its mixture and negatively charged ion, positively charged ion or nonionic surface active agent.
As mentioned above, preferably use the alkylamine borine of no sodium as reductive agent.Use the alkylamine borine to make and to apply oxidation current to copper, copper alloy, silver or silver alloys, thereby avoid the use of palladium catalyst, thereby can directly carry out electroless-plating, and can prevent that semiconducter device from being polluted by basic metal.Therefore, electroless-plating liquid, it uses the alkylamine borine as reductive agent, makes and might carry out electroless-plating in the plating bath by semiconductor device surface is immersed, and need not apply palladium catalyst.Thereby this can reduce needed treatment step and improve output, prevents because palladium substitutes the formation of useless interconnection in the copper-connection that causes and avoids being spread by palladium the raising of the interconnection impedance that is caused.
Further, have been found that in use to contain when carrying out electroless-plating as the plating bath of reductive agent that plated film optionally is deposited on copper or the silver with the alkylamine borine.This is a plating interconnect area optionally just.
Fig. 2 is the summary structure iron of electroless-plating device.As shown in Figure 2, this electroless-plating device comprises stationary installation 11, and it is used for the surface fixed thereon with semiconducter substrate W; Resistance part, dam part (dam member) (plating bath load carrier) 31, it is used for contact and treats that by stationary installation 11 fixed semiconducter substrate W the neighboring part on plating surface (upper surface) is to seal this neighboring part; And shower nozzle (electroless-plating liquid (scattering) feeding mechanism) 41, it is used for to treating that the plating surface provides plating bath (electroless-plating liquid), treats that wherein the plating surface belongs to the semiconducter substrate W of neighboring part with 31 sealings of resistance part, dam part.The electroless-plating device further comprises scavenging solution feeding mechanism 51, and it is arranged on and is used near the upside neighboring of stationary installation treating plating surface supply scavenging solution to semiconducter substrate W; Returnable 61, it is used to reclaim the scavenging solution or the analogue (plating waste liquid) of release; Plating bath reclaims nozzle 65, and it is used to suck and reclaim the plating bath that is retained on the semiconducter substrate W; And electric motor (rotating driving device) M, it is used for rotation and drives stationary installation 11.
Stationary installation 11 have on the surface thereon be used to put and fixedly the substrate of semiconducter substrate W put part 13.Substrate puts that part 13 is suitable for introducing and fixing semiconducter substrate W.Especially, substrate is put part 13 and is had vacuum attraction mechanism (not shown), is used for by pull of vacuum semiconducter substrate W being attracted at its back.Heat from the bottom keeping it warm on the plating surface for the treatment of of 15 couples of semiconducter substrate W of plane backside heaters (heating unit), and be installed in the back side that semi-conductor is put part 13.Backside heaters 15 is made of for example rubber heater.This stationary installation 11 is rotated by electric motor M, and realizes vertical movement by the lifting gear (not shown).
Resistance part, dam part 31 is cylindrical, and the neighboring that hermetic unit 33 is used for sealing semiconductor substrate W is installed in its underpart, and it is for fear of the vertical shifting that takes place from shown position that resistance part, dam part is installed.
Shower nozzle 41 is following a kind of structures, is equipped with at its front end manyly the plating bath that is provided with the scattering of shower form is provided and is suitable for plating bath is provided to the nozzle that semiconducter substrate W treats the plating surface basically equably.Scavenging solution feeding mechanism 51 has the structure that is suitable for from nozzle 53 spraywashing liquid.
Plating bath recovery nozzle 65 is suitable for upwards, downward and oscillating motion, the front end that plating bath reclaims nozzle 65 is suitable for inside reduction, thereby be lower than resistance part, the dam part 31 that is positioned on the upper surface of semiconducter substrate W edge section, and be suitable for sucking the plating bath on the semiconducter substrate W.
The following describes the operation of electroless-plating device.At first, thereby stationary installation 11 provides the slit with the size of pre-determining from the shown position reduction between stationary installation 11 and resistance part, dam part 31, and semiconducter substrate W is positioned at and is fixed in substrate and puts on the part 13.The wafer of for example using 8 inches is as semiconducter substrate W.
Then, promote stationary installation 11 and also its upper surface is contacted with the lower surface of resistance part, dam part 31, as shown in Figure 2, and the neighboring of semiconducter substrate W is sealed with the hermetic unit 33 of resistance part, dam part 31.At this moment, the surface of semiconducter substrate W is in open state.
Then, semiconducter substrate W itself is by backside heaters 15 and direct heating, injects plating baths and plating bath is poured on the whole substantially surface of semiconducter substrate W from shower nozzle 41 simultaneously.Because the surface of semiconducter substrate W is surrounded by resistance part, dam part 31, the plating bath of toppling over all can be retained on the surface of semiconducter substrate W.The amount of the plating bath that provides can be 1mm thick (approximately 30ml) on the surface of semiconducter substrate W in a small amount.Being retained in the lip-deep plating bath degree of depth to be plated can be for 10mm or still less, in addition the same with present embodiment be 1mm.If provide a spot of plating bath just enough, the heating unit that is used to heat plating bath can be small size.
If semiconducter substrate W itself is suitable for being heated, the bath temperature that needs a large amount of power consumptions to heat does not so just need to rise to so high.This is preferred, because can reduce power consumption, and can prevent the change of plating solution performance.The power consumption that is used to heat semi-conductor W itself can be less, and the plating bath amount that is stored on the semiconducter substrate W is also less.Like this, just can easily add insulation by 15 couples of semiconducter substrate W of backside heaters, and the volume of backside heaters 15 can be less, device can make compactness.If use the directly device of cooling semiconducter substrate W itself, just can during plating, heat with refrigerative and change to change the plating condition.Because the amount of the plating bath that keeps on the semiconducter substrate is less, temperature control can have very high susceptibility.
Semiconducter substrate W is instantaneous to be rotated with electric motor M, thereby it is wetting that uniform liquid is carried out on surface to be plated, under the following conditions plating carried out on surface to be plated then, and promptly semiconducter substrate W remains static.Especially, semiconducter substrate W rotated for 1 second with 100rpm or lower rotating speed, thus make plating bath equably wetting semiconducter substrate W treat the plating surface.It is static to keep semiconducter substrate W to be in then, carries out 1 minute electroless-plating.Instantaneous rotational time is the longest to be 10 seconds or still less.
Finish after the plating processing, the front end of plating bath recovery nozzle 65 is reduced to the interior region near resistance part, the dam part 31 of the neighboring part that is positioned at semiconducter substrate W, to suck plating bath.At this moment, if semiconducter substrate W is rotated with for example 100rpm or lower speed of rotation, the plating bath that is retained on the semiconducter substrate W can accumulate under action of centrifugal force in part 31 parts of resistance part, dam, it is positioned at the neighboring part of semiconducter substrate W, reclaims thereby can carry out plating bath with good efficiency and higher recovery speed.Reduce stationary installation 11 with separating semiconductor substrate W and resistance part, dam part 31.When semiconducter substrate W began to rotate, scavenging solution (ultrapure water) was ejected into from the nozzle 53 of scavenging solution feeding mechanism 51 on the coating surface of semiconducter substrate W with the cooling coating surface, and diluted simultaneously and cleans, stopped electroless-plating whereby and reacted.At this moment, thus can be fed to resistance part, dam part 31 from the scavenging solution that nozzle 53 sprays cleans resistance part, dam part 31 simultaneously.At this moment, the plating waste liquid is recovered in the returnable 61 and discharges.
In a single day plating bath uses just and utilizes no longer again, but loses.As mentioned above, this install that employed plating bath amount compares with prior art can be in the extreme little.Like this, the plating bath amount that is discharged is also very little even need not reuse.In some cases, plating bath can be installed reclaim nozzle 65, employed plating bath can be used as the plating waste liquid and in scavenging solution is recovered in returnable 61.
Then, utilizing spins dewaters to be rotated at a high speed thereby semiconducter substrate W is with electric motor M, then semiconducter substrate W is removed from stationary installation 11.
Fig. 3 is the summary structure iron of another electroless-plating device.The example of Fig. 3 and aforementioned electroless-plating device difference shown in Figure 2 are, backside heaters 15 is not installed in stationary installation 11, but on stationary installation 11 arrangement lamp well heater (heating unit) 17, lamp well heater 17 and shower head 41-1 combine.A plurality of annular lamp well heaters 17 with different radii for example are installed with one heart, and many nozzle 43-2 of shower head 41-2 are open in the form of a ring from the slit between the lamp well heater 17.Lamp well heater 17 can be made of single helical lamp well heater, perhaps can be made of other lamp well heater with various structures and arrangement.
Utilize this structure, plating bath can be treated the plating surface with what the shower form was fed to semiconducter substrate W basically equably from each nozzle 43-2.Further, the heating of semiconducter substrate W and insulation can directly be carried out equably by lamp well heater 17.Lamp well heater 17 not only heats semiconducter substrate W and plating bath, goes back the circumference air, thereby shows the insulation effect on semiconducter substrate W.
Consume relatively large lamp well heater by lamp well heater 17 direct heating semiconducter substrate W required powers.Position at this lamp well heater 17, thereby lamp well heater 17 that watt consumption is less relatively and backside heaters 15 shown in Figure 2 can be united use mainly with backside heaters heating semiconducter substrate W, and mainly are incubated with 17 pairs of plating baths of lamp well heater and ambient air.By mode same as the previously described embodiments, can install be used for directly and or the device that cools off semiconducter substrate W indirectly carry out temperature control.
Fig. 4 is the orthographic plan of semiconductor-fabricating device example, and it is used to make semiconductor device according to the invention.Semiconductor-fabricating device comprises load/unload part 201, first plating equipment 202, first robot (robot) 203, recovery system 205 and 206, second cleaning equipment 207, second robot 208, first cleaning equipment 209, second plating equipment 227, first polissoir 210 and second polissoir 211 of accommodation box (cassette) 201-1.Further, be attached with front/rear coating film thickness metering facility 212 in first robot 203, it is used at the thickness of plating fore-and-aft survey plated film and drying regime film thickness metering facility 213, and it is used at the thickness of measuring the film of drying regime on the semiconducter substrate W after the polishing.
First polissoir 210 has polishing block 210-1, collar (top ring) 210-2, collar head 210-3, film thickness metering facility 210-4 and pusher 210-5.Second polissoir 211 has polishing block 211-1, collar 211-2, collar head 211-3, film thickness metering facility 211-4 and pusher 211-5.
The following describes the treatment step in this device.
At first, the box 201-1 of holding semiconductor substrate W is positioned on the loading station of load/unload part 201, wherein on each semiconducter substrate W, forms copper seed layer 6 (seeing Figure 1A).Semiconducter substrate is taken out with first robot 203, and forms copper film 7 (seeing Figure 1B) by first plating equipment 202.The formation of copper film 7 is by the wetting ability processing being carried out on the surface of semiconducter substrate W and then copper facing is carried out.Carry out rinsing or cleaning then.If more idle times then can carry out drying.When semiconducter substrate W took out with first robot 203, the film thickness of copper plating film 7 was measured with plating caudacoria measurer for thickness 212 with plating is preceding.Measuring result is recorded in semiconducter substrate W as record data to be gone up and is used to judge the unusual of first plating equipment 202.Measure after the film thickness, first robot 203 is delivered to tipping arrangement 205 with semiconducter substrate W, therein semiconducter substrate W is overturn.
Then, second robot 208 takes from tipping arrangement 205 and gets semiconducter substrate W, and places it on pusher 210-5 or the 211-5.Collar 210-2 or 211-2 pass through to draw fixedly semiconducter substrate then, and it is delivered on polishing block 210-1 or the 211-1, thereby the glazed surface that is pressed to polishing block 210-1 or 211-1 is then carried out polishing.
Finish after the polishing, collar 210-2 or 211-2 turn back to pusher 210-5 or 211-5 with semiconducter substrate W.Second robot 208 takes gets semiconducter substrate W, and is carried in first cleaning equipment 209.At this moment, can spray chemical liquids with above removing particle or making that particle is difficult to stick to the surface and the back side of the semiconducter substrate W on pusher 210-5 or the 211-5.
In first cleaning equipment 209, clean and clean the surface and the back side of semiconducter substrate W.Use the rinse water that contains pure water to clean and clean the surface and the back side of semiconducter substrate W by PVA roll sponge, this mainly is in order to remove degranulation, wherein to have added tensio-active agent, sequestrant or pH regulator agent in the pure water.The back side of extensive chemical liquid such as DHF directive semiconducter substrate W is with the copper of corrosion diffusion.The if there is no problem of copper diffusion, the back side of semiconducter substrate W uses the chemical liquids identical with treat surface to clean and clean by PVA roll sponge.
After the cleaning, second robot 208 takes gets semiconducter substrate W, and it is delivered to tipping arrangement 206, at this place's upset semiconducter substrate W.Second robot 208 takes once more to be got semiconducter substrate W and it is delivered to second plating equipment 227, and it is made of for example Fig. 2 or electroless-plating equipment shown in Figure 3.In second plating equipment 227, the surface of semiconducter substrate W is immersed in the plating bath, for example above-mentioned electroless-plating liquid, thus alloy protecting film 9 optionally forms (seeing Fig. 1 C) on the exposed surface of interconnection 8.Afterwards, second robot 208 takes gets semiconducter substrate W, and it is delivered to tipping arrangement 206, at this place's upset semiconducter substrate W, then semiconducter substrate is delivered to second cleaning equipment 207.In second cleaning equipment in 207, will apply the surface of million water (megasonic water) directive semiconducter substrate W of ultra sonic oscillation with clean surface.At this moment, the surface can be cleaned with the scavenging solution that contains pure water by the pen type sponge, is added with tensio-active agent, sequestrant or pH regulator agent in the pure water.Afterwards, by centrifugal drying semiconducter substrate W.
Second robot 208 takes and gets semiconducter substrate W and do not add with handling it is not delivered to tipping arrangement 206 then.First robot 203 takes semiconducter substrate W and gets tipping arrangement 206.Under following situation, after promptly near film thickness measuring apparatus 210-4 usefulness is installed in polishing block 210-1 or 211-1 or 211-4 measured film thickness, semiconducter substrate W was received by the box 201-1 that is placed in the loading and unloading part 201 unloading parts.Measure at needs under the situation of multilayer film film thickness, need carry out the measurement under the drying regime.Like this, the thickness of film is just measured once with drying regime film thickness measuring apparatus 213.
Fig. 5 is the orthographic plan of another example of semiconductor-fabricating device, and it is used for semiconducter substrate constructed in accordance.Utilize the lining processor of Fig. 4; the substrate manufacturing that this semiconductor-fabricating device is carried out comprises the steps: to have the semiconducter substrate W of inculating crystal layer 6 to go up formation copper film 7 thereon; polished substrate; selectivity forms protective membrane 9 in interconnection 8; circuit interconnection is provided whereby, and the 8 usefulness protective membranes that wherein interconnect are optionally protected.
In this semiconductor-fabricating device, pusher protractor (pusher indexer) 225 is arranged near first burnishing device 210 and second burnishing device 211, substrate mounting table 221,222 is arranged near second cleaning equipment 207 and second plating equipment 227, and robot 223 (hereinafter being referred to as second robot 223) is arranged near second plating equipment 227 and first plating equipment 202.Further, robot 224 (hereinafter being referred to as the 3rd machine 224) is arranged near first cleaning equipment 209 and second cleaning equipment 207, and drying regime film thickness measuring apparatus 213 is arranged near the load/unload part 201 and first robot 203.
The semiconducter substrate W that it has inculating crystal layer 6 gets from being placed on to take in the box 201-1 on load/unload part 201 loading stations in first robot 203, and places it on the substrate mounting table 221.Then, second robot 223 is delivered to first plating equipment 202 with semiconducter substrate W, forms copper film 7 (seeing Figure 1B) at this place.Second robot 223 transmits the semiconducter substrate W that is formed with copper film 7 on it, and the thickness of and plating caudacoria measurer for thickness 212 measurement copper films 7 preceding with plating.Measure after the film thickness, semiconducter substrate is carried to pusher protractor 225.
Collar 210-2 or 211-2 are fixed on semiconducter substrate W on the pusher protractor 225 by drawing, and it are delivered to polishing block 210-1 or 211-1 polishes.After the polishing, semiconducter substrate 2 is delivered to film thickness measuring apparatus 210-4 for collar 210-2 or 211-2 or 211-4 measures film thickness.Then, above collar 210-2 or 211-2 are delivered to pusher protractor 225 with semiconducter substrate W and place it in.
Then, the 3rd robot 224 takes from pusher protractor 225 and gets semiconducter substrate W, and is carried to first cleaning equipment 209.After in first cleaning unit 209, cleaning; the 3rd robot 223 takes gets the semiconducter substrate W that has cleaned; and take it to second plating equipment 227, form protective membrane 9 at this place by for example electroless-plating selectivity on the surface of interconnection 8, whereby protection interconnection 8 (seeing Fig. 1 C).Afterwards, the 3rd robot 224 is carried to semiconducter substrate W and cleans in second cleaning equipment 207 and drying, and the semiconducter substrate W that will clean is placed on the substrate mounting table 222.Then, first robot 203 takes to be got semiconducter substrate W and is carried to drying regime film thickness measuring apparatus 213, measures the thickness of film at this place, then substrate is put in the box 201-1, and it is positioned on the unloading part of load/unload part 201.
Fig. 6 is the orthographic plan that is used for another example of semiconductor-fabricating device of semiconducter device constructed in accordance.The blocking layer is installed in this semiconductor-fabricating device forms unit 111, inculating crystal layer forms unit 112, plated film forms unit 113, annealing unit 114, first cleaning unit 115, inclined-plane and back side cleaning unit 116, for example has block coating unit (cap plating unit) 117 as Fig. 2 or electroless-plating equipment shown in Figure 3, second cleaning unit 118, first calibrator and film thickness measuring apparatus 141, second calibrator and film thickness measuring apparatus 142, the first substrate tipping arrangement 143, the second substrate tipping arrangement 144, the temporary transient mounting table 145 of substrate, tertiary membrane measurer for thickness 146, load/unload unit 120, first burnishing device 121, second burnishing device 122, first robot 131, second robot 132, the 3rd robot 133 and the 4th robot 134.Film thickness measuring apparatus 141,142 and 146 is positive size and identical unit, other unit (plating, cleaning, annealing unit and similar units), therefore can exchange.
In the present embodiment, not having electric Ru plating appts can form unit 111 as the blocking layer, and no electrolytic copper plating appts can form unit 112 as inculating crystal layer, and an electroplanting device forms unit 113 as plated film.
The following describes the treatment step in this device.
At first, will take out the box 120a of semiconducter substrate on being positioned over load/unload unit 120 with first robot 131, and to treat that plating surface state up is placed in first calibrator and the film thickness measuring unit 141.To carry out the set positions reference point that film thickness is measured in order giving, recess calibration (notch alignment) to be carried out in the film thickness measurement, obtain the film thickness data on the copper film formation semiconducter substrate before then.
Then, with first robot 131 semiconducter substrate is delivered to the blocking layer and forms unit 111.It is to be used for not being plated in the device that forms the blocking layer on the semiconducter substrate by there being electric Ru that the blocking layer forms unit 111, and the blocking layer forms unit 111 and forms the Ru films as being used to stop copper to semiconducter device interlayer insulating film (SiO for example 2) diffusion film.The semiconducter substrate that unloads after cleaning and the drying step is delivered to first calibrator and film thickness measuring unit 141 by first robot 131, measures the film thickness of semiconducter substrate at this place, for example the film thickness on blocking layer.
Measure semiconducter substrate afterwards through film thickness and be carried to inculating crystal layer formation unit 112 by second robot 132, inculating crystal layer 6 (seeing Figure 1A) is by having electric Cu plating and not forming on the blocking layer.The semiconducter substrate that unloads after cleaning and the drying step is delivered to second calibrator and film thickness measuring unit 142 by second robot 132, be used for before semiconducter substrate is delivered to plated film formation unit 113, determining the recess position, then the copper plating carried out the recess calibration.If desired, before forming, can in film thickness measuring apparatus 142, measure copper film the film thickness of semiconducter substrate once more.
The semiconducter substrate of finishing the recess calibration is delivered to plated film by the 3rd robot 133 and forms unit 113, at this place semiconducter substrate is carried out the copper plating.The semiconducter substrate that unloads after cleaning and the drying step to inclined-plane and back side cleaning unit 116, is removed the unwanted copper film of semiconducter substrate peripheral part (inculating crystal layer) by the 3rd robotic delivery at this place.In inclined-plane and back side cleaning unit 116, the inclined-plane corroded in the predefined time, and adhered to the copper at the semiconducter substrate back side with chemical liquids such as hydrofluoric acid clean.At this moment, before semiconducter substrate being delivered to inclined-plane and back side cleaning unit 116, measure the film thickness of semiconducter substrate with second calibrator and film thickness measuring apparatus 142, thereby obtain the copper film one-tenth-value thickness 1/10 that plating forms according to the acquisition result, inclined-plane etching time change at random and corroding.Inclined-plane corrosion institute corrosive zone is the zone corresponding to the substrate perimeter edge part, and wherein do not have electric current to form, though or formed electric current as the zone of final chip.Chamfered portion just is comprised in this zone.
The semiconducter substrate that unloads after cleaning in inclined-plane and back side cleaning unit 116 and the drying step is delivered to substrate tipping arrangement 143 by the 3rd robot 133.Make by substrate tipping arrangement 143 upset semiconducter substrate coating surface directly down after, just semiconducter substrate is incorporated in the annealing unit 144 by the 4th robot 134, stablize interconnecting parts whereby.Before the anneal and/or afterwards, semiconducter substrate is carried to second calibrator and film thickness measuring unit 142, is formed at the film thickness of the copper film 7 (seeing Figure 1B) on the semiconducter substrate in this place's measurement.Then, semiconducter substrate is carried in first burnishing device 121, the inculating crystal layer 6 (seeing Figure 1A) of copper film 7 and semiconducter substrate is polished by the 4th robot 134.
What used this moment is the abrasive grains or the analogue of wishing, but also can use the fixed abrasive, thereby prevents to cave in and improve the planeness on surface.Finish after the main polishing, just semiconducter substrate is delivered to first cleaning unit 115, it is cleaned at this place by the 4th robot 134.This cleans to shampooing and cleans, and wherein the roll that length is identical with the semiconducter substrate diameter is positioned over the surface and the back side of semiconducter substrate, and rotation semiconducter substrate and roll flow through pure water or deionized water simultaneously, whereby semiconducter substrate are cleaned.
After finishing main polishing, semiconducter substrate is delivered to second burnishing device 122 by the 4th robot 134, at this place the blocking layer on the semiconducter substrate 5 is polished.What used this moment is the particle of the grinding of hope, but also can use the fixed abrasive to cave in to stop, and improves the planeness on surface.Finish after second polishing, semiconducter substrate is delivered to first cleaning unit 115 once more, shampoo cleaning at this place with the 4th robot 134.Finish after the cleaning, by the 4th robot 134 semiconducter substrate is delivered to the second substrate tipping arrangement 144, make that in this place's upset semiconducter substrate coating surface is placed on semiconducter substrate on the temporary transient mounting table 145 of substrate by the 3rd robot 133 then directly up.
With second robot 132 semiconducter substrate is delivered to block coating unit 117 from the temporary transient mounting table 145 of substrate, at this place for example nickel boron plating (block coating) is carried out on 8 the surface of interconnecting, to prevent that copper is because of the atmosphere oxidation.Semiconducter substrate (wherein having formed protective membrane 9 (seeing Fig. 1 C) with protection interconnection 8 by the block coating on the surface of interconnection 8) is delivered to tertiary membrane thickness measurement device 146 by second robot 132, measures the thickness of copper film at this place.Afterwards, semiconducter substrate is delivered to second cleaning unit 118 by first robot 131, locates with pure water or washed with de-ionized water substrate at this.The semiconducter substrate that process is cleaned turns back to the box 120a in the load/unload unit 120.
Example
In insulating film, be of a size of the dark (depth-width ratio: hole 1.0) of Φ 0.5 μ m * 0.5 μ m with predetermined gradient formation.Fill after this hole with copper, handle by CMP and should prepare the sample (semiconductor wafer) that is of a size of 3cm * 4cm (having 6 graphical configuration (6-patternformation)) in the surface with smooth.Sample carries out electroless-plating with plating bath with the plating bath loading capacity of 200ml/ chip and applies, shown in the table 1 composed as follows of plating bath.
Table 1
CoSO 4·7H 2O 28.1g/L
L-tartrate 82.5g/L
(NH 4) 2SO 4 39.6g/L
DMAB 1.5g/L
TMAH(27%) 455ml/L
H 2WO 4 5.0g/L
pH 9.0
Temperature 80℃
Finish after the electroless-plating, clean and dry sample.When sample is observed, find the optionally growth in forming the zone of pattern of Co-W-B film of plating under SEM.The speed of growth of plated film is approximately 100nm/min; Plated film is analyzed as follows:
Co: about 98.4at%, W: about 1.0at%, B: about 0.6at%.
Fig. 7 A and 7B are the sketches of the SEM image of sample.As shown in the figure, at copper film 14, it is embedded in the hole 12 that is formed in the insulation layer 10, the interior space that do not form.Further, have only the surface of copper film 14, for example Hu Lian surface is just covered by the protective membrane that the Co-W-B film by plating constitutes, and does not deposit the Co-W-B film on the surface of insulating film 10, shows that plating has the selectivity of height.
Comparison example
Prepared with example in employed identical sample.This sample at first is immersed in 25 ℃ PdCl 2(0.005g/L)+and kept 1 minute in HCl (0.2ml/L) solution, thus palladium catalyst provided to sample.Then, the sample that palladium catalyst is provided is immersed in 90 ℃ the plating bath, its composition is illustrated in fig. 2 shown below, and carries out electroless with plating 0 loading capacity (bathload) of 200ml/ chip.
Table 2
CoCl 2·6H 2O(g/L) 30
(NH 4) 2·WO 4(g/L) 10
Na 3C 6H 5O 7·2H 2O(g/L) 80
NaH 2PO 2·H 2O(g/L) 20
PH PH=10 contains NaOH
Finish after the electroless-plating, sample is washed and drying.When sample is observed, find the optionally growth in having formed the zone of pattern of Co-W-P film of plating under SEM.The speed of growth of plated film is about 70nm/min; Plated film is analyzed as follows:
Co: about 89at%, W: about 5at%, P: about 6at%.
Fig. 8 A and 8B are the sketches of the SEM image of sample.As shown in drawings, the space V-arrangement is formed in copper film 14, and it is embedded in the hole 12 that is formed in the insulation layer 10.Further, the not only surface of copper film 14, for example Hu Lian surface; the protective membrane 16 that is constituted by the Co-W-P alloy film by plating covers; and alloy film 16a also is deposited on the surface of the insulating film 10 of hole 12, and it is the zone that need not protect, thereby the selectivity that shows plating is bad.
According to the present invention, as indicated above, use the alkylamine borine of no sodium to make and to apply oxidation current to for example copper, copper alloy, silver or silver alloys as reductive agent, the needs of palladium catalyst have been avoided providing whereby, thereby can carry out Direct Electroplating, and can prevent that semiconducter device from being polluted by basic metal.Thereby this can reduce required treatment step raising output, prevents that the space from forming in interconnection, improves stability whereby, and avoids spreading owing to palladium the raising of the interconnection impedance that causes.
And, use contain as the plating bath of the alkylamine borine of reductive agent can be optionally plating interconnect area only.
Commercial Application
The present invention relates to be used to form the electroless-plating liquid that the selective protection semiconductor devices exposes the diaphragm of interconnect surface; this semiconductor devices has following embedding interconnection structure, and wherein electric conductor such as copper or silver are embedded in the meticulous groove that is formed at such as the interconnection in the substrate surface of Semiconductor substrate. The invention still further relates to a kind of semiconductor devices, wherein the exposed surface of interconnection is optionally protected with diaphragm.

Claims (7)

1. electroless-plating liquid; it is used for directly optionally forming the protective membrane of Co-B alloy on the interconnect surface of the exposure with the semiconducter device that embeds interconnection structure; described embedding interconnection structure is made by copper, copper alloy, silver or silver alloys, and described electroless-plating liquid contains:
Cobalt ion;
Coordination agent;
The pH damping fluid of alkali metal-free;
The pH regulator agent of alkali metal-free; With
Alkylamine borine as reductive agent.
2. according to the electroless-plating liquid of claim 1, further comprise at least a stablizer of from one or more heavy metal compounds and sulfide, selecting, and tensio-active agent.
3. according to the electroless-plating liquid of claim 1, wherein the pH of this electroless-plating liquid is adjusted in the scope of 5-14 with described pH regulator agent.
4. according to the electroless-plating liquid of claim 1, wherein said pH damping fluid comprises ammonium sulfate, ammonium chloride or boric acid.
5. according to the electroless-plating liquid of claim 1, wherein said pH regulator agent comprises ammoniacal liquor or tetramethylammonium hydroxide.
6. according to the electroless-plating liquid of claim 1, further comprise refractory metal.
7. according to the electroless-plating liquid of claim 6, wherein said refractory metal comprises at least a in tungsten and the molybdenum.
CNB028111192A 2001-06-01 2002-05-30 Electroless-plating solution and semiconductor device Expired - Fee Related CN1285764C (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2001167355 2001-06-01
JP167355/2001 2001-06-01
JP179341/2001 2001-06-13
JP2001179341A JP2003049280A (en) 2001-06-01 2001-06-13 Electroless plating solution and semiconductor device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
CN200610132035.6A Division CN1933143A (en) 2001-06-01 2002-05-30 Electroless plating liquid and semiconductor device

Publications (2)

Publication Number Publication Date
CN1527888A CN1527888A (en) 2004-09-08
CN1285764C true CN1285764C (en) 2006-11-22

Family

ID=26616238

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB028111192A Expired - Fee Related CN1285764C (en) 2001-06-01 2002-05-30 Electroless-plating solution and semiconductor device

Country Status (5)

Country Link
JP (1) JP2003049280A (en)
KR (1) KR100891344B1 (en)
CN (1) CN1285764C (en)
TW (1) TW543091B (en)
WO (1) WO2002099164A2 (en)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004304021A (en) * 2003-03-31 2004-10-28 Ebara Corp Manufacturing method and manufacturing device of semiconductor device
JP4663965B2 (en) * 2003-02-27 2011-04-06 株式会社荏原製作所 Substrate processing method and substrate processing apparatus
JP2005015885A (en) * 2003-06-27 2005-01-20 Ebara Corp Substrate processing method and apparatus
KR100859259B1 (en) * 2005-12-29 2008-09-18 주식회사 엘지화학 Cobalt-base alloy electroless-plating solution and electroless-plating by using the same
JP2007246979A (en) * 2006-03-15 2007-09-27 Jsr Corp Electroless plating liquid
JP2007246981A (en) * 2006-03-15 2007-09-27 Jsr Corp Electroless plating liquid
JP2007246980A (en) * 2006-03-15 2007-09-27 Jsr Corp Electroless plating liquid
JP2007246978A (en) * 2006-03-15 2007-09-27 Jsr Corp Electroless plating liquid
KR100774651B1 (en) 2006-07-21 2007-11-08 동부일렉트로닉스 주식회사 Manufacturing method of copper metalization for semiconductor device and structure thereof
TW200825207A (en) * 2006-09-29 2008-06-16 Wako Pure Chem Ind Ltd Composition for nonelectrolytic plating and method of forming metallic protection film using the same
US7794530B2 (en) * 2006-12-22 2010-09-14 Lam Research Corporation Electroless deposition of cobalt alloys
US9496145B2 (en) 2014-03-19 2016-11-15 Applied Materials, Inc. Electrochemical plating methods

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3917464A (en) * 1973-07-20 1975-11-04 Us Army Electroless deposition of cobalt boron
US4232060A (en) * 1979-01-22 1980-11-04 Richardson Chemical Company Method of preparing substrate surface for electroless plating and products produced thereby
EP0458827A1 (en) * 1989-02-17 1991-12-04 Polymetals Technology Limited Plating composition and process
JPH051384A (en) * 1991-06-21 1993-01-08 Nec Corp Electroless plating bath
US5203911A (en) * 1991-06-24 1993-04-20 Shipley Company Inc. Controlled electroless plating
US5240497A (en) * 1991-10-08 1993-08-31 Cornell Research Foundation, Inc. Alkaline free electroless deposition
JP3514800B2 (en) * 1994-01-27 2004-03-31 哲彌 逢坂 Soft magnetic thin film and method of manufacturing the same
US5695810A (en) * 1996-11-20 1997-12-09 Cornell Research Foundation, Inc. Use of cobalt tungsten phosphide as a barrier material for copper metallization
KR19990015599A (en) * 1997-08-07 1999-03-05 윤종용 Method of forming dual damascene metal wiring layer of semiconductor device using electroless plating
US6342733B1 (en) * 1999-07-27 2002-01-29 International Business Machines Corporation Reduced electromigration and stressed induced migration of Cu wires by surface coating

Also Published As

Publication number Publication date
KR20040008205A (en) 2004-01-28
WO2002099164A3 (en) 2004-05-21
KR100891344B1 (en) 2009-03-31
TW543091B (en) 2003-07-21
WO2002099164A2 (en) 2002-12-12
CN1527888A (en) 2004-09-08
JP2003049280A (en) 2003-02-21

Similar Documents

Publication Publication Date Title
CN1933143A (en) Electroless plating liquid and semiconductor device
JP3979464B2 (en) Electroless plating pretreatment apparatus and method
US6811658B2 (en) Apparatus for forming interconnects
US20040234696A1 (en) Plating device and method
US20030141018A1 (en) Electroless deposition apparatus
US6706422B2 (en) Electroless Ni—B plating liquid, electronic device and method for manufacturing the same
US20030140988A1 (en) Electroless deposition method over sub-micron apertures
CN1285764C (en) Electroless-plating solution and semiconductor device
US20030143837A1 (en) Method of depositing a catalytic layer
WO2003040430A1 (en) Substrate processing apparatus and method
WO2002101822A2 (en) Interconnection in semiconductor device and method for manufacturing the same
TW586137B (en) Electroless plating method and device, and substrate processing method and apparatus
JP3821709B2 (en) Pretreatment method of electroless plating
US7413983B2 (en) Plating method including pretreatment of a surface of a base metal
TW200300462A (en) Plating apparatus and plating method
JP2003306793A (en) Plating apparatus and plating method
US20040186008A1 (en) Catalyst-imparting treatment solution and electroless plating method
JP3886383B2 (en) Plating apparatus and plating method
JP2003034876A (en) Catalytic treatment liquid and method for electroless plating
JP2010116601A (en) Electrolytic treatment apparatus
JP2005229121A (en) Device and method of forming wiring

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20061122

Termination date: 20210530

CF01 Termination of patent right due to non-payment of annual fee