CN1276589A - Display device, computer and computer system - Google Patents
Display device, computer and computer system Download PDFInfo
- Publication number
- CN1276589A CN1276589A CN00117698A CN00117698A CN1276589A CN 1276589 A CN1276589 A CN 1276589A CN 00117698 A CN00117698 A CN 00117698A CN 00117698 A CN00117698 A CN 00117698A CN 1276589 A CN1276589 A CN 1276589A
- Authority
- CN
- China
- Prior art keywords
- video signal
- display device
- signal
- format data
- pixel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
- G09G5/006—Details of the interface to the display terminal
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2370/00—Aspects of data communication
- G09G2370/04—Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller
- G09G2370/045—Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller using multiple communication channels, e.g. parallel and serial
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
- G09G5/005—Adapting incoming signals to the display format of the display terminal
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Controls And Circuits For Display Device (AREA)
- Digital Computer Display Output (AREA)
- Transforming Electric Information Into Light Information (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
A display device includes video-signal-processor for receiving an input-video-signal and pixel-converting-circuit for converting a pixel of an output signal from the video signal processor so that display device can display the input video signal as an appropriate video on a pixel-displaying device, where the display device receives pixel-format-data of the input video signal through a control bus independent of the input video signal.
Description
The present invention relates to such as LCD pixel display device, computing machine and computer systems such as (LCD).
Fig. 2 is the block diagram of conventional computer system.Display device 202 comprises following parts in Fig. 2:
(a) be used to receive the video signal preprocessor 16 of incoming video signal;
(b) be used for the picture display device 2 of display video, as LCD;
(c) be used to calculate synchronizing signal number from incoming video signal, and the microcomputer 42 of definite incoming video signal pixel format; And
(d) be used for the output signal pixel from video signal preprocessor 16 is changed, the signal after will changing according to the output of microcomputer 42 then exports the pixel transitions circuit 3 of picture display device 2 to.
The video amplifier 6 that is used for amplification video signal; And
Be used for the conversion of signals that amplifier 6 amplified is become the A/D converter 5 of digital signal.
When display device 202 with said structure, by the vision signal cable 8 that is connected with the video signal output part 11 that is integrated in computing machine 102 inside, after receiving vision signal, utilize microcomputer 42 to calculate the pulse number of horizontal-drive signal and vertical synchronizing signal in the vision signals.The pixel format of microcomputer 42 designated signals then.
Digital video signal is by from the output signal of microcomputer 42-change by following specified pixel form one.
3 pairs of digital video signal pixels of pixel transitions circuit are changed, so that picture display device 2 correct display videos.
But in above-mentioned conventional computer system, the video signal data that display device 202 utilizes 42 pairs of computing machines 102 of microcomputer to be provided is counted, and determines vision signal by the polarity that detects synchronizing signal.Therefore, the counting of synchronous signal impulse is depended on to a great extent the performance of microcomputer 42.In addition, the pixel transitions ability also depends on 42 treatable number of interrupts of microcomputer to a great extent.
On market, can obtain and the similar signal of input signal that is input to display device 202 from computing machine 102.Therefore, be the pixel format that is not enough to accurate definite vision signal only with the frequency of horizontal-drive signal and vertical synchronizing signal and polarity.
Consequently, comprise that the picture display device 2 of LCD control panel can not display video, perhaps promptly enable display video, shown video can not be in optimum.
The present invention receives the pixel format data of being determined by computing machine (PFD) by allowing display device, thereby makes the display device can be with the optimum display video on picture display device.
The invention discloses following technology, i.e. computing machine output and the irrelevant PFD of vision signal, and display device receives and PFD definite and that vision signal is irrelevant.
This structure allows display device accurately to determine the PFD of incoming video signal, so that picture display device can be with the optimum display video.
Fig. 1 is the computer block diagram of corresponding one exemplary embodiment of the present invention.
Fig. 2 is the block diagram of conventional computer system.
Hereinafter showed a preferred embodiment of the present invention with reference to the accompanying drawings.Identical parts indicate the index number identical with Fig. 1 in conventional computer system shown in Figure 2.
In the present embodiment, for carrying out pixel transitions more accurately, be provided for receiving control bus corresponding to incoming video signal PFD than conventional display device.In addition, the microcomputer 41 of microcomputer 42 with special construction replaces.
The horizontal sync frequencies of conventional 42 pairs of horizontal-drive signals of microcomputer and the vertical synchronizing frequency of a vertical synchronizing signal are counted, microcomputer 42 is according to the level and the vertical frequency of counting, use a computing formula, VESA-GTF (VideoElectronics stands Association-Generalized Timing FormulaStandard) for example calculates the pixel format of video.
On the contrary, microcomputer 41 by control bus 15 receive a vision signal pixel format (pixel format comprises a horizontal sync frequencies, vertical synchronizing frequency, horizontal viewing area, after the level along etc.).Therefore, microcomputer 41 does not need for example this computing formula of VESA-GTF.
Except that control bus and microcomputer 41, the miscellaneous part of computer system of the present invention is identical with conventional computer system as shown in Figure 2.In other words, display device 201 shown in Figure 1 is different from conventional display device shown in Figure 2 202, shows microcomputer 41 and the I/O terminal 13 of first control bus that is complementary with microcomputer 41.
In computing machine 101, the I/O terminal 14 of the video signal data output block 12 and second control bus that is complementary with parts 12 is better than traditional computer shown in Figure 2 102.
Control bus on display device 201 next doors comprises the I/O terminal 13 and the microcomputer 41 of first control bus.
More particularly, microcomputer 41 is by the I/O terminal 14 of I/O terminal 13, control bus cable 15 and second control bus of first bus, and the request transmission is from the PFD of the incoming video signal of computing machine 101.Then at next constantly, microcomputer 41 is pressed above-mentioned same program but opposite order, receives the PFD from video signal data output block 12.
Said structure allows display device 201, by receiving PFD from the incoming video signal of computing machine 101 with the irrelevant control bus of incoming video signal.Therefore, even incoming video signal changes or what handle is similarity signal, display device 201 can accurately be determined the pixel format of vision signal, and inerrably discerns incoming video signal.Therefore, picture display device 2 can be under the optimum of being everlasting display video.
The details of PFD comprises in Video Graphics Array (VGA) form, i.e. following items:
(a) horizontal frequency=31.46kHz (800 point)
(b) level shows time=25.423 microseconds (640 point)
(c) horizontal sync time=3.813 microseconds (96 point)
(d) horizontal back edge time=1.907 microseconds (48 point)
(e) horizontal leading edge time=0.636 microsecond (16 point)
(f) vertical frequency=59.93kHz (525 line)
(g) vertically show time=15.254 millisecond (480 line)
(h) vertical synchronization time=0.064 millisecond (2 line)
(i) vertical rear edge time=1.049 millisecond (33 line)
(j) vertical front edge edge time=0.318 millisecond (10 line)
(k) Dot Clock frequency=25.17MHz
(l) staggered scanning=unavailable
The details of PFD is not limited to above-mentioned project, as long as even and can determine that PFD comprises seldom the project of number and also can accept.
This structure need not the user or circuit is finely tuned, and guarantees often to obtain on picture display device 2 the best video demonstration.
In the above-described embodiments, video signal output part 11 is connected by vision signal cable 8, vision signal entry terminal 7 and video signal output terminal 9 with the video amplifier 6.But the video amplifier 6 can be directly connected to parts 11.
Video signal data output block 12 is connected by control bus cable 15, the first control bus I/O terminal 13, the second control bus I/O terminal 14 with microcomputer 41; But microcomputer 41 can be directly connected to parts 12.
Display device of the present invention comprises as mentioned above: the video signal preprocessor that is used to receive incoming video signal; And
Display device is used for the pixel transitions circuit changed from the output signal pixel of video signal preprocessor, so that can show incoming video signal with suitable video on picture display device.Because can obtain accurate PFD, so this structure allows display device display video under optimum.In U.S. Patent No. 5,933, described a kind of example pixel conversion method in 196, but also needed a certain pixel transitions method.
More particularly, control bus sends from the requirement of display device and transmits the request of PFD to computing machine, and PFD is sent to display device from computing machine,, and on display device, often show with optimum so that incoming video signal is inerrably discerned pixel format.Therefore, need not vision signal is finely tuned.
Claims (5)
1. display device comprises:
Be used to receive incoming video signal and be used to generate video signal preprocessor corresponding to the outputting video signal of described incoming video signal; And
Be used for according to being independent of the pixel format data that incoming video signal receives by control bus, the pixel transitions circuit that a plurality of pixels that are included in the described output signal are changed,
2. the described display device of claim 1, wherein control bus is in response to the request transmission pixel format data to pixel format data that sends from display device.
3. computing machine comprises:
Be used for the video signal output part of outputting video signal to display device; And
Be used for the video signal data output block of the pixel format data of outputting video signal, this vision signal is exported by described video signal output part; And
Be used for the pixel format data of vision signal is sent to display device, and the control bus that the transmission pixel format data request of video display devices is sent to computing machine.
4. computer system comprises:
Be used to receive incoming video signal and be used to generate video signal preprocessor corresponding to the outputting video signal of described incoming video signal; And
Display device with pixel transitions circuit, wherein the pixel transitions circuit is used for according to being independent of incoming video signal by the pixel format data that control bus receives a plurality of pixels in the output signal being changed;
Be used to export the video signal output part of outputting video signal to described display device;
Be used to export the video signal data output block of described pixel format data; And
Computing machine with control bus, this control bus is sent to described video display devices with pixel format data.
5. the described computer system of claim 4, wherein control bus is sent to described display device with pixel format data, and the request that will transmit pixel format data is sent to described computing machine.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11155836A JP2000347637A (en) | 1999-06-03 | 1999-06-03 | Display device, computer, and computer system |
| JP155836/1999 | 1999-06-03 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1276589A true CN1276589A (en) | 2000-12-13 |
Family
ID=15614570
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN00117698A Pending CN1276589A (en) | 1999-06-03 | 2000-05-30 | Display device, computer and computer system |
Country Status (6)
| Country | Link |
|---|---|
| EP (1) | EP1058228A3 (en) |
| JP (1) | JP2000347637A (en) |
| KR (1) | KR100386773B1 (en) |
| CN (1) | CN1276589A (en) |
| MY (1) | MY122646A (en) |
| TW (1) | TW469738B (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20030002532A (en) * | 2001-06-29 | 2003-01-09 | 에스케이 텔레콤주식회사 | The mobile phone having a enlarged-display function |
| US7002593B2 (en) * | 2001-11-01 | 2006-02-21 | Eastman Kodak Company | Method for reducing the power used by emissive display devices |
| US20030117382A1 (en) * | 2001-12-07 | 2003-06-26 | Pawlowski Stephen S. | Configurable panel controller and flexible display interface |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02127688A (en) * | 1988-11-07 | 1990-05-16 | Nec Corp | Control system for cathode-ray tube display device |
| DE69013674T2 (en) * | 1990-05-14 | 1995-05-04 | Ibm | Display system. |
| US5880702A (en) * | 1994-10-20 | 1999-03-09 | Canon Kabushiki Kaisha | Display control apparatus and method |
| JPH08137444A (en) * | 1994-11-11 | 1996-05-31 | Hitachi Ltd | Liquid crystal multiscan displaying method and device therefor |
| US5748167A (en) * | 1995-04-21 | 1998-05-05 | Canon Kabushiki Kaisha | Display device for sampling input image signals |
| JPH10133995A (en) * | 1996-05-13 | 1998-05-22 | Sun Microsyst Inc | Method and device for selecting optimum capability between computer system and peripehral device |
| JPH10326169A (en) * | 1997-05-27 | 1998-12-08 | Toshiba Corp | Information processor, display control method, and recording medium recording display control program |
| JPH1115425A (en) * | 1997-06-26 | 1999-01-22 | Hitachi Ltd | Display mode switch control display |
| EP1030241A4 (en) * | 1997-11-13 | 2001-11-07 | Hitachi Ltd | Display |
| KR100258531B1 (en) * | 1998-01-24 | 2000-06-15 | 윤종용 | Auto control apparatus for the image on flat panel display and method thereof |
-
1999
- 1999-06-03 JP JP11155836A patent/JP2000347637A/en active Pending
-
2000
- 2000-05-30 CN CN00117698A patent/CN1276589A/en active Pending
- 2000-05-31 TW TW089110597A patent/TW469738B/en not_active IP Right Cessation
- 2000-05-31 MY MYPI20002433A patent/MY122646A/en unknown
- 2000-06-02 EP EP00112041A patent/EP1058228A3/en not_active Ceased
- 2000-06-03 KR KR10-2000-0030600A patent/KR100386773B1/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| TW469738B (en) | 2001-12-21 |
| JP2000347637A (en) | 2000-12-15 |
| EP1058228A3 (en) | 2005-07-27 |
| KR20010014994A (en) | 2001-02-26 |
| EP1058228A2 (en) | 2000-12-06 |
| MY122646A (en) | 2006-04-29 |
| KR100386773B1 (en) | 2003-06-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN1411273A (en) | Apparatus and method for detecting display mode | |
| US6313881B1 (en) | Signal processing for a picture signal | |
| US6654065B1 (en) | Apparatus for generating timing and synchronizing signals for a digital display device | |
| US8194146B2 (en) | Apparatuses for capturing and storing real-time images | |
| US5907359A (en) | Highly-integrated image sensing apparatus producing digitized output | |
| CN1276589A (en) | Display device, computer and computer system | |
| CN100539635C (en) | Display device and control method thereof | |
| US7250980B2 (en) | Automatic detection of sync polarity in video timing and generation of blanking period indicator from sync information | |
| JP3442322B2 (en) | Display device and driving method thereof | |
| TWI761224B (en) | Touch display driving method and touch display system using the same | |
| US7450117B2 (en) | Apparatus and method for restoring active signal and synchronous signal | |
| JP3131821B2 (en) | Matrix type display panel drive | |
| CN114500766A (en) | GMSL camera time synchronization control method for automatic driving | |
| CN1767637A (en) | Video signal remote transmitting method | |
| JP3290744B2 (en) | Control method of CRT display device | |
| CN1187960C (en) | Display signal process device and method | |
| KR100416786B1 (en) | System for storing and printing screen of pdp | |
| CN1167998C (en) | Signal converter | |
| JPH08221046A (en) | Bi-directional crt interface circuit | |
| JP2869997B2 (en) | Signal processing method | |
| US20030197694A1 (en) | Automatic phase adjustment for display | |
| KR100521268B1 (en) | Liquid crystal display used in video system | |
| KR100486646B1 (en) | Apparatus for processing video mode data in source device and in display in transmitting video signal through optical fiber | |
| CN102420965A (en) | Real-time high-definition video receiving device | |
| JPS5940664Y2 (en) | Input data transmission device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |