JPH1115425A - Display mode switch control display - Google Patents

Abstract

PROBLEM TO BE SOLVED: To simplify operation and to realize intuitive operation by transmitting a display mode switch signal from a display device to a system device and switching a display mode with the system device side according to that. SOLUTION: When an On Screen Display(OSD) menu in the display device is started, the Established Timing block data in a memory of a Display Data Channel(DDC) control part 3 are read out by art OSD control part 1, a memory control part 2 to be stored in the data RAM of the OSD control part 1. The OSD displays adjustment functions and adjustment states such as screen size, position and contrast on a screen. When a display mode switch menu is started by OSD operation, by outputting information in the data RAM of the OSD control part 1 to the screen, a user can select surely and optionally the display mode within the range of the specification of the display device on the display device.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display mode switching method for switching a display mode of a personal computer system such as a resolution and a synchronization frequency.

[0002]

2. Description of the Related Art Conventionally, display mode switching control of a system device is performed by application software of the system device, and switching is performed by setting a value to each register of a graphic board via a display driver.

[0003] Since this operation is started by switching from the system device side, it is possible to set the resolution and the synchronization frequency beyond the specification range of the display device, thereby causing a malfunction.

[0004] Thereafter, the Display Data Channel (DD)
C) By adopting the interface, information such as the resolution of the display device and the synchronization frequency specification is transmitted from the display device to the system device as EDID data, and the setting is automatically performed in consideration of the specification range of the display device. However, it required complicated operability by starting, selecting, and executing applications.

[0005]

A display mode switching function is added to a display device, and a display mode switching signal is transmitted from the display device to the system device, and the display mode is switched on the system device side accordingly.

[0006]

The interface between the system device and the display device includes a video signal, a synchronization signal, and a D signal.
It consists of a DC control signal.

The video signal and the synchronizing signal are input signals and signals for displaying a screen. The DDC control signal is Vsync or the SCL output from the system unit.
In synchronization with the K signal, each information (resolution, corresponding frequency, etc.) of the display device is transmitted to the system device as EDID data.

[0008] The EDID data is composed of 128 bytes, in which resolution, synchronization frequency, and timing data are written.

The present invention uses a DDC control signal and
The main feature is that display mode switching control of the system device is performed by performing data read and rewrite control.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described with reference to the drawings.

The DDC control signal is a data signal SDA
And an SCLK signal, which is a CLK signal.
The data stream of the 8-byte EDID data is synchronized with the SCLK signal. FIG. 2 is an Established Timings block that describes the basic timing in the EDID data, and the Established Timings I, II, and manufa.
This is a three-byte data block composed of the data structure of the data structure.

This block describes the basic timing specified by VESA, and a flag is assigned to each of these bits.
Setting “1” indicates a support timing, and setting “0” indicates an unsupported timing.

Normally, the timing at which this bit is made valid is the preset mode of the display device, and it can be determined that these timings are actually display modes within the specification range of the display device. (If you support non-standard timing, use the Standard Timing Identity
The n block is described in a Detailed Timing Description block. 3) Therefore, the processing is realized by the processing flow shown in FIG. 3 and the block diagram shown in FIG.

The processing flow of FIG. 3 will be described.

When the OSD menu of the display device is activated, the OSD control unit and the memory control unit read out the Established Timing block data in the memory of the DDC control unit and store the information in the data RAM of the OSD control unit.

The OSD is an abbreviation of On Screen Display, and displays an adjustment function and an adjustment state such as a screen size, a position, and contrast on a screen.

When the display mode switching menu is activated by the OSD operation of the display device, the information of the data RAM of the OSD control section is output to the screen.

This screen allows the user to select an arbitrary display mode on the display device and to surely select a display mode within the specification range of the display device.

When the user determines a display mode using the OSD menu, bits other than the display mode are set to "0" and the memory of the DDC control unit is rewritten. An example of memory rewriting when the user selects the 1024 × 768 dot 70 Hz mode will be described below.

[0020]

[Table 1]

Before bit rewriting

[0022]

[Table 2]

After bit rewriting

[0024]

[Table 3]

The data after bit rewriting is Established
The data is stored as a Timing block, and data is transmitted from an SDA signal which is a DDC control signal.

Since the data CLK at this time is not supplied from the system device, an SCLK signal is generated by the SCLK generation circuit and supplied to the DDC control circuit. This generated SC
Data transmission is performed by the LK signal.

The rewritten data is valid only in the mode selected by the user, and the data is a single scan display in which the display device can display only the mode.

After transmitting the data, the system unit recognizes the rewritten display timing, processes it as a single scan display, and resets the values in the registers of the graphic board. In these processes, the display mode is switched.

[0029]

According to the present invention, switching control of the display mode can be performed on the display device, so that the operation can be simplified and the operation can be performed directly.

[Brief description of the drawings]

FIG. 1 is a display mode switching control block diagram showing one embodiment of the present invention.

FIG. 2 shows an Estimated Timings block of EDID data.

FIG. 3 is a flowchart of display mode switching control by the display device.

[Description of Signs] 1 ... OSD control unit 2 ... Memory control unit 3 ...
DDC control unit, 4 ... SCLK generation circuit, 5 ... MCU
(Microprocessor).

Claims (1)

[Claims] In a display device which displays graphics and characters by a video signal and a synchronization signal from a system device and follows a plurality of display modes, the display device controls switching of resolution and synchronization frequency.
A display device having a function of switching a display mode of a system device.