JP2000347637A - Display device, computer, and computer system - Google Patents

Display device, computer, and computer system

Info

Publication number
JP2000347637A
JP2000347637A JP11155836A JP15583699A JP2000347637A JP 2000347637 A JP2000347637 A JP 2000347637A JP 11155836 A JP11155836 A JP 11155836A JP 15583699 A JP15583699 A JP 15583699A JP 2000347637 A JP2000347637 A JP 2000347637A
Authority
JP
Japan
Prior art keywords
video signal
display device
pixel
picture signal
format information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11155836A
Other languages
Japanese (ja)
Inventor
Hirokatsu Yui
裕克 由井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP11155836A priority Critical patent/JP2000347637A/en
Priority to CN00117698A priority patent/CN1276589A/en
Priority to MYPI20002433A priority patent/MY122646A/en
Priority to TW089110597A priority patent/TW469738B/en
Priority to EP00112041A priority patent/EP1058228A3/en
Priority to KR10-2000-0030600A priority patent/KR100386773B1/en
Publication of JP2000347637A publication Critical patent/JP2000347637A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/006—Details of the interface to the display terminal
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00—Aspects of data communication
    • G09G2370/04—Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller
    • G09G2370/045—Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller using multiple communication channels, e.g. parallel and serial
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/005—Adapting incoming signals to the display format of the display terminal

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Digital Computer Display Output (AREA)
  • Transforming Electric Information Into Light Information (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a display device capable of displaying an image on a pixel display device in an optimum state. SOLUTION: This display device 1a comprises a picture signal transmitting part 16 for receiving an input picture signal, and a pixel converting circuit 3 for receiving pixel format information of the input picture signal through a controlling bus part of another system different from the input picture signal, and pixel-converting an output signal of the picture signal transmitting part 16 so as to display the input picture signal as a proper image on a pixel display device 2. This computer system includes the computer 10a comprising picture signal outputting means 11 for outputting a picture signal to the display device 1a, picture signal information outputting means 12 for outputting format information of the picture signal outputted from the picture signal outputting means 11, and a controlling bus part for transmitting output of the format information of the input picture signal and transmission requirement of the format information from the display device 1a mutually.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【発明の属する技術分野】本発明は、液晶ディスプレイ
などの画素表示ディスプレイ装置及びコンピュータ、並
びにコンピュータシステムに関するものである。The present invention relates to a pixel display device such as a liquid crystal display, a computer, and a computer system.

【０００２】[0002]

【従来の技術】図２は、コンピュータ１０ｂとこの出力
を表示するディスプレイ装置１ｂとで構成された従来の
コンピュータシステムを示す。ディスプレイ装置１ｂ
は、入力映像信号を受け入れる映像信号伝送部１６と、
映像を表示する液晶パネルなどの画素表示装置２と、入
力映像信号の同期信号を計数して入力映像信号のピクセ
ルフォーマットを判定するマイクロコンピュータ（以下
マイコンという）４ｂと、マイコン４ｂの出力を参照し
て映像信号伝送部１６の出力信号の画素変換を行なって
画素表示装置２に出力する画素変換回路３とから構成さ
れる。2. Description of the Related Art FIG. 2 shows a conventional computer system including a computer 10b and a display device 1b for displaying the output. Display device 1b
A video signal transmission unit 16 for receiving an input video signal;
A pixel display device 2 such as a liquid crystal panel for displaying an image, a microcomputer (hereinafter referred to as a microcomputer) 4b that counts a synchronization signal of the input video signal and determines a pixel format of the input video signal, and an output of the microcomputer 4b. And a pixel conversion circuit 3 that performs pixel conversion of an output signal of the video signal transmission unit 16 and outputs the converted signal to the pixel display device 2.

【０００３】映像信号伝送部１６は、映像信号を増幅す
るビデオアンプ６と、ビデオアンプ６で増幅された映像
信号をデジタル変換するＡ／Ｄ変換器５とからなる。こ
のように構成されたディスプレイ装置１ｂに、コンピュ
ータ１０ｂに内蔵された映像信号出力手段１１より映像
信号ケーブル８を通じて映像信号が出力されると、ディ
スプレイ装置１ｂの側では、この映像信号の水平同期信
号と垂直同期信号の周波数の同期信号パルスがマイコン
４ｂにて計数されてピクセルフォーマットが特定され
る。[0003] The video signal transmission section 16 comprises a video amplifier 6 for amplifying the video signal and an A / D converter 5 for digitally converting the video signal amplified by the video amplifier 6. When a video signal is output from the video signal output means 11 incorporated in the computer 10b to the display device 1b configured as described above through the video signal cable 8, the display device 1b side receives a horizontal synchronization signal of the video signal. The microcomputer 4b counts the synchronization signal pulses having the frequency of the vertical synchronization signal and the pixel format.

【０００４】特定された水平同期信号の周波数と垂直同
期信号の周波数から画素変換回路３を制御する信号が特
定され、このマイコン４ｂの出力信号によってデジタル
映像信号が変換される。画素変換回路３にてデジタル映
像信号が画素変換され、画素表示装置２に適正に映像が
表示される。A signal for controlling the pixel conversion circuit 3 is specified based on the specified frequency of the horizontal synchronizing signal and the frequency of the vertical synchronizing signal, and a digital video signal is converted by an output signal of the microcomputer 4b. The pixel conversion circuit 3 converts the digital video signal into a pixel, and an image is appropriately displayed on the pixel display device 2.

【０００５】[0005]

【発明が解決しようとする課題】しかしながら、このよ
うなディスプレイ装置１ｂでは、上述のようにコンピュ
ータ１０ｂから出力される映像信号の情報をマイコン４
ｂにより計数し、同期信号の極性を検出することにより
特定しているため、同期信号パルスは計数するマイコン
４ｂの性能によって大きく左右され、マイコン４ｂが同
時に処理している割り込み処理数によっても画素変換性
能が大きく左右される場合がある。However, in such a display device 1b, the information of the video signal output from the computer 10b is transmitted to the microcomputer 4 as described above.
b, and the polarity is determined by detecting the polarity of the synchronization signal. Therefore, the synchronization signal pulse is greatly affected by the performance of the microcomputer 4b that counts, and the pixel conversion is also performed by the number of interrupt processes that the microcomputer 4b is simultaneously processing. Performance may be greatly affected.

【０００６】また、コンピュータ１０ｂからディスプレ
イ装置１ｂに入力される信号は、水平同期信号と垂直同
期信号の各々の周波数と極性の情報だけでは、非常に似
通っている信号が市場には存在するため、正確な映像信
号のピクセルフォーマットを判定することが困難であ
る。その結果、液晶パネルをはじめとする画素表示装置
２に映像が映らなかったり、映った場合でも最適な状態
で映像を映すことができないという問題がある。Also, signals input from the computer 10b to the display device 1b are very similar in the market only with information on the frequency and polarity of each of the horizontal synchronizing signal and the vertical synchronizing signal. It is difficult to accurately determine the pixel format of a video signal. As a result, there is a problem that an image is not displayed on the pixel display device 2 such as a liquid crystal panel, or that an image cannot be displayed in an optimal state.

【０００７】本発明は前記問題点を解決し、最適な状態
で画素表示装置に映像を表示することのできるディスプ
レイ装置を提供することを目的とする。An object of the present invention is to solve the above-mentioned problems and to provide a display device capable of displaying an image on a pixel display device in an optimal state.

【０００８】[0008]

【課題を解決するための手段】本発明のディスプレイ装
置は、入力映像信号のピクセルフォーマットを判定する
マイコンの構成を特殊な構成にしたことを特徴とする。
この本発明によると、入力映像信号のピクセルフォーマ
ット情報を正確に判定することができるため、画素表示
装置に最適な状態で映像を表示できる。A display device according to the present invention is characterized in that a microcomputer for judging the pixel format of an input video signal has a special configuration.
According to the present invention, since the pixel format information of the input video signal can be accurately determined, it is possible to display a video in an optimal state for the pixel display device.

【０００９】[0009]

【発明の実施の形態】請求項１記載のディスプレイ装置
は、入力映像信号を受け入れる映像信号伝送部と、前記
入力映像信号のピクセルフォーマット情報を入力映像信
号とは別系統の制御バス部を介して受け取り、前記入力
映像信号を画素表示装置に適正な映像で表示できるよう
に前記映像信号伝送部の出力信号の画素変換を行なって
前記画素表示装置に出力する画素変換回路とを備えたこ
とを特徴とする。According to a first aspect of the present invention, there is provided a display apparatus, comprising: a video signal transmitting unit for receiving an input video signal; and a pixel format information of the input video signal via a control bus unit of a different system from the input video signal. A pixel conversion circuit for receiving and converting the output signal of the video signal transmission unit to a pixel so that the input video signal can be displayed on a pixel display device as an appropriate video, and outputting the converted signal to the pixel display device. And

【００１０】請求項２記載のディスプレイ装置は、請求
項１において、制御バス部を、入力映像信号のピクセル
フォーマット情報と内部から外部への前記ピクセルフォ
ーマット情報の転送要求を相互に伝送するよう構成した
ことを特徴とする。請求項３記載のコンピュータは、デ
ィスプレイ装置へ映像信号を出力する映像信号出力手段
と、前記映像信号出力手段が出力している映像信号のピ
クセルフォーマット情報を出力する映像信号情報出力手
段と、前記入力映像信号のピクセルフォーマット情報の
出力と前記ディスプレイ装置からのピクセルフォーマッ
ト情報の転送要求を相互に伝送する制御バス部とを備え
たことを特徴とする。According to a second aspect of the present invention, in the first aspect, the control bus unit is configured to mutually transmit the pixel format information of the input video signal and a transfer request of the pixel format information from inside to outside. It is characterized by the following. 4. The computer according to claim 3, wherein the video signal output unit outputs a video signal to a display device, the video signal information output unit outputs pixel format information of the video signal output by the video signal output unit, and A control bus unit for mutually transmitting the output of the pixel format information of the video signal and the transfer request of the pixel format information from the display device.

【００１１】請求項４記載のコンピュータシステムは、
請求項１または請求項２に記載のディスプレイ装置と請
求項３に記載のコンピュータとで構成されることを特徴
とする。以下、本発明の実施の形態を図１を用いて説明
する。なお、上記従来例を示す図２と同様な機能をなす
ものについては、同一の符号を付けて説明する。The computer system according to claim 4 is
A display device according to claim 1 or 2, and a computer according to claim 3. An embodiment of the present invention will be described below with reference to FIG. Components having the same functions as those in FIG. 2 showing the conventional example will be described with the same reference numerals.

【００１２】この実施の形態では、従来のディスプレイ
装置よりも正確な画素変換を行うために、必要な入力映
像信号のピクセルフォーマット情報を判定する制御バス
部を設け、マイコン４ｂに代わるマイコン４ａを特殊な
構成とした点で異なるが、それ以外の基本的な構成は上
記従来例を示す図２と同様である。ディスプレイ装置１
ａのマイコン４ａおよびこれに接続された第１の制御バ
ス入出力端子１３以外の構成は、上記従来例を示す図２
と同じものである。In this embodiment, in order to perform more accurate pixel conversion than the conventional display device, a control bus unit for determining necessary pixel format information of an input video signal is provided, and a microcomputer 4a in place of the microcomputer 4b is specially provided. However, the basic configuration other than that is the same as that of FIG. 2 showing the conventional example. Display device 1
The configuration other than the microcomputer 4a and the first control bus input / output terminal 13 connected thereto is the same as that shown in FIG.
Is the same as

【００１３】コンピュータ１０ａには、上記従来例を示
す図２の構成に加えて映像信号情報出力手段１２とこれ
に接続される第２の制御バス入出力端子１４とが設けら
れている。ディスプレイ装置１ａの側の制御バス部は、
第１の制御バス入出力端子１３とマイコン４ａとで構成
されている。The computer 10a is provided with video signal information output means 12 and a second control bus input / output terminal 14 connected to the video signal information output means 12 in addition to the configuration shown in FIG. The control bus unit on the side of the display device 1a includes:
It comprises a first control bus input / output terminal 13 and a microcomputer 4a.

【００１４】具体的には、マイコン４ａは、ディスプレ
イ装置１ａの側から第１の制御バス入出力端子１３と制
御バスケーブル１５と第２の制御バス入出力端子１４と
を介してコンピュータ１０ａの側へ入力映像信号のピク
セルフォーマット情報を要求し、次のタイミングに映像
信号情報出力手段１２から第２の制御バス入出力端子１
４と制御バスケーブル１５と第１の制御バス入出力端子
１３とを介してコンピュータ１０ａの側からピクセルフ
ォーマット情報を受信するように構成されている。More specifically, the microcomputer 4a is connected to the computer 10a from the display device 1a via the first control bus input / output terminal 13, the control bus cable 15, and the second control bus input / output terminal 14. To the second control bus input / output terminal 1 from the video signal information output means 12 at the next timing.
It is configured to receive pixel format information from the computer 10a via the control bus cable 4, the control bus cable 15, and the first control bus input / output terminal 13.

【００１５】このように構成されたディスプレイ装置１
ａでは、コンピュータ１０ａからの入力映像信号のピク
セルフォーマット情報を入力映像信号とは別系統の制御
バス部を介して受け取るため、入力映像信号に変化があ
った場合や非常に似通った映像信号であっても、入力映
像信号を誤認識することなく正確な映像信号のピクセル
フォーマットを判定することができ、常に画素構造表示
媒体である画素表示装置２に最適な状態で映像を出力す
ることができる。The display device 1 configured as described above
In a, since the pixel format information of the input video signal from the computer 10a is received via a control bus unit of a different system from that of the input video signal, the input video signal is changed or the video signal is very similar. However, the pixel format of the video signal can be accurately determined without erroneously recognizing the input video signal, and the video can always be output in an optimal state for the pixel display device 2 which is a pixel structure display medium.

【００１６】従って、ユーザによる微調整、或いは回路
による微調整が無くても、常に画素表示装置２に最適な
状態で映像を表示することができる。なお、上記実施の
形態においては、映像信号出力手段１１とビデオアンプ
６との間を映像信号ケーブル８と映像信号入力端子７と
映像信号出力端子９とで接続したが、映像信号出力手段
１１とビデオアンプ６との間を直接に接続しても良い。Therefore, an image can always be displayed in an optimal state for the pixel display device 2 without fine adjustment by a user or fine adjustment by a circuit. In the above embodiment, the video signal output means 11 and the video amplifier 6 are connected by the video signal cable 8, the video signal input terminal 7, and the video signal output terminal 9. The connection with the video amplifier 6 may be made directly.

【００１７】また、映像信号情報出力手段１２とマイコ
ン４ａとの間を、制御バスケーブル１５と第１の制御バ
ス入出力端子１３と第２の制御バス入出力端子１４とで
接続したが、映像信号情報出力手段１２とマイコン４ａ
との間を直接に接続しても良い。The video signal information output means 12 and the microcomputer 4a are connected by the control bus cable 15, the first control bus input / output terminal 13, and the second control bus input / output terminal 14. Signal information output means 12 and microcomputer 4a
May be directly connected.

【００１８】[0018]

【発明の効果】以上のように本発明のディスプレイ装置
によると、入力映像信号を受け入れる映像信号伝送部
と、前記入力映像信号のピクセルフォーマット情報を入
力映像信号とは別系統の制御バス部を介して受け取り、
前記入力映像信号を画素表示装置に適正な映像で表示で
きるように前記映像信号伝送部の出力信号の画素変換を
行なって前記画素表示装置に出力する画素変換回路とを
備えた構成とすることで、正確なピクセルフォーマット
情報が得られるため、最適な映像を表示することができ
る。As described above, according to the display device of the present invention, the video signal transmitting unit for receiving the input video signal and the pixel format information of the input video signal are transmitted via the control bus unit of a different system from the input video signal. Receive
A pixel conversion circuit that performs pixel conversion of an output signal of the video signal transmission unit and outputs the input video signal to the pixel display device so that an appropriate video can be displayed on the pixel display device. Since accurate pixel format information can be obtained, an optimal image can be displayed.

【００１９】また、具体的には、制御バス部を、入力映
像信号のピクセルフォーマット情報と内部から外部への
前記ピクセルフォーマット情報の転送要求を相互に伝送
するよう構成することで、入力映像信号のピクセルフォ
ーマットを誤認識することなく、常に画素表示装置に最
適な状態で映像を出力することができるため、映像信号
の微調整を行う必要がなくなる。More specifically, the control bus unit is configured to mutually transmit the pixel format information of the input video signal and the transfer request of the pixel format information from the inside to the outside, so that the control bus unit transmits the input video signal. Since the video can always be output in an optimal state for the pixel display device without erroneously recognizing the pixel format, it is not necessary to finely adjust the video signal.

【図面の簡単な説明】[Brief description of the drawings]

【図１】本発明の実施の形態におけるコンピュータシス
テムのブロック図FIG. 1 is a block diagram of a computer system according to an embodiment of the present invention.

【図２】従来のコンピュータシステムのブロック図FIG. 2 is a block diagram of a conventional computer system.

【符号の説明】[Explanation of symbols]

１ａ ディスプレイ装置 ４ａ マイコン １０ａ コンピュータ １２ 映像信号情報出力手段 １３ 第１の制御バス入出力端子 １４ 第２の制御バス入出力端子 １５ 制御バスケーブル 1a Display device 4a Microcomputer 10a Computer 12 Video signal information output means 13 First control bus input / output terminal 14 Second control bus input / output terminal 15 Control bus cable

Claims (4)

【特許請求の範囲】[Claims] 【請求項１】入力映像信号を受け入れる映像信号伝送部
と、 前記入力映像信号のピクセルフォーマット情報を入力映
像信号とは別系統の制御バス部を介して受け取り、前記
入力映像信号を画素表示装置に適正な映像で表示できる
ように前記映像信号伝送部の出力信号の画素変換を行な
って前記画素表示装置に出力する画素変換回路とを備え
たディスプレイ装置。A video signal transmitting unit for receiving an input video signal; receiving pixel format information of the input video signal via a control bus unit of a different system from the input video signal; and transmitting the input video signal to a pixel display device. A display device comprising: a pixel conversion circuit that performs pixel conversion of an output signal of the video signal transmission unit so as to display an appropriate image and outputs the converted signal to the pixel display device. 【請求項２】制御バス部を、入力映像信号のピクセルフ
ォーマット情報と内部から外部への前記ピクセルフォー
マット情報の転送要求を相互に伝送するよう構成した請
求項１記載のディスプレイ装置。2. The display device according to claim 1, wherein the control bus unit is configured to mutually transmit the pixel format information of the input video signal and a transfer request of the pixel format information from inside to outside. 【請求項３】ディスプレイ装置へ映像信号を出力する映
像信号出力手段と、 前記映像信号出力手段が出力している映像信号のピクセ
ルフォーマット情報を出力する映像信号情報出力手段
と、 前記入力映像信号のピクセルフォーマット情報の出力と
前記ディスプレイ装置からのピクセルフォーマット情報
の転送要求を相互に伝送する制御バス部とを備えたコン
ピュータ。3. A video signal output means for outputting a video signal to a display device; a video signal information output means for outputting pixel format information of a video signal output by the video signal output means; A computer comprising: a control bus unit for mutually transmitting pixel format information output and pixel format information transfer request from the display device. 【請求項４】請求項１または請求項２に記載のディスプ
レイ装置と請求項３に記載のコンピュータとで構成され
るコンピュータシステム。4. A computer system comprising the display device according to claim 1 or 2 and the computer according to claim 3.
JP11155836A 1999-06-03 1999-06-03 Display device, computer, and computer system Pending JP2000347637A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP11155836A JP2000347637A (en) 1999-06-03 1999-06-03 Display device, computer, and computer system
CN00117698A CN1276589A (en) 1999-06-03 2000-05-30 Display device, computer and computer system
MYPI20002433A MY122646A (en) 1999-06-03 2000-05-31 Display device, computer and computer system.
TW089110597A TW469738B (en) 1999-06-03 2000-05-31 Display device, computer and computer system
EP00112041A EP1058228A3 (en) 1999-06-03 2000-06-02 Interconnection between a computer and a display
KR10-2000-0030600A KR100386773B1 (en) 1999-06-03 2000-06-03 Display Device, Computer and Computer System

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11155836A JP2000347637A (en) 1999-06-03 1999-06-03 Display device, computer, and computer system

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JP (1) JP2000347637A (en)
KR (1) KR100386773B1 (en)
CN (1) CN1276589A (en)
MY (1) MY122646A (en)
TW (1) TW469738B (en)

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EP1058228A3 (en) 2005-07-27
CN1276589A (en) 2000-12-13
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KR20010014994A (en) 2001-02-26
KR100386773B1 (en) 2003-06-09

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