CN1258210C - Method for manufacturnig silicon high-speed semiconductor switch device - Google Patents
Method for manufacturnig silicon high-speed semiconductor switch device Download PDFInfo
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- CN1258210C CN1258210C CN 03145029 CN03145029A CN1258210C CN 1258210 C CN1258210 C CN 1258210C CN 03145029 CN03145029 CN 03145029 CN 03145029 A CN03145029 A CN 03145029A CN 1258210 C CN1258210 C CN 1258210C
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Abstract
The present invention relates to a manufacturing method for a silicon high-speed semiconductor switching device, which is used for the manufacture of a silicon semiconductor switching device comprising at least one pn junction, such as a fast recovery diode, a thyristor, a grid turn-off thyristor, an insulated gate bipolar transistor and a bipolar switch transistor. The method of the present invention has the steps: the front of the switching device is manufactured according to a conventional method until a metalized electrode begins to be manufactured; platinum-silicon alloy is manufactured on the surface of a silicon wafer, and protons or alpha particles are injected to form a local high density defect area; thermal annealing is carried out so that the defect area absorbs platinum and is converted to platinum impurity area; then, the metalized electrode and the rear part continue to be manufactured according to the conventional method until the manufacture is finished. The device manufactured by the present invention is used as a recombination center for controlling the life and are highly centralized in the platinum impurities of silicon of a local area, and the performance is better than the existing life control technique. The switching device can have high switching speed and strong backward recovery softness, and forward voltage drop and reverse leakage current are not obviously increased.
Description
Technical field:
The present invention relates to a kind of manufacture method of silicon high-speed semiconductor switching device, be applicable to the manufacturing of the Si semiconductor switching device that contains a pn knot at least, fast recovery diode for example, thyristor, grid turn-off thyristor (GTO), the manufacturing of igbt (IGBT) and bipolar switching transistor.
Background technology:
In power electric device,, use various semiconductor switch devices as Switching Power Supply, frequency converter etc.To the important requirement of switching device is that the power loss of device is little.This requires the switching speed of device fast (with electric current t recovery time in the turn off process
rThe little sign) to reduce switching loss, reverse leakage I
RLittle of to reduce off-state loss, forward voltage drop V
OnLittle of to reduce on-state loss.In addition, also require the softness factor S greatly to reduce moment overvoltage and electromagnetic pollution to fast recovery diode.Switching loss is proportional to switching frequency, and along with the switching frequency that uses in the power electronic technology improves day by day, switching loss is increasing, and this just requires further to improve the switching speed of switching device, promptly reduces t
rReduce t
rEffective ways be the density that improves complex centre in the device, reducing the excess carrier life-span, thereby quicken when conducting state, to accumulate the compound of excess carrier in device.This t that reduces
rMethod be called Lifetime Control.Yet, because inner link physically reduces t with Lifetime Control
rThe time can cause in various degree I
RBecome big, V
OnBecome adverse consequences big and that S diminishes.Method (being called the Lifetime Control technology) with different realization Lifetime Control is obtaining same t
rThe I that is caused when reducing
R, V
OnThe degree bad with the change of other performances such as S is also different.Among the Lifetime Control technology of semiconductor switch device was being improved always, its effort target was exactly to reduce as far as possible other Effect on Performance of device when improving switching speed.Existing Lifetime Control technology can be summarized as bulk life time control technology and Localized Lifetime Control technology two big classes.The bulk life time control technology has High temperature diffusion platinum or gold and high energy particle (mainly being electronics and neutron) irradiation etc., and its common ground is that the complex centre (platinum in the silicon, golden impurity and irradiation defect) that is produced spreads all over each zone of overall semiconductor device.These technology are ripe already and present still in the technology of generally using, works " power semiconductor " (B.J.Baliga " Power Semiconductor Devices " at the Bali gal, PWSPublishing Company, Boston, Mass., 1996) 153-182 page or leaf and " modern power device " (" Modern Power Devices " Wiley, NewYork, 1987) 55-59 page or leaf and the paper that is published in " U.S.'s electronics and The Institution of Electrical Engineers's proceedings " volume ED-24 the 6th phase 685-688 page or leaf are ' in power rectifier with gold, platinum and electron irradiation carry out the comparison of Lifetime Control ' (B.J.Baliga, " Comparison of gold; platinum; and electron irradimion for controlling lifetime inpower rectifier ", IEEE Transaction on Electron Devices, vol.ED-24, No.6 has comprehensive description and analysis in pp.685-688).The maximum common drawback of above-mentioned bulk life time control technology is to reduce t
rThe time to I
R, V
OnToo big with the degree of other performance impacts such as S, for taking into account other performances, the further raising of switching speed is restricted.For addressing this problem the notion that has produced Localized Lifetime Control.Localized Lifetime Control be only in semiconductor switch device to reducing t
rMake the high density composite center in the very the littlest regional area, and to reducing t
rEffect is not quite but to I
R, V
OnWith do not make the complex centre in far-reaching other zone of S.Theoretical is (to be called axially) place of tying near pn on direction of current flow with the position that experiment showed, the high complex centre of best local district.The method of existing realization Localized Lifetime Control (being called the Localized Lifetime technology) is the ion implantation of proton (being hydrogen ion) or α particle (being the helium ion).Ion produces the local high density of defects district of narrow range on the injected beam flow path direction near being infused in the range end, thereby forms local high density composite center.Adjust the density in implantation dosage may command local complex centre, adjust the axial location in the Energy Controllable system of injection local complex centre, thus the t of may command semiconductor switch device
r, V
On, I
R, S and the relation between them.For example, U.S. Patent No. 5717244, what No.4056408, No.4047976 and No.6168981 provided is exactly the method for carrying out Localized Lifetime Control with proton or α particle.But, existing ion with proton or α particle injects the method that realizes Localized Lifetime Control can not finely obtain the desired advantage of Localized Lifetime Control notion, because the reverse blocking poor performance of the device that this method is made, show that α particle injection method makes reverse leakage current increase several magnitude, see that people such as Lai Nieli is published in " solid electronics " (Solid-State Electronics) volume 42 the 12nd phases paper of the 2295th page.The protonation method not only makes I
RIncrease, but also make oppositely withstand voltage remarkable reduction of device, see that people such as Ha Zizhuo is published in the paper of the 414th page of " nuclear instrument in the physical study and method " (Nuclear Instruments and Method in Physics Research) volume B186.Can not be too poor for taking the reverse blocking performance into account, employed implantation dosage just can not be big, and switching speed just can not be improved.Particularly the paper of aforesaid Ha Zizhuo compares comprehensive research to proton, α particle injection Localized Lifetime Control technology, the conclusion that obtains is, because made device reverse blocking poor performance, be not suitable for being used alone as the Lifetime Control technology and improve switching speed, better using method is to unite use to improve S as ancillary technique and electronic irradiation technique.At present to inject the commercial Application of Localized Lifetime Control technology also mainly be that supplementary means as electronic irradiation technique improves S for proton and α particle ion, sees U.S. Patent No. 6261874.In a word, existing bulk life time control technology (platinum expansion, expansion gold, electron irradiation etc.) can not further improve switching speed again; Though the notion of Localized Lifetime Control is fine, it is poor that the method (ion implantation of proton and α particle) of existing realization Localized Lifetime Control is made the reverse blocking voltage of device, also limited the switching speed that improves device with this technology.So far, how further to improve switching speed and don't appreciable impact I
R, V
On, other device performances such as S are long-term endeavour solution and technical barrier that prior art also all can not better solve.
Summary of the invention:
The object of the invention is to solve above technical barrier, provide a kind of manufacture method that contains the silicon high-speed semiconductor switching device of a pn knot at least, can solve the problem of the device reverse blocking voltage that exists in the existing Localized Lifetime Control technology poor (leakage current increases, puncture voltage descends), better given play to Localized Lifetime Control notion superiority in theory, produce than the better Si semiconductor switching device of prior art performance, show that switching speed is faster and the softness factor is bigger and have essentially identical reverse blocking performance (I
RAnd V
On); Perhaps has lower I
RAnd V
OnAnd have essentially identical switching speed and a softness.
The manufacture method of technology silicon high-speed semiconductor switching device of the present invention, be limited in fast recovery diode, thyristor, grid turn-off thyristor (GTO), the manufacture method of igbt (IGBT) and bipolar switching transistor, it is characterized in that it was made according to the following steps from beginning to make metallic electrode after n type district in device and p type district all formed:
(1) removes the metallic electrode that to make and the silicon face dielectric film (normally silicon dioxide) of silicon chip contact zone, expose silicon face; Use conventional deposit metal films method then, for example Chang Yong sputtering method, vacuum vapor deposition method, platiniferous emulsion coating process deposit one deck platinum film at silicon chip surface; Usually platinum film thickness time more than 0.001 micron contained pt atom number just enough used, the variation of platinum film thickness is to not obviously influence of device performance, be difficult to obtain evenly continuous film but thickness is too thin, influence the rate that manufactures a finished product, the too thick alloy platinum material that film consumed is too many, and manufacturing cost rises.Usual thickness is 0.03 to 1 micron, for example 0.05,0.1,0.3 micron etc.Can all deposit platinum film on the silicon chip two sides, but only just much of that in any one side deposition;
(2) in inert gas shielding, carry out the platinum alloying with silicon, so that the contact interface place of silicon and platinum forms one deck platinum silicon alloy layer, the temperature and time of alloying is not very strict, and general alloying temperature is 400 ℃ to 600 ℃, and alloying time is 10 to 200 minutes; Platinum alloying with silicon temperature commonly used is 420 ℃ to 550 ℃,
For example 435 ℃, 465 ℃, 495 ℃ is 30 minutes to 90 minutes between the civil time of platinum alloying with silicon,
For example 40 minutes, 65 minutes, 80 minutes; The mutual coupling of temperature and time is those skilled in the art's a common technology.
(3) at first, silicon slice placed is corroded the residual platinum layer in top layer that does not form alloy with silicon to remove in chloroazotic acid, stay the platinum silicon alloy layer; Chloroazotic acid does not have obvious corrosiveness to the platinum silicon alloy, is stopped automatically when platinum layer corrodes clean post-etching effect meeting fully, thereby does not need pay most careful attention to control etching time; Then, carry out the ion injection of lightweight ion from arbitrary surface on silicon chip two surfaces by predetermined implantation dosage and predetermined injection range; It is proton or α particle that ion injects ion commonly used.Still be the appointed condition decision that the α ion is possessed by the device producer with proton, both effects do not have significant difference actually; It is definite behind normal experiment repeatedly that the predetermined implantation dosage that the said ion of this step injects needs press in advance the structure of device and required switching time, the big more switching speed of dosage is fast more, but the switching speed difference that the device of different purposes is required, it is also different that the device of different structure is reached the required implantation dosage of same switching speed, is 5 * 10 to the scope of proton implantation dosage
11To 9 * 10
15Cm
-2, be that scope is 1 * 10 to α particle implantation dosage
11To 5 * 10
15Cm
-2Can not obtain switching speed with practical value than above-mentioned lower dosage, higher dosage then may produce the more injection of the complicated type defect cluster of inducting.For switching speed commonly used implantation dosage commonly used is to proton 5 * 10
12To 1 * 10
15Cm
-2, to α particle 5 * 10
11Cm
-2To 1 * 10
15Cm
-2The said injection range of this step is by the position and the distance decision of injecting the surface at place, high density composite center, make the range end just in time be positioned at the position of predetermined maximum complex centre density, to improve switching speed more effectively inject the position of range end be in when being positioned at the switching device conducting positive bias the pn knot near, be 3 to 50 microns apart from the distance of pn knot.If the switching device of manufacturing has a plurality of pn knots to be in forward bias when conducting, to the position of improving the more effective range end of switching speed be when device is in conducting state near the positively biased pn of maximum resistance rate district injected minority carrier knot, for example, pn knot in the igbt between p type collector region and n type base, pn knot in thyristor and the grid turn-off thyristor between p type anode region and n type base, the collector junction in the bipolar switching transistor etc.Among the two side areas of above-mentioned positively biased pn knot, the position of the raising switching speed the most effectively being injected the range end is positioned near maximum resistance rate district one Side of positively biased pn knot;
(4) silicon chip is heated to 650 ℃ to 800 ℃ of temperature and be incubated 10 to 200 minutes and carry out platinum and draw annealing, annealing temperature more commonly used is 670 ℃ to 750 ℃, for example, and 685 ℃, 705 ℃, 725 ℃, annealing time commonly used is 20 to 120 minutes, for example 30,50,70,90 minutes;
(5) after forming metallic electrode and encapsulation to make device or before encapsulation, according to a conventional method silicon chip is carried out low dose of electron irradiation again switching speed is adjusted; If the switching speed of semiconductor switch device meets the requirements after manufacturing is finished, then this step is no longer carried out.
Compared with prior art, the reason that the Si semiconductor switching device made from manufacture method of the present invention has a more excellent electrical property is these two advantages of optimization that the complex centre in control life-span in the device that produces of the present invention has possessed complex centre level of energy in the optimization of complex centre density spatial distribution in the existing Localized Lifetime Control technology and the existing bulk life time control technology simultaneously, and this is that existing Lifetime Control technology does not possess.Localized Lifetime Control technology with the ion implantation of proton or α particle, the injection that the is produced defective of inducting constitutes the local complex centre be positioned near the high concentration range end, adjust the injection energy and best position can be transferred in the position of high density composite center, for example, be arranged in maximum resistance rate district be in when the break-over of device forward the pn knot near, see the zone 3 in the accompanying drawing one (a).When device is in conducting state, be injected into a large amount of minority carriers in the maximum resistance rate district 2 by forward pn knot 1, form the very excess carrier of high concentration accumulation in the zone 2, make forward voltage drop V
OnDrop to very low value.When turn-offing, these extinction times that accumulate the excessive charge carrier in zone 2 have determined switching speed.Very high near the carrier concentration of pn knot place accumulation, therefore the high density local complex centre that is positioned at pn knot near zone 3 can the most effective quickening recombination rate, improve switching speed, and the recombination rate that just turn-offs the incipient stage that it increases, and do not increase the recombination rate that turn-offs ending phase, thereby also help the softness factor S that improves diode.But, no matter be positioned at the complex centre of any position, to reverse leakage current I
REffect all basic identical.So the complex centre that is positioned at pn knot near zone 3 with compare away from the complex centre at pn knot place, keeping same device I
RSituation under can obtain the higher switching speed and the bigger softness factor.More than the advantage of these Localized Lifetime Control technology be that existing Localized Lifetime Control technology has, be not that the present invention is peculiar.What emphasize here is, in the device that the present invention makes, the platinum impurity range that constitutes the high density composite center injects the defective absorption platinum of inducting by proton in the prior art or α particle ion and is transformed, so as the spatial distribution of the density of the platinum impurity in complex centre and the spatial distribution that the ion in the existing Localized Lifetime Control technology injects the defect concentration of inducting is essentially identical, see accompanying drawing one (b) zone 4, therefore the performance of the device that manufactures should have all advantages of existing Localized Lifetime Control technology, must be better than existing bulk life time control technology, as platinum expansion, expand gold, electron irradiation, neutron irradiation etc.And on the other hand, the complex centre in the semiconductor switch device of manufacturing of the present invention is the platinum impurity in the silicon, and its level of energy is E
t=E
c-0.23eV (E wherein
cLevel of energy for the conduction band lower limb), and proton, α particle to inject the induct level of energy of defective of the injection that forms be E
t=E
c-0.42eV (low dosage injection) or E
t=E
c-0.55eV (high dose injection).Theoretical and experiment proves already, for example sees that aforesaid Bali gal is published in " U.S.'s electronics and The Institution of Electrical Engineers's proceedings " (B.J.Baliga, IEEE Transaction on Electron Devices, vol.ED-24, No.6, paper pp.685-688), the complex centre is from conduction band lower limb E
cThe near more I when same switching speed
RMore little.Simultaneously platinum impurity under the situation of same switch speed has better reverse blocking voltage (littler I than golden impurity, electron irradiation defective etc. as the device in complex centre as the semiconductor switch device in complex centre
RHigher puncture voltage) is those skilled in the art of the present technique's known facts early.The electron irradiation defective has with low dosage proton and α particle injects the essentially identical level of energy of defective of inducting, so platinum impurity is that the reverse blocking voltage of the device in complex centre must be better than proton and α particle to inject the defective of inducting be the device in complex centre in the silicon.Therefore, from the complex centre level of energy, manufacturing of the present invention be that the reverse blocking voltage of the switching device in complex centre must be better than injecting the defective of inducting with proton and α particle with platinum impurity in the silicon be the existing Localized Lifetime Control technology in complex centre.In a word, the Lifetime Control method that the present invention comprised is that the concentrated platinum impurity of height local is as the complex centre, the complex centre that it has possessed existing Localized Lifetime Control technology concentrates on the advantage of local vantage point, and has avoided the level of energy bad shortcoming that causes device reverse blocking voltage difference in complex centre in the existing Localized Lifetime Control technology; Simultaneously it has possessed again in the existing bulk life time control technology with the advantage of platinum impurity as the good level of energy that the complex centre had, and has avoided complex centre in the existing high temperature platinum expansion device spatially can not concentrate on the shortcoming of optimized regional area.Therefore, the semiconductor switch device that the present invention produces has more performance than prior art (comprising bulk life time control technology and Localized Lifetime Control technology), for example, according to the needs of purposes, can have faster switching speed and the bigger softness factor and I
R, V
OnBasic identical; Also can have lower I
RAnd V
OnAnd the softness factor of switching speed and diode is basic identical.
Description of drawings:
The formation and the position of local platinum impurity range in the semiconductor switch device that Fig. 1 the present invention makes:
The pn knot that has forward bias under the 1-break-over of device state,
The highest zone of resistivity in the 2-device,
3-proton or α particle ion inject the back in the terminal local high density of defects district that forms of range,
4-platinum is drawn the local high platinum impurity range that the annealing back is changed into by local high density of defects district;
Fig. 2 high speed of the present invention is recovered pin diode making process schematic diagram soon:
Maximum resistance rate zone in the 2-device, this place is n type base,
5-has the p type anode region of low-resistivity,
6-has the n type cathodic region of low-resistivity,
7, the upper and lower surface of 8-silicon chip,
9-platinum silicon alloy layer,
The 10-platinum layer,
The signal of 11-protonation bundle,
12-anode metal polarizing electrode,
13-cathodic metal polarizing electrode;
The manufacturing step schematic diagram of Fig. 3 high speed igbt of the present invention (IGBT):
Maximum resistance rate zone in the 2-device, this place is n type base,
The n type resilient coating of resistivity among the 14-,
The p type drain region of 15-low-resistivity (be also referred to as collector region, or the anode region),
The p type well region of resistivity among the 16-,
The n type source region of 17-low-resistivity,
The 18-polygate electrodes,
The 19-gate oxide,
Insulating barrier between the 20-electrode,
21-emitter (negative electrode) metallic electrode,
22-collector electrode (anode) metallic electrode.
Embodiment:
The choice point of each temperature and time in the technical solution of the present invention concrete steps, and the choice point of ion implantation dosage are as long as just can reach effect requirements manufacturing of the present invention, the Si semiconductor switching device in the scope that the present invention provides; These choice points be adjusted into the technology that common technical staff grasps.
According to technical scheme of the present invention, the manufacture method that exemplifies fast recovery pin diode and high speed igbt (IGBT) illustrates operational feasibility of the present invention below.
The example 1 fast pin diode fabricating method that recovers:
The step that the present invention makes the pin fast recovery diode is, referring to accompanying drawing 2:(1) each p type of making the pin diode with conventional method mixes and n type doped region, comprise pn knot 1, high resistivity n type base 2, low-resistivity p type anode region 5, low-resistance n type cathodic region 6, upper surface 7 and lower surface 8 are seen accompanying drawing 2 (a).Here the conventional method of saying for the extension type fast recovery diode is an extension high resistant n type layer on low-resistance n type silicon chip, spreads p type impurity then to high resistant n type layer from the surface; The conventional method that the MOS fast recovery diode is said here is n type impurity and the p type impurity that spreads high concentration on the two sides of high resistant n type substrate respectively; (2) silicon dioxide on the removal surface 7,8 uses sputtering method to deposit the metal platinum of 0.1 to 0.2 micron of one deck on surface 7; (3) then silicon chip is put in the temperature control furnace 465 ℃ of insulations and reduces to room temperature after 40 minutes, at this moment, also stay one deck, see accompanying drawing 2 (b) not by the platinum layer 10 of alloy at the one deck of formation at the interface platinum silicon alloy layer 9 of platinum and silicon; (4) silicon chip is put in the chloroazotic acid boils, platinum layer 10 is corroded, and stays platinum silicon alloy layer 9, then carries out protonation from anode surface, implantation dosage 1 * 10
13To 5 * 10
14Cm
-2Inject energy and calculate decision, make the range end be arranged in high resistant n type base, at this moment near the range end, formed the local crystal defect region 3 of inducting that injects of high density apart from 5 to 10 microns places of pn knot by injecting range, much lower in other area defects density, see accompanying drawing 2 (c); (5) silicon chip is heated to 680 ℃ to 720 ℃, for example 690 ℃, 700 ℃, 710 ℃, be incubated 30 to 60 minutes, for example 40 minutes, so far high density was injected the platinum impurity range that the defect area absorption platinum of inducting is converted into basic identical density distribution, sees accompanying drawing 2 (d) zone 4; (6) use conventional method, sputtering method for example, anode metal polarizing electrode 12 and cathodic metal polarizing electrode 13 are made in the silicon chip two sides after removing oxide layer respectively, see accompanying drawing 2 (d); (7) carry out passivation with conventional method, encapsulation, test (mesa device carries out table top with conventional method and is shaped before passivation); (8) carry out electron irradiation before encapsulation or after the encapsulation to adjust the index of switching speed to product requirement with conventional method, if the switching speed that manufacturing step (8) is tested before meets the requirements, then manufacturing step (8) must not carry out.
The manufacture method of example 2 high speed igbts (IGBT):
The step that the present invention makes High Speed I GBT is, referring to accompanying drawing 3:(1) make the basic structures such as each p type district, n type district of IGBT with conventional method, see accompanying drawing 3 (a), it comprises the p type drain region 15 of low-resistivity, high resistivity n type base 2, the n type resilient coating 14 of middle resistivity, pn knot 1, the p type well region 16 of middle resistivity, the n type source region 17 of low-resistivity, polygate electrodes 18, gate oxide 19 etc.; (2) after removing electrode contact zone oxide layer, on the silicon chip surface at place, source region, deposit about 0.1 to the 0.2 micron platinum film of a bed thickness with conventional method (for example sputtering method); (3) silicon slice placed is incubated about 40 minutes for about 465 ℃ in temperature in heating furnace, has so far formed platinum silicon alloy layer 9, stay, see accompanying drawing 3 (b) not by the platinum layer 10 of alloy at platinum and silicon interface place; (4) erode platinum layer 10 with chloroazotic acid, carry out protonation from this surface that the platinum silicon alloy is arranged then, implantation dosage is 1 * 10
13To 5 * 10
14Cm
-2, inject energy and calculate by injecting range, make and inject the range end and be arranged in n type base and tie 1 about 30 to 50 microns apart from pn, so far in device in the n type base 2 boundary vicinity of resilient coating 3 form ion and inject the high density of defects district 3 that inducts, see accompanying drawing 3 (c); (5) silicon chip was carried out platinum in 1 hour 710 ℃ of insulations and draw annealing, it is thick to anneal, and high platinum impurity range 4 is changed in high density of defects district 3 into.See accompanying drawing 3 (d); (6) make collector electrode metal polarizing electrode 22 and emitter metal polarizing electrode 21 with conventional method, multiple layer metal sputtering method commonly used when making electrode 22 is made electrode 21 deposited by electron beam evaporation method often.Referring to accompanying drawing 3 (d); (7) carry out each manufacturing step such as following passivation, encapsulation with conventional method; (8) test back according to switching speed with require the difference of index to carry out the switching speed adjustment with the conventional electrical irradiation method, electron irradiation also can carry out afterwards in step (6).If finish procedure of processing (6) afterwards switch parameter meet the requirements, then do not carry out electron irradiation.
Claims (8)
1, the manufacture method of silicon high-speed semiconductor switching device, be limited in the manufacture method of fast recovery diode, thyristor, grid turn-off thyristor, igbt and bipolar switching transistor, it is characterized in that it was made according to the following steps from beginning to make metallic electrode after n type district in device and p type district all formed:
(1) removes the metallic electrode that to make and the silicon face dielectric film of silicon chip contact zone, expose silicon face; Depositing a layer thickness with the deposit metal films method at silicon chip surface then is platinum film more than 0.001 micron;
(2) in inert gas shielding, will carry out the platinum alloying with silicon, so that the contact interface place of silicon and platinum forms one deck platinum silicon alloy layer;
(3) silicon slice placed is corroded in chloroazotic acid to remove the residual platinum layer in top layer, stay the platinum silicon alloy layer; The ion that carries out the lightweight ion from the surface of silicon chip injects; The ion that ion injects is proton or α particle, and the scope of the implantation dosage that this step ion injects is 5 * 10 to proton
11To 9 * 10
15Cm
-2, be 1 * 10 to the α particle
11To 5 * 10
15Cm
-2, the injection range that this step ion injects is by the position and the distance decision of injecting the surface at place, high density composite center, be in when making the position of injecting the range end be positioned at the switching device conducting positive bias the pn knot near, be 3 to 50 microns apart from the distance of pn knot;
(4) carry out platinum and draw annealing, annealing temperature is 650 ℃ to 800 ℃, and annealing time is 10 to 200 minutes;
(5) after forming metallic electrode and encapsulation to make device or before encapsulation, silicon chip is carried out low dose of electron irradiation switching speed is adjusted; If the switching speed of semiconductor switch device meets the requirements after manufacturing is finished, then this step is no longer carried out.
2, the manufacture method of silicon high-speed semiconductor switching device according to claim 1 is characterized in that, the thickness of said platinum film is 0.03 to 1 micron.
3, the manufacture method of silicon high-speed semiconductor switching device according to claim 1 is characterized in that, the alloying temperature of said platinum alloying with silicon is 400 ℃ to 600 ℃, and alloying time is 10 to 200 minutes.
4, the manufacture method of silicon high-speed semiconductor switching device according to claim 1, it is characterized in that, the implantation dosage that said ion injects is determined according to device architecture and required switching time, the big more switching speed of dosage is fast more, but different components is reached same switching speed required dosage difference, is 5 * 10 for protonation dosage
12To 1 * 10
15Cm
-2For α particle implantation dosage is 5 * 10
11Cm
-2To 1 * 10
15Cm
-2
5, the manufacture method of silicon high-speed semiconductor switching device according to claim 1, it is characterized in that, knot is in forward bias if the switching device of manufacturing has a plurality of pn when conducting, to the position of improving the more effective range end of switching speed be when device is in conducting state near the positively biased pn of maximum resistance rate district injected minority carrier knot.
6, the manufacture method of silicon high-speed semiconductor switching device according to claim 1 or 5, it is characterized in that, among the two side areas of positively biased pn knot, the position of the raising switching speed the most effectively being injected the range end is positioned near maximum resistance rate district one Side of positively biased pn knot.
7, the manufacture method of silicon high-speed semiconductor switching device according to claim 1 is characterized in that, the annealing temperature that said platinum is drawn annealing is 670 ℃ to 750 ℃; Annealing time is 20 to 90 minutes.
8, the manufacture method of silicon high-speed semiconductor switching device according to claim 1 or 5, it is characterized in that, wherein said forward biased pn knot is the pn knot in the fast recovery diode, the pn knot that forms between p type anode region and the n type base in thyristor and the grid turn-off thyristor, collector junction in the bipolar switching transistor, the pn knot in the igbt between collector region and base.
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