CN1246724C - 显示装置 - Google Patents
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Abstract
本发明的显示装置,其目的在于简化像素部的周边电路的构成,使面板的框缘面积减少该简化部分的量,同时减少配线数。其解决方案在于,通过漏极信号线(2),将数字影像信号串行传输至各像素部。利用像素选择晶体管(GT0~GT3)来取样该数字影像信号,并对其进行串行并行转换之后,利用数字模拟(DA)转换部转换成模拟影像信号。该DA转换部,包括以加权后的电容比与像素电极(19)作电容耦合的多个电容电极(41~44)、及按照数字影像信号而将周期性时钟信号供给至多个电容电极(41~44)的时钟供给部。该模拟影像信号施加在像素电极(19)上。
Description
技术领域
本发明涉及一种显示装置,尤其是涉及一种具备将数字影像信号转换成模拟影像信号的DA(数字模拟)转换部的显示装置。
背景技术
近年来,依市场需求而要求可携式的显示装置,例如可携式电视、移动电话等。按照该种要求而盛行着为了对应显示装置的小型化、轻量化、省电化的研究开发。
图10是表示现有例的液晶显示装置的一显示像素的电路构成图。在绝缘性基板(未图示)上,交叉形成有栅极信号线51、漏极信号线61,且在该交叉部附近设有连接于两信号线51、61的像素选择晶体管72。以下,将薄膜晶体管简称为TFT。像素选择TFT72的源极11s连接在液晶21的显示电极80上。
并且,设置有在1像场(field)期间保持显示电极80的电压用的辅助电容85,而该辅助电容85的一方的端子86连接在像素选择TFT72的源极11s上,而另一方的端子87上则施加有各显示像素共通的电位。
在此,当对栅极信号线51施加扫描信号(H电位)时,像素选择TFT72就会呈导通(ON)状态,且模拟影像信号会从漏极信号线61传递至显示电极80上,同时保持于辅助电容85中。通过将施加至显示电极80的影像信号电压施加至液晶21上、且按照该电压使液晶21定向即可获得液晶显示。因而,可进行不论是动画或是静止影像的液晶显示。
但是,输入至漏极信号线61的模拟影像信号,是利用DA转换器对输入数字影像信号进行数字模拟转换后所得的。目前,在显示面板内部内置DA转换器的液晶显示装置中,接近像素周边部的驱动电路而配置DA转换器。
然而,在目前的液晶显示装置中,由于接近驱动电路而配置DA转换器,所以像素部的周边电路会变得复杂,而存在显示面板的框缘面积增加的问题。尤其是,在从外部输入色调电压的情况下,端子数将会多增加色调的数目。
并且,由于将利用DA转换器而转换出的模拟数据,通过像素选择TFT72而写入像素部,所以必须供给(最大振幅电压+Vth)以上的电压以作为扫描信号。Vth是像素选择TFT72的阈值电压。因此,很难进行液晶显示装置的低电压化及低消耗电力化。
发明内容
本发明的一种显示装置,其特征在于:包括:漏极信号线,供给有从外部串行传输而来的数字影像信号;连接于该漏极信号线的多个像素选择晶体管;移位寄存器,对各个像素选择晶体管的栅极供给以规定时序取样数字影像信号用的取样脉冲;数据保持部,用于保持通过上述多个像素选择晶体管而经并行转换后的数字影像信号;设置于多个像素部之每一个像素部中的像素电极;多个电容电极,以加权后的电容值与该像素电极作电容耦合;及时钟供给部,按照上述信号保持部所保持的数字影像信号将周期性时钟信号供给至上述多个电容电极上。
若依据该种构成,则由于将DA转换部设在像素部内,所以可简化像素部周边电路的构成,使显示面板的框缘面积减少该简化部分的量。并且,由于是构成为在从外部将数字影像信号串行传输至各像素部、且对该数字影像信号进行串行并行转换之后、进行DA转换的结构,所以与并行传输数字影像信号的情况相比,可削减数据传输用的配线数,而可缩小在各像素部中所占的配线面积,其结果,可获得多色调、高精细的显示装置。
附图说明
图1是表示本发明第1实施方式的液晶显示装置的电路构成图。
图2是图1的移位寄存器SR的电路图。
图3是说明本发明第1实施方式的液晶显示装置的动作的时序图。
图4是说明本发明第1实施方式的液晶显示装置的动作的时序图。
图5表示本发明第1实施方式液晶显示装置的动作的其它时序图。
图6是本发明第2实施方式的液晶显示装置的电路构成图。
图7是表示反射型液晶显示装置的装置构造的剖面图。
图8是表示反射型液晶显示装置的其它装置构造的剖面图。
图9是表示本发明第3实施方式的电致发光显示装置的电路构成图。
图10是现有例的液晶显示装置的其它电路构成图。
符号说明:1传输栅极,2漏极信号线,5~8静态型内存电路,19像素电极,21液晶,32对向电极,41~44电容电极,SR移位寄存器,C0~C3电容,CS0~CS3电容,GT0~GT3像素选择晶体管,RT复位用晶体管,ST0~ST3时钟供给用晶体管。
具体实施方式
接着,一面参照附图一面说明本发明第1实施方式的显示装置。图1是表示该液晶显示装置的电路图。在图中,虽然为了简单起见而只表示一个像素部,但是实际上是在行列上配置有多个该像素部。
从漏极驱动器(未图示)串行传输出数字影像信号,通过传输栅极1,而供给至漏极信号线2。传输栅极1依控制时钟CP及*CP(CP的反转时钟)而控制导通截止(ON、OFF)。
像素选择晶体管GT0~GT3的漏极,共同连接在各漏极信号线2上。在像素选择晶体管GT0~GT3的各栅极上分别供给有以规定时序取样数字影像信号用的取样脉冲SP0~SP3。
该取样脉冲SP0~SP3,由移位寄存器SR所制作。移位寄存器SR,可由施加有移位时钟CLK及*CLK(*CLK为CLK的反转时钟)的时控反相器(clockedinverter)111、112及反相器113所构成。该移位寄存器SR将输入时钟AP按照移位时钟CLK及*CLK而依序移位,以从移位寄存器的各级中获得取样脉冲SP0~SP3。
在像素选择晶体管GT0~GT3的各源极上,连接有用于保持通过像素选择晶体管GT0~GT3而被写入的数字影像信号的各比特数据的电容CS0~CS3。
保持于电容CS0~CS3内的各比特数据,供给至设置于次级的时钟供给用晶体管ST0~ST3的栅极上。在时钟供给用晶体管ST0~ST3的源极上供给像素信号(Pixel Signal,周期性时钟)。然后,在时钟供给用晶体管ST0~ST3的漏极上,连接与像素电极19电容耦合的电容电极41、42、43、44。
因而,在像素电极19与电容电极41、42、43、44之间形成有电容C0、C1、C2、C3。在像素电极19与对向电极32之间封入液晶21。
即,时钟供给用晶体管ST0~ST3,按照从漏极信号线2通过像素选择晶体管GT0~GT3而保持于电容CS0~CS3内的数字影像信号而导通截止。例如,当时钟供给用晶体管ST0导通时,像素信号会通过时钟供给用晶体管ST0而施加在电容电极41上。由此,就会在像素电极19上产生相应于时钟的电压振幅VP-P及电容值C0的电压变化ΔV。
ΔV=C0×VP-P/(CLC+C0) …(1)
在此,CLC是像素电极19与对向电极32之间的电容值。因而,若使电容C0、C1、C2、C3对应数字影像信号的比特而进行加权的话,则可将对该数字影像信号进行模拟转换后的电压供给至像素电极19上。
上述ΔV一般可用如下公式来表示。
ΔV=∑C×VP-P/(CLC+∑C) …(2)
∑C=n0×C0+n1×C1+n2×C2+n3×C3 …(3)
(n0、n1、n2、n3)是数字影像信号数据,各比特是“1”或“0”。在此,各耦合电容以例如成为C1=2C0、C2=22C0、C3=23C0的方式设定对向面积或电极间距离,且进行电容值的加权。
另外,设置有对像素电极19供给复位信号的复位用晶体管RT。由此,就如后面所述可实现对液晶21交互施加反转电压的反转驱动方式。
其次,一面参照附图一面说明上述构成的液晶显示装置的动作。
图3及图4是表示液晶显示装置的时序图。首先参照图3,就串行并行转换的动作加以说明。当控制时钟CP上升至高电位时,传输栅极1就会导通,且数字影像信号Data会通过传输栅极1,并当作串行数据时序性地供给至漏极信号线2。数字影像信号Data的各比特数据,可依取样脉冲SP0~SP3而被取样,且通过像素选择晶体管GT0~GT3而转换成并行数据并保持于电容CS0~CS3内。在图3的例中,保持有(1、0、1、0)的4比特的数字影像信号Data。
其次,就并行转换后的AD转换动作加以说明。像素信号,通过晶体管ST0~ST3供给至电容电极41~43的信号,并以规定周期反复为0V和3V。复位控制信号,供给至复位用晶体管RT的栅极上的信号。复位控制信号是在像素信号反转之前立即变成高电位的脉冲信号。对向电极32固定在例如3V的直流电位。
现在,供给至漏极信号线2的串行的数字影像信号,可由上面所述的串行并行转换动作,转换成例如4比特的并行信号(1、0、0、0)。于是,通过像素选择晶体管GT0~GT3而接受供给的电容CS0~CS3之中供给有“1”的数据的CS0会充电,CS1~CS3会放电,而保持(1、0、0、0)的数据。由此,时钟供给用晶体管ST0会导通,ST1~ST3会截止,像素信号就会通过时钟供给用晶体管ST0而施加在电容电极41上。
当像素信号从0V变化至3V时,由于电容电极41与像素电极19电容耦合,所以像素电极19的电压,会从与对向电极32相同电位的3V,上升相应于电容电极41与像素电极19的电容值的电位ΔV0。同样地,若输入4比特的其它数据的话,则晶体管ST0~ST3会按照各比特的“1”“0”而导通、截止,且像素电极19的电位会变成相应于4比特的数字影像信号的电位。4比特的数字影像信号,保持于电容CS0~CS3内。当充入这些电容CS0~CS3内的电荷因晶体管的漏泄(leak)等而放电,变成低于晶体管ST0~ST3的阈值时,由于数据会消失,所以在消失之前必须将数据更新(refresh)。
如此,通过在具有电容CS0~CS3的数据保持部中保持数据,由于可在显示静止影像时,使画面更新率(framerate)降低至数据保持部的更新所需最低限的频率,所以可削减显示装置的消耗电力。并且,由于不象目前这样在驱动器周边部设置DAC,而在像素内利用电容耦合来内置DAC,所以更可缩小显示装置的框缘。
其次,当复位信号变成“H”时,复位用晶体管RT就会导通,使像素电极19的电压复位至与对向电极32的电位相等的电位,即3V。在复位信号回到“L”之后,像素信号就会从3V变化至0V。由此,像素电极19的电压就会因电容耦合而从3V下降ΔV0。如此,由于像素电极19的电压以相对于对向电极32作反转的方式变化,所以能不导致液晶21的劣化地进行驱动。
数据保持部的更新周期,与像素信号的周期完全不同步,而可形成独立的周期。在分别满足数据保持部的更新的必要性、及考虑过液晶劣化的像素信号的反转必要性的范围内,若分别设定在最慢的周期,则因可更加削减消耗电力而较佳。但是,当电路为了数据的更新而动作时,由于有因电路内的配线彼此之间的寄生电容等而在影像中产生噪声之虑,所以最好一面将各自的周期尽量设定得较慢,而一面使两者同步。
图5是表示液晶显示装置的其它时序图。有关该图,也表示并行转换后的AD(模拟数字)转换动作的时序。在该情况下,对向电极32会受交流驱动。像素信号将基准时钟分频,再使之延迟而作成,具有0V与3V的电压振幅。对向电极32与像素信号,具有相位的偏移。
并且,复位用晶体管RT,按照复位控制信号,将像素电极19的电压复位至复位信号#1或复位信号#2的信号电平。在图中,表示复位信号#1被选择的情况。复位信号#1,较对向电极先行,且在复位控制信号变成高电位之前或同时变动的信号。现在,对向电极为0V,当复位控制信号变成高电位时,像素电极会被复位成2V。
然后,复位控制信号回到低电位,且当像素信号反转而变成0V时,像素电极的电位会因电容电极41~44与像素电极的电容耦合,而从2V下降ΔV。以下同样地,从该时序图可明白,像素电极19会被驱动成相对于对向电极32作交互反转。
其次,一面参照附图而一面说明本发明第2实施方式的显示装置。图6是第2实施方式的显示装置的电路图。在图中,虽为了简单起见而只显示一个像素部,但是在实际的显示装置中,该像素部在行列上配置多个。并且,有关与说明第1实施方式的图1相同的构成部分附记相同元件符号,且省略其说明。
在本实施方式中,最大不同点在于设置静态型内存电路5~8,以取代第1实施方式中的数据保持用的电容CS0~CS3。静态型内存电路5~8,可由正反馈的2个反相器电路所构成。在第1实施方式中,虽对于数据保持有必要进行更新动作,但是在本实施方式中,由于其是静态型内存电路,所以可以更确实进行数据的保持。并且,在显示静止影像时,由于只要停止外部电路或各驱动器电路,而显示保持于数据保持部内的数据即可,所以较之于第1实施方式,更可达成低消耗电力。但是,较之于第1实施方式本实施方式的元件数变多,电路变复杂,且所需面积变大。另外,有关该显示装置的动作由于与第1实施方式相同所以省略说明。
其次,就本发明应用于反射型液晶显示装置的例子加以说明。一面参照图7而一面说明反射型液晶显示装置的元件构造。
如图7所示,在一方的绝缘性基板10上,在多晶硅所构成且被岛化的半导体层11上形成栅极绝缘膜12。在半导体层11的上方,隔着栅极绝缘膜12而形成栅极电极13。在位于栅极电极13两侧的下层的半导体层11中,形成源极11s及漏极11d。此种构造的薄膜晶体管,用在像素选择晶体管GT0~GT3及复位用晶体管RT中。在该图中,对应复位用晶体管RT而进行描绘。
在栅极电极13与栅极绝缘膜12上沉积层间绝缘膜14,且在对应该漏极11d的位置形成接触孔15,而漏极11d透过该接触孔15而与漏极电极16连接。并且,源极11s亦透过设置于层间绝缘膜14上的平坦化绝缘膜17的接触孔18而与像素电极19连接。并且,远离薄膜晶体管而在层间绝缘膜14上形成由铝(Al)等所构成的电容电极41、42、43,且通过与上方的像素电极19电容耦合,而形成电容C1、C2、C3。
形成于平坦化绝缘膜17上的各像素电极19由铝(Al)等的反射材料所构成。在各像素电极19及平坦化绝缘膜17上形成使液晶21定向的由聚酰亚胺等所构成的定向膜20。
在另一方的绝缘性基板30上,依序形成呈现红(R)、绿(G)、蓝(B)的各颜色的彩色滤光片、由ITO(Indium Tin Oxide:铟锡氧化物)等的透明导电性膜所构成的对向电极32、及使液晶21定向的定向膜33。在不作彩色显示的情况就不需要彩色滤光片。
将如此所形成的一对绝缘性基板10、30的周边利用粘着性密封材料来粘接,且在由此所形成的空隙内填充液晶21,而完成反射型液晶显示装置。
图8是反射型液晶显示装置的其它装置构造的示意图。在该构造中,像素电极19透过设置于平坦化绝缘膜17的接触孔18A而与设置于层间绝缘膜14上的电极19A连接。并且,在栅极绝缘膜12上形成电容电极41、42、43。由此,电容电极41、42、43可隔着电极19A而与像素电极19电容耦合。
其次,一面参照附图而一面说明本发明第3实施方式的显示装置。
图9是第3实施方式的显示装置的电路图。在图中,虽为了简单起见而只显示一个像素部,但是在实际的显示装置中,该像素部在行列上配置多个。并且,有关与说明第1实施方式的图1相同的构成部分附记相同元件符号,且省略其说明。
本实施方式,是将本发明应用于电致发光显示装置中的例子。本实施方式在设置于各像素上的浮动电极45与多个电容电极41~44进行电容耦合、且使浮动电极45的电位变动方面,与上述第1、第2实施方式相同。而且,具有EL驱动晶体管46、定电流源47及EL元件48。EL元件48,是以相应于流至元件的电流大小的亮度而发光的发光元件。在本实施方式中,浮动电极45,连接在EL驱动晶体管46的栅极上。EL驱动晶体管,以按照浮动电极45的电位而使导电率变化的方式设定阈值,而使相应于浮动电极45的电位大小的电流从定电流源47供给至EL元件48,使EL元件48以相应于该电流的亮度发光。当然,通过将EL元件48置换成LED等其它的发光元件,亦可轻易地应用于电流驱动型的显示装置中。
发明效果
根据本发明的显示装置,由于在像素部设置将数字影像信号转换成模拟影像信号的DA转换器,所以可简化像素部的周边电路的构成,而可使框缘的面积减少该简化部分的量。并且,由于构成为将数字影像信号从外部串行传输至各像素部,且对该数字影像信号进行串行并行转换之后,进行DA转换,所以与对数字影像信号进行并行传输的情况相比,可削减数据传输用的配线数,而可缩小在各像素部上所占的配线面积,结果,可获得多色调、高精细的显示装置。
Claims (4)
1.一种显示装置,其特征在于:包括:
漏极信号线,供给有从外部串行传输而来的数字影像信号;
连接于该漏极信号线的多个像素选择晶体管;
移位寄存器,对各个像素选择晶体管的栅极供给以规定时序取样数字影像信号用的取样脉冲;
数据保持部,用于保持通过上述多个像素选择晶体管而经并行转换后的数字影像信号;
设置于多个像素部之每一个像素部中的像素电极;
多个电容电极,以加权后的电容值与该像素电极作电容耦合;及
时钟供给部,按照上述信号保持部所保持的数字影像信号将周期性时钟信号供给至上述多个电容电极上。
2.如权利要求1所述的显示装置,其特征在于:上述多个电容电极的面积,根据数字影像信号的各比特进行加权。
3.如权利要求1或2所述的显示装置,其特征在于:上述数据保持部具有保持数据用的电容。
4.如权利要求1或2所述的显示装置,其特征在于:上述数据保持部由静态型内存电路所构成。
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US7088326B2 (en) * | 2003-04-22 | 2006-08-08 | Toppoly Optoelectronics Corp. | Single pixel driver for transflective LCD |
KR100771353B1 (ko) | 2005-08-16 | 2007-10-29 | 엡슨 이미징 디바이스 가부시키가이샤 | 디지털 아날로그 변환 회로 |
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JP2645036B2 (ja) * | 1987-10-31 | 1997-08-25 | 株式会社東芝 | 電子機器及び表示データ転送方法 |
JPH01193716A (ja) | 1988-01-29 | 1989-08-03 | Hitachi Ltd | 液晶表示装置 |
US4996523A (en) * | 1988-10-20 | 1991-02-26 | Eastman Kodak Company | Electroluminescent storage display with improved intensity driver circuits |
US5767828A (en) * | 1995-07-20 | 1998-06-16 | The Regents Of The University Of Colorado | Method and apparatus for displaying grey-scale or color images from binary images |
EP0797182A1 (en) | 1996-03-19 | 1997-09-24 | Hitachi, Ltd. | Active matrix LCD with data holding circuit in each pixel |
JPH10153986A (ja) * | 1996-09-25 | 1998-06-09 | Toshiba Corp | 表示装置 |
JP3780531B2 (ja) * | 1997-06-30 | 2006-05-31 | セイコーエプソン株式会社 | 映像信号処理回路、それを用いた映像表示装置及び電子機器並びにディジタル−アナログ変換器の出力調整方法 |
KR100430091B1 (ko) | 1997-07-10 | 2004-07-15 | 엘지.필립스 엘시디 주식회사 | 액정표시장치 |
US5952948A (en) * | 1997-09-24 | 1999-09-14 | Townsend And Townsend And Crew Llp | Low power liquid-crystal display driver |
GB2333174A (en) * | 1998-01-09 | 1999-07-14 | Sharp Kk | Data line driver for an active matrix display |
JP3483759B2 (ja) | 1998-03-19 | 2004-01-06 | 株式会社東芝 | 液晶表示装置 |
JP4161484B2 (ja) * | 1999-10-15 | 2008-10-08 | セイコーエプソン株式会社 | 電気光学装置の駆動回路、電気光学装置および電子機器 |
JP2001281635A (ja) | 2000-03-30 | 2001-10-10 | Mitsubishi Electric Corp | 液晶表示装置 |
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TW518552B (en) * | 2000-08-18 | 2003-01-21 | Semiconductor Energy Lab | Liquid crystal display device, method of driving the same, and method of driving a portable information device having the liquid crystal display device |
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JP2002311901A (ja) * | 2001-04-11 | 2002-10-25 | Sanyo Electric Co Ltd | 表示装置 |
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US20040212556A1 (en) | 2004-10-28 |
CN1479150A (zh) | 2004-03-03 |
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