CN1237774A - Active picture element sensor - Google Patents
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- CN1237774A CN1237774A CN98108710A CN98108710A CN1237774A CN 1237774 A CN1237774 A CN 1237774A CN 98108710 A CN98108710 A CN 98108710A CN 98108710 A CN98108710 A CN 98108710A CN 1237774 A CN1237774 A CN 1237774A
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Abstract
The active pixel sensor includes photosensitive diode, double carrier transistor and metal oxide semiconductor transistor. Said photosensitive diode possesses a cathode connected to power supply device and an anode connected to said metal oxide semiconductor transistor. Said metal oxide semiconductor transistor can be used to cut off the connection of the anode of said photosensitive diode and base electrode of the double carrier transistor to prevent picture from producing superbrightening, and can make the anode of the photosensitive diode connect with the metal oxide semiconductor transistor to make the electric charge being in the photosensitive diode flow through the metal oxide semiconductor transistor, then the electric charge is amplified by double carrier transistor so as to produce electric signal.
Description
The present invention relates to a kind of active pixel sensor cell, be particularly related to circuit and semiconductor device, in order to receive the light and convert light to a signal of telecommunication represent light intensity and to cross bright and by the image that the residual charge in the device the causes problem that lags in order to the image that elimination is caused by excessive charge.
The traditional images circuit comprises the photoreceptor array of a two dimension.Each photoreceptor comprises an image-element (pixel).Clash into the array of photoreceptor from the luminous energy of object radiation or reflection.Luminous energy converts electronic signal to by photoreceptor.Vision circuit scans each photoreceptor to read the signal of telecommunication.The signal of telecommunication of image is handled and is revealed by external circuit.
Using prevailing one chip image technology at present is that (Charged CoupleDevice is hereinafter referred to as the CCD camera for charge coupled device.CCD is operated by the electric charge that the photoreceptor trap that is accumulated in the Semiconductor substrate produces.The degree of depth of trap is controlled by being positioned at the semiconductor substrate surface grid potential.By changing grid potential, electric charge can move to sensing point at semiconductor substrate surface.Electric charge just is exaggerated into the signal of telecommunication of image.
Present metal-oxide semiconductor (MOS) (hereinafter referred to as MOS) technology allows the electric charge in the CCD structure to transmit, and can finish with video to be close to perfect efficient.Yet the sub-fraction charges accumulated can be lost when mobile along surperficial.Each trap institute charges accumulated can be moved and sensing when each frame.General this time is the order of magnitude of per second 30-60 frame.
CCD technology defectiveness.By sensing and before amplifying, can directly be removed by the electric charge that the light bump produces.Because this process is inefficent, the gain of this device (electronics output is to the photon input) is less than 1.Therefore, can limit each trap charge stored amount.The lowest charge amount that can be sensed is can be by the amount that sensor amplifier sensed on the sensor amplifier noise.The maximum sensing quantity of electric charge is confined to then that essence can produce and can moves on to the quantity of electric charge in another trap by a trap.
Overcome the restriction of these CCD dynamic ranges, come the sensing incident light with transistor.In U.S. Patent No. 5,260,592 (Mead people etc.), U.S. Patent No. 5,324,958 (Mead people etc.), and " A High Resolution CMOS Imager With Active Pixel Using Capacitively Coupled BiPolar Operation ", Chi people etc., paper#82, and Proceedings of International Conference on VLSI-technology, systens, and applications, Taipei, Taiwan, June 1997, and described high-definition image has just like Figure 1A, 1B, the simple structure that 1C understood.These dot structures adopt the standard process techniques of typical CMOS logic technology.
N type impurity injects a P type substrate 5 in order to form a N type trap 10.Field oxide 20 is grown up on the surface of Semiconductor substrate, in order to limit the border of pixel.P type impurity is injected into the P type base stage 15 that forms transistor Q1 160 in field oxide 20.N type trap is connected to a power supply unit, as the collector electrode of transistor Q1 160.Next step is grown up the thin layer of a gate oxide, in order to form the capacitor dielectric 30 of capacitor C65 on the surface of P type base stage 15.One deck polysilicon 35 is deposited on the whole P type base stage 15.In order to form second pole plate of capacitor C65.The edge reoxidize form with the oxide gap after, N type impurity is injected into the emitter 25 as transistor Q1 160.P type base stage 15 keeps floating.Its current potential is by coupling capacitance C65 current potential V
RowDetermine.The polycrystalline silicon substances layer is connected to row enable circuit V
Row62.Row enable circuit V
Row62 will make the collected electric charge of transistor Q1160 transfering transistor Q1160.
Second insulant as silicon dioxide is deposited on the surface of Semiconductor substrate in order to form dielectric medium 40.One metal level 45 places with the emitter 25 of double carriers transistor Q1160 and contacts objective window 50.This metal level 45 is as the intraconnections that is connected to sensor amplifier 70.Above-mentioned technology can be used to make the CMOS transistor significantly.For example, polycrystalline silicon substances 35 can be used for can be used to do source/drain regions as the N type infusion of this emitter 25 in order to form the transistorized grid of CMOS.Compare with the process with manufacturing CCD, making double carriers pixel and the transistorized compatibility of CMOS is a very big advantage.
Strike active 17 of P type base stage from the light quantum L1105 of external world's reflection or radiation.Light quantum 105 is absorbed the back and forms electron-hole pair near collector-base bonding land and emitter region-base stage bonding land.Electron-hole pair can be collected in nearest p-n bonding land.A spot of charge carrier collected in collector-base bonding land 12 or emitter-base stage bonding land as base current.Base current is multiplied by transistorized current gain collector current.Signal code ISC on the emitter 25 of transistor Q1160 be photon conversion become base current that electron-hole pair produces and collector current and.Signal code ISC100 is transferred to sensor amplifier 70 under certain conditions.
Referring now to the operation of Fig. 1 D with the understanding transistor pixel structure.Between integration period 102, row enable circuit V
Row62 remain on a fixed potential uses so that transistor Q
1160 base-emitter bonding land 22 reverses biased.In this case, photon 105 converts the electric current that electron-hole pair produces to and can accumulate on the capacitor C65.
When wanting to read in the quantity of electric charge of 107 generations between integration period, row enable circuit V
Row62 during time for reading 104, and its current potential can reach high potential.By being coupled to capacitor C65 to V
Row62, P type base stage potential energy rises, and becomes forward bias according to emitter 25.Understand the base stage 15 of inflow transistor Q1160 and form emitter current at the electric charge of capacitor C65, that is signal code I
SC100.
Other structures that comprise optical diode and MOS transistor can be with reference to " Image CaptureCircuits in CMOS " E.Fossum, Paper #B1, Proceedings of InternationalConference on VLSI-Technology, Systems, and Applications, Taipei, Taiwan, June1997.One passive pixel circuit comprises an optical diode and a MOS transmission transistor, and optical diode converts light to electric charge.The MOS transmission transistor makes electric charge by arriving electric charge accumulation amplifier.One active pixel circuit comprises an optical diode, a MOS transmission transistor and the one source pole follower temporary amplifier as electric charge accumulation amplifier.The MOS transistor of signal institute activation of being reset is placed into the active pixel circuit, makes it as an electronic switch in order to the optical diode that resets.
With the described cmos pixel circuit of Chi by comparison, the advantage that Figure 1A, the active double carriers image element circuit that 1B and 1C illustrated have high sensitivities, simplify pixel layout and reduce manufacturing cost.Yet the double carriers active pixel had the bright shortcoming that lags with image.
With reference to Fig. 2 to understand bright phenomenon.In a pel array (pixel A 80-pixel X85), a row pixel A 80 can accumulation be clashed into the electric charge that transistor Q160a produces from light quantum L1105.At this moment, row enable circuit V
RowaReach electronegative potential, make the base-emitter bonding land reverse biased of transistor Q1; And allow electric charge be collected on the capacitor C65a.At this moment, another row pixel X85 can be read with sensing at present at the charge potential of capacitor C65a.
If the light quantum energy that impinges upon on the pixel A 80 is enough big, electric charge begins the base-emitter bonding land forward bias voltage drop with transistor Q160.This can cause that one overflows electric current (overflowcurrent) I
Ofc95 flow to row intraconnections 90.The total current I that sensor amplifier senses
Tot110 for overflowing electric current I
Ofc95 with signal code I
SCSum.The pixel that is read (pixel X85) will this has than it brightness also bright.This can cause that bright spot is bright excessively in the image.
Referring now to Fig. 3 to understand the reason that image lags.Pixel X in this figure is read when last frame 200, frame before present frame.As row enable circuit V
RowxWhen reaching electronegative potential 185 by high potential, according to emitter, by the coupling of capacitor C165, this P type base stage is anti-phase bias voltage.
In image integration time at the beginning the time, all pixels that are not all row all have identical P type base stage potential energy.Read action at the beginning, V one
RowWhen transferring to electronegative potential by high potential, promptly during pulse height, the slippage of P type base stage potential energy is:
Δ V
BThe coupling efficiency of=(pulse height) * (coupling rate) capacitor C 165 is defined as:
Wherein:
C
BEIt is the junction capacitance of the base-emitter of transistor Q1160
C
BCIt is the junction capacitance of base stage-collector electrode of transistor Qq160
P type base potential is by current potential V
Row(γ) controls with coupling efficiency.Therefore, the electric charge of removing from capacitor C165 is also incomplete, and can cause a part of aftercurrent 210 at the emitter of transistor Q1160.
The second portion of aftercurrent 210 is, is retained in the residue of the small part charge carrier of p-base stage from the injection electronics of the base stage-emitter-base bandgap grading bonding land of the suitable phase bias voltage of transistor Q1160 between the time for reading formerly.The electric charge that remains in P type base stage continues to flow to the emitter of transistor Q1160 with current gain, and adds the signal code 215 of present time for reading.This can form a ghost after trailing mobile object or bright object.Remaining electric charge can disappear because of reorganization or minority carrier leave P type base stage at last after a period of time.The time that image lags approximately is the lifetime (being about 100 milliseconds) of minority carrier, and its sustainable several frame.
Impurity can be added in P type base stage and be used for as " killer between the lifetime " (life-time killer) in order to reduce reorganization time.The difficulty of " killer between the lifetime " is that it can increase leakage current between the bonding land, lowers the sensitivity of image.
U.S. Patent No. 5,097, the optical sensor that 305 (Mead people etc.) are carried has the capacitor that a transistor and is coupled to transistor base.One transmission transistor be placed on emitter in order to coupled signal electric current optionally to sensor amplifier.
U.S. Patent No. 5,288,988 (Hashimo people etc.) describe one and are similar to Fig. 1 a, the optical sensor circuit that 1b and 1c painted.This device adds a MOS transistor in its light-switching device.When the MOS transistor activation, make that by the residual charge of eliminating from transistorized base stage above-mentioned aftercurrent is blocked.
Therefore main purpose of the present invention is to provide a kind of CMOS active pixel sensor to become a signal of telecommunication in order to the convert light energy of a quantum, represents the size of this light quantum energy.
Another main purpose of the present invention provides a kind of CMOS active pixel sensor and is used for avoiding the bright excessively problem of image.
Another main purpose of the present invention is to provide a kind of CMOS active pixel sensor to be used for to reduce residual charge to reduce the problem that image lags.
According to purpose of the present invention, a kind of CMOS active pixel sensor comprises an optical diode, a double carriers transistor and a MOS transistor.Optical diode has a negative electrode and is connected to a power supply unit and an anode.Light quantum can impinge upon and produce electric charge on the anode and in optical diode.MOS transistor can avoid image bright excessively.MOS transistor has a drain electrode to be connected to the anode of optical diode, source electrode and grid, grid is connected to sensor control circuit, in order to optionally make MOS transistor activation and inefficacy be used for stoping or the permission flow of charge through MOS transistor.The double carriers transistor can amplify the charge generation signal of telecommunication.The double carriers transistor has a collector electrode and is connected to power supply unit, and the source electrode that a base stage is connected to MOS transistor is in order to receiving electric charge when MOS transistor is enabled, and an emitter is connected to external circuit and sends the signal of telecommunication to external circuit.
CMOS active pixel sensor also comprises a parasitic mos transistor, and this parasitic MOS transistor has a drain electrode, is the anode of optical diode; One source pole is the anode of optical diode of showing an adjacent CMOS active pixel sensor of active picture sensor in an active pixel sensor array.Parasitic mos transistor has a grid and is connected to a reset circuit in order to the parasitic mos transistor conducting, make it to reset at a potential energy of anode of showing the optical diode of identical potential energy current potential, therefore the image that is caused by the anode potential inequality phenomenon that lags can be eliminated on CMOS active pixel sensor after resetting.
For above-mentioned purpose of the present invention, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and conjunction with figs. are done following detailed description.
Figure 1A and 1B provide the top view of traditional photo sensor unit and the profile of Semiconductor substrate.
Fig. 1 C provides the circuit diagram of traditional photo sensor unit among Figure 1A and the 1B.
Fig. 1 D provides the sequential chart of traditional photo sensor unit among Figure 1A and the 1B.
Fig. 2 provides the circuit diagram of two unit of the photosensor array unit of conventional art, overflows electric current in order to explanation and causes image bright excessively.
Fig. 3 provides the circuit diagram of the photosensor array unit of conventional art, lags in order to the caused image of explanation residual circuitry.
Fig. 4 A and 4B provide according to the top view of CMOS active pixel sensor of the present invention and the profile of Semiconductor substrate.
Fig. 4 C provides the circuit diagram of active pixel sensor cell of the present invention among Fig. 4 A and Fig. 4 B.
Fig. 4 D provides the sequential chart of active pixel sensing unit of the present invention.
Fig. 5 provides the circuit diagram of two unit of active pixel sensor array of the present invention unit, eliminates in order to explanation and overflows electric current.
Fig. 6 A, 6B and Fig. 6 C provide the top view and the profile of three unit, active pixel sensor array of the present invention unit, lag to reduce image in order to explanation optical diode reset operation.
With reference to Fig. 4 A, 4B and 4C, it provides a kind of figure according to a preferred embodiment of the present invention.In order to understand the structure of CMOS active pixel sensor of the present invention.The manufacturing of this device is since a typical silicon wafer P type substrate 305.Then with P substrate 305 surface shaded and inject a N type impurity as N type trap 310.One insulation layer or field oxide 315 are grown up to limit the zone of active pixel cell.Among the zone of active pixel sensor cell, limit the p type anode 330 of optical diode D1420 with mask.N type trap and power supply V
CCContact and as the negative electrode of optical diode D1420.Second district among the zone of active pixel sensor cell limits the zone of the P type base stage 320 of double carriers transistor Q1420 with mask.Inject a p type impurity to form P type base stage 320.Afterwards, in the zone of P type base stage 320, cover the 3rd zone and inject the emitter 325 of N type impurity as double carriers transistor Q1420.The collector electrode of double carriers transistor Q1420 is a N type trap 310.
The P type base stage 320 of double carriers transistor Q1420 and the p type anode 330 of optical diode D1420 form the source electrode and the drain electrode of MOS transistor respectively.Grid oxic horizon 340 is grown up above source electrode 320 and 330 channel region 337 of drain electrode.One polycrystalline silicon substances 335 is arranged on the grid oxic horizon 340 and is etched with the grid that forms MOS transistor M1315.
One insulant is deposited on the surface of Semiconductor substrate in order to form dielectric medium 350.With N
+The opening of the contact 327 of emitter 325 in dielectric medium 350 forms.Deposit one metal level 355 is the external circuit of an active pixel sensor array in order to connect emitter 325 and the sensor amplifier 425 of transistor M1410.The polycrystalline silicon substances 335 that forms MOS transistor M1415 grid is connected to row enable circuit V
Row416, be a sensor control circuit.Apparently, above-described flow process can be used to make the CMOS transistor.For example polycrystalline silicon substances 335 can be used as the transistorized grid of CMOS, is used for doing the N type infusion of emitter 325 to form source/drain regions.With the process that is used for making the CCD method by comparison, making double carriers pixel and the transistorized compatibility of CMOS has very large advantage.
Referring now to the operating principle of Fig. 4 D with the understanding active pixel sensor cell.The p type anode of light quantum L334 bump diode D1420.Light quantum L334 can give enough energy and produce electron-hole pair, is similar at Figure 1A the transistor Q1160 that 1B and 1C describe.The p type anode of hole meeting migration optical diode D1420.Electronics can be collected at the negative electrode (N type trap 310) of optical diode D1420 and via power supply V
CCRemove.The hole of positively charged is accumulated in the p type anode of optical diode D1 420, and diagram is a potential energy that increases progressively.Row enable circuit V
Row415 become electronegative potential from a high potential, then conducting P MOS transistor M1415.Charge Q by light quantum L334 (image) generation
S494 current potential V with p type anode
P anodeExpression, the P type base stage 320 of meeting inflow transistor Q1410 forms base current I
B1417.Base current I
B1417 can be amplified and form signal code I by transistor Q1410
SC412.After sensing signal code, row enable circuit V
Row416 can be returned to electronegative potential 485, have the P type base stage 320 that a residual charge Q496 is retained in optical diode S1420 this moment.Afterwards, the p type anode 330 of optical diode D1420 can reset to a current potential with described reset operation hereinafter.
Earlier avoid the bright excessively operating principle of pixel image to understand CMOS active pixel sensor of the present invention with reference to Fig. 5.Pixel A 430 is two CMOS active pixel sensor of active pixel sensor array with pixel X435.Pixel A 430 is connected to row 460 and common sensor amplifier 426 with pixel X435.
This pixel A 430 triggers control by row enable circuit V
Rowa440 via intraconnections Rowa450 control, and pixel X435 triggers control by row enable circuit V
Rowx455 control via intraconnections Rowx455.When row cause system energy circuit V
Rowa450 reach high potential 422, and pixel A 430 can be in the long-pending time 489 of spiral shell.This moment is if the stored charge that the optical diode D1420b of light quantum L2470 bump pixel X435 produces is read row enable circuit V
Rowx455 can reach electronegative potential 477 with conducting PMOS transistor M1415b.Signal code I
SC412b can flow out from the emitter of the transistor Q1410b of pixel X435.
Even it is very strong to impinge upon the light quantum of optical diode D1420a, do not have the electric current I of overflowing among Fig. 2 yet
Ofc95.PMOS transistor M1415a can and not have electric current can flow through this transistor Q1410a by the nothing effect.The hole can be accumulated on the p type anode under extremely strong light quantum L1465 effect, and the potential energy that increases p type anode apace is up to optical diode forward bias a little, and " overflowing electric current " can flow to the power supply V of the negative electrode that is connected on optical diode
CCTherefore, total current I
Tot413 do not have incoherent part and only by signal code I
SCConstitute.Because sensing is put 425 electric currents that can receive suitable size of device, looked like bright formation so can prevent Fig. 4.
With reference to Fig. 4 A, 4B, 4C and 4D understand reset response.Second polycrystalline silicon substances 360 is deposited on one deck when grid oxic horizon is grown up on the formed megohmite insulant.The polysilicon 360 that resets is connected to a reset circuit V
ResetReset circuit V
ResetCan execute an electronegative potential 480 in order to the polysilicon 360 that resets, this will make by the contiguous formed parasitic PMOS transistor turns of active pixel sensor and make all p type anodes 330 reset to identical potential energy.About the details of parasitic P-MOS transistor AND gate reset response, at following Fig. 6 A, 6B and 6C can be illustrated.
Fig. 6 A, 6B and 6C show three the CMOS active pixel sensor 500a that list in an active pixel sensor array that is made of row and row, 500b, 500c.Each those CMOS active pixel sensor 500a, 500b, the PMOS transistor M1515a of 500c, 515b, the grid 505a of 515c, 505b, 505c is connected to row enable circuit V by this common row polycrystalline silicon substances 335
RowReset polysilicon 360 and each CMOS active pixel sensor 500a, 500b, the polysilicon 360 that resets of 500c is connected to each other, and is connected to reset control circuit V
Reset535.At an end end of showing active picture sensor, bonding land, an edge 520 is injected into Semiconductor substrate 305 by a P type material and is formed.This edge join district is connected to a grid bias power supply V
p+ 330.Formed oxide layer 365 when grid oxic horizon is grown up can be polysilicon layer 360 and the P anode 330a of resetting, 330b, and 330c is isolated.
Each p type anode 330a, 330b, 330c be as each CMOS active pixel sensor 500a, 500b, the PMOS transistor M1515a of 500c, 515b, the drain/source of 515c.As reset circuit V
Reset530 when being biased into an electronegative potential, each CMOS active pixel sensor 500a, 500b, respectively this PMOS transistor M1515a of 500c, 515b, 515c can be switched on and all p type anode 330a, 330b, the current potential of 330c are reset to the current potential identical with the edge join district, grid bias power supply V
p+ 530.
One V
TThe channel region that infusion 535 optionally is placed in parasitic transistor P1550 in order to the stopping potential that limits a parasitic mos transistor P1550 to the value of wanting.This infusion can be N type impurity or the p type impurity end depends on that parasitic mos transistor P1550 is used as to strengthen or the shortage MOS transistor.
Parasitic transistor P1550 action, by the current potential of all p type anodes of row that reset to the bias V in edge join district
p+ 530 is identical, and the problem that this meeting part removal of images lags is as described at conventional art.
With reference to Fig. 4 C and 4D.During reading action, image charge Q
S494 can flow into P type base stage as a base current, make the P type base stage forward bias voltage drop of transistor Q1410 and open beginning double carriers transistor action.Image charge Q
S494 base currents that form can be exaggerated and become emitter current I
SC, it can flow into sensor amplifier 425.The total electrical charge that sensor amplifier 425 is gathered, the image charge Q that is exaggerated
S494, be used for representing impinging upon the intensity of the light quantum L1334 of optical diode D1 420.
The annode area of this light two utmost point D1420 is designed to also bigger than the base stage of double carriers transistor Q1410.This can force the base stage of double carriers transistor Q1410 to have the voltage identical with the anode of optical diode D1420.The minority carrier (from the emitter injected electrons) that injects is bound in the base stage of double carriers transistor Q1410, and can't flow through reverse P type channel MOS transistor and arrive the anode of optical diode D1420.
One corresponding pixel, having a PNP double carriers transistor AND gate one nmos pass transistor can finish at an easy rate by the polarity of silicon matter of this injection of counter-rotating.The operation bias voltage also can be suitably reverse.
In sum; though the present invention discloses as above with a preferred embodiment; right its is not in order to limit the present invention; any those skilled in the art; without departing from the spirit and scope of the present invention; can do various changes and retouching, so protection scope of the present invention should be as the criterion with claims institute restricted portion.
Claims (20)
1. a CMOS active pixel sensor becomes the signal of telecommunication in order to receive the light quantum energy and to change this light quantum energy, comprising:
One optical diode has a negative electrode and is connected to a power supply unit and an anode, and wherein this light quantum can clash into to this anode and in this optical diode and produce electric charge;
One metal oxide semiconductor transistor, bright excessively in order to prevent image, it has the anode that a drain electrode is connected to this optical diode, an one source pole and a grid are connected to a sensor control circuit, wherein this sensor control circuit optionally makes this metal oxide semiconductor transistor activation and makes inefficacy, with so that this flow of charge through this metal oxide semiconductor transistor; And
One double carriers transistor, in order to amplify these electric charges to produce the signal of telecommunication, have a collector electrode and be connected to this power supply unit, one base stage is connected to this metal oxide semiconductor transistor in order to receive these electric charges when this metal oxide semiconductor transistor activation, and an emitter is connected to external circuit in order to shift this signal of telecommunication to external circuit.
2. CMOS active pixel sensor as claimed in claim 1, wherein this transducer is formed on the semi-conductive substrate, impurity with first conductivity type is infused on the surface of this Semiconductor substrate, and a trap of the impurity of second conductivity type flows in this surface of this Semiconductor substrate.
3. CMOS active pixel sensor as claimed in claim 2, wherein this negative electrode of this optical diode is this trap that flows in this surface of this Semiconductor substrate, this anode is formed by this impurity injection first area with this first conductivity type in this trap, wherein this anode is enough to flow sub-transistor base greater than this two-carrier, makes that remaining minority carrier is tied in this base stage to lower the problem that image lags in this base stage.
4. CMOS active pixel sensor as claimed in claim 3, wherein transistorized this collector electrode of this double carriers is this trap that flows in this Semiconductor substrate, this base stage is formed by this impurity injection second area with this first conductivity type in this trap, and this emitter is to inject the 3rd regional formation by this impurity with this second conductivity type in this base stage.
5. CMOS active pixel sensor as claimed in claim 4, wherein this drain electrode of this metal oxide semiconductor transistor is this first area with impurity of this first conductivity type, this source electrode of this metal oxide semiconductor transistor is this second area with impurity of this first conductivity type, and this grid is formed by whole this source electrode of a grid oxic horizon and the channel region growth between drain electrode.
6. CMOS active pixel sensor as claimed in claim 5, wherein this emitter is received this external circuit via a metal interconnecting that is deposited on this integrated lip-deep insulating barrier of this semiconductor, and contacts with this emission collection.
7. CMOS active pixel sensor as claimed in claim 1, also comprise a parasitic metal oxide semiconductor transistor, having a drain electrode is this anode of this optical diode, one source pole is this anode of this optical diode of CMOS active pixel sensor of showing the vicinity of active picture sensor one of in active pixel sensor array, and one grid be connected to reset circuit should the parasitism metal oxide semiconductor transistor in order to conducting, use a current potential of this anode of this near-infrafed photodiodes that resets, prevent image on this CMOS active pixel sensor problem that lags.
8. pattern matrix, in order to receive from the luminous energy of external world's reflection or radiation, change this luminous energy be the signal of telecommunication in order to represent the intensity of this luminous energy, comprising:
A) CMOS active pixel sensor of a plurality of enranks, each CMOS active pixel sensor of each CMOS active pixel sensor wherein comprises:
One optical diode has a negative electrode and is connected to a power supply unit and an anode, and wherein this luminous energy can clash into this anode and produce electric charge at this negative electrode;
One metal oxide semiconductor transistor, in order to prevent being connected to this anode of this optical diode having a drain electrode, the utmost point pattern matrix of an one source pole and a grid causes image bright excessively, and
One double carriers electric transistor, in order to amplify these electric charges to produce this signal of telecommunication, have a collector electrode and be connected to a power supply unit, one base stage is connected to this metal oxide semiconductor transistor, when this metal oxide semiconductor transistor activation in order to receiving those electric charges, an and emitter;
B) a row enable circuit be connected to respectively this grids of those metal oxide semiconductor transistors that respectively list in order to optionally will each the metal oxide semiconductor transistor activation that respectively lists with make inefficacy so that those flow of charge are through this metal oxide semiconductor transistor; And
C) a plurality of sensor amplifiers, wherein each sensor amplifier is transistorized those emitters of those double carriers of CMOS active pixel sensor that are connected on each row, in order to sensing and amplify this signal of telecommunication, and this signal of telecommunication is sent to external circuit.
9. pattern matrix as claimed in claim 8, wherein this active pixel sensor array is formed on the semi-conductive substrate, have the impurity that on a surface of this Semiconductor substrate, injects first conductivity type, and a trap that in this surface of this Semiconductor substrate, injects the impurity of second conductivity type.
10. pattern matrix as claimed in claim 9, wherein this negative electrode of this optical diode of each CMOS active pixel sensor is this trap that flows in this surface of this Semiconductor substrate, this anode is to flow into the first area with the impurity of this first conductivity type to be formed in this negative electrode, wherein this anode is sufficiently more than transistorized this base stage of this double carriers, and therefore the remaining minority carrier in this base stage can be tied to this base stage to lower the phenomenon that image lags.
11. pattern matrix as claimed in claim 10, wherein transistorized this collector electrode of this double carriers of each CMOS active pixel sensor is this trap that injects in this Semiconductor substrate, this base stage is formed by the impurity injection second area with this first conductivity type in this trap, and this emitter is to inject the 3rd regional formation by this impurity with this second conductivity type in this second area.
12. pattern matrix as claimed in claim 11, wherein this drain electrode of this metal oxide semiconductor transistor of each CMOS active pixel sensor is this first area that the impurity of this first conductivity type is arranged, the source electrode of this metal oxide semiconductor transistor is this second area that the impurity of this first conductivity type is arranged, and this grid be by a whole grid oxic horizon be deposited on whole this source and with the communication between this drain electrode distinguish formed.
13. pattern matrix as claimed in claim 12, wherein this emitter is connected to a sensor amplifier and contacts this emitter with a metal interconnecting that is deposited on this lip-deep insulating barrier of this Semiconductor substrate.
14. pattern matrix as claimed in claim 8, each CMOS active pixel sensor wherein, also comprise a parasitic conductor metal oxide transistor, having a drain electrode is this anode of this optical diode, one source pole is this anode of this optical diode of showing the contiguous CMOS active pixel sensor of active picture sensor at one of an active pixel sensor array, and a grid.
15. pattern matrix as claimed in claim 14, comprise that also a reset circuit is connected to this grid of this parasitism metal oxide semiconductor transistor, using activation should the parasitism metal oxide semiconductor transistor, is able to be reset to the problem that a current potential that equates lags with the image of avoiding on this pattern matrix at this anode of respectively showing each optical diode in the active picture sensor.
16. a method, semi-conductor device manufacturing method is the signal of telecommunication in order to make a CMOS active pixel sensor on the Semiconductor substrate of the impurity with first conductivity type, to use and to receive the light quantum energy and change this light quantum, its step comprises:
A) mask regions by this Semiconductor substrate forms a trap in this Semiconductor substrate, and injects the impurity of second conductivity type in this Semiconductor substrate;
B) by at this zone outgrowth one field oxide in order to limit a zone of this CMOS active pixel sensor;
C) mask regions with this Semiconductor substrate forms an optical diode in this trap, and the impurity that injects first conductivity type is in order to form the anode of this optical diode, and wherein this trap is a negative electrode of this optical diode;
D) form a double carriers transistor, so that this Semiconductor substrate is imposed mask, and inject first conductive-type impurity, this Semiconductor substrate is imposed mask as base stage, and inject second conductive-type impurity as emitter, wherein one collector electrode is arranged is this trap to this double carriers transistor; And
E) form a metal oxide semiconductor transistor, in a channel region of this anode, be used for drain electrode as this metal oxide semiconductor transistor with deposit one gate oxide, this base stage is used for source electrode as this metal oxide semiconductor transistor; And deposit first polysilicon, on this grid oxic horizon, form a grid.
17. method as claimed in claim 16, wherein this grid is connected to a sensing control circuit, in order to optionally with this metal oxide semiconductor transistor activation with make inefficacy, make this light quantum impinge upon the electric charge that this anode forms and flow to the transistorized base stage of this double carriers.
18. method as claimed in claim 16, wherein this anode is sufficiently more than transistorized this base stage of this double carriers, so that be bound in this base stage at the minority carrier of this base stage, lags thereby reduce image.
19. method as claimed in claim 16 also comprises a step, in order to form a parasitic metal oxide semiconductor transistor, this step comprises:
A) growth one megohmite insulant is in order to form a parasitic gate oxide layer of this parasitism metal oxide semiconductor transistor;
B) deposit second polycrystalline silicon substances is on this parasitic gate oxide layer, as a grid of this parasitism metal oxide semiconductor transistor; And
C) a drain electrode that wherein should the parasitism metal oxide semiconductor transistor is the anode of this optical diode, and one source pole that should the parasitism metal oxide semiconductor transistor is this anode of this optical diode of the contiguous CMOS active pixel sensor that forms on this Semiconductor substrate.
20. method as claimed in claim 16, this grid that wherein should the parasitism metal oxide semiconductor transistor is connected to a reset circuit, provided a reset signal with activation should the parasitism metal oxide semiconductor transistor so that this anode resets at a current potential, lag in order to avoid the image on this CMOS active pixel sensor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB981087108A CN1228833C (en) | 1998-05-29 | 1998-05-29 | Active picture element sensor |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB981087108A CN1228833C (en) | 1998-05-29 | 1998-05-29 | Active picture element sensor |
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| CN1237774A true CN1237774A (en) | 1999-12-08 |
| CN1228833C CN1228833C (en) | 2005-11-23 |
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| CNB981087108A Expired - Lifetime CN1228833C (en) | 1998-05-29 | 1998-05-29 | Active picture element sensor |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105826344A (en) * | 2016-05-04 | 2016-08-03 | 芜湖生命谷基因科技有限公司 | Image sensor and preparation method of pixel units of image sensor |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105826344A (en) * | 2016-05-04 | 2016-08-03 | 芜湖生命谷基因科技有限公司 | Image sensor and preparation method of pixel units of image sensor |
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| CN1228833C (en) | 2005-11-23 |
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