CN1237603C - Forming method of shallow groove spacing structure - Google Patents

Forming method of shallow groove spacing structure Download PDF

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CN1237603C
CN1237603C CN 02146139 CN02146139A CN1237603C CN 1237603 C CN1237603 C CN 1237603C CN 02146139 CN02146139 CN 02146139 CN 02146139 A CN02146139 A CN 02146139A CN 1237603 C CN1237603 C CN 1237603C
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silicon oxide
isolation structure
oxide layer
fleet plough
formation method
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CN1494125A (en
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黄建恺
郑丰绪
李瑞评
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United Microelectronics Corp
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United Microelectronics Corp
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Abstract

The present invention relates to a forming method of a shallow trench spacing structure. Firstly, a substrate with a trench is provided, and a silicon oxide layer is formed in compliance on the surface of the trench as a lining silicon oxide layer through the wet oxidation method of a process for manufacturing a single wafer. Tempering treatment is carried out for the substrate and the lining silicon oxide layer in site. Finally, an insulation layer is filled in the trench completely so as to complete the manufacture of a shallow trench spacing structure. The present invention has the efficiency of increasing the uniformity of each lining silicon oxide layer with the wafer, releasing stress and preventing adulterant from diffusing from a component area to the shallow trench spacing structure.

Description

The formation method of fleet plough groove isolation structure
Technical field
The invention relates to a kind of manufacture of semiconductor, particularly relevant for a kind of formation shallow trench isolation from (shallow trench isolation, STI) method of structure.
Background technology
Isolated area in semiconductor integrated circuit is the element region that is adjacent in order to isolation, and in the middle of preventing that charge carrier from infiltrating into contiguous element from substrate.
In various element separation technology, localized oxidation of silicon method (LOCOS) and shallow channel isolation area processing procedure are two kinds of technology of normal employing, especially the latter, because of have area of isolation little and finish after still keep advantage such as substrate flatness, quite valued recently especially semiconductor fabrication.
Consult shown in Figure 1ly, it is the generalized section of traditional fleet plough groove isolation structure, and a pad silicon oxide layer (pad oxide) and a silicon nitride layer (not illustrating) are to be formed in the substrate 10.Have a groove in the substrate 10, it is by after photoetching etching routine plan silicon nitride layer and the pad silicon oxide layer, comes substrate 10 is carried out etching and formed as mask with the silicon nitride layer of patterning.The lining silicon oxide layer of flute surfaces (liner oxide layer) the 14th utilizes thermal oxidation method to form.Component isolation structure 16 is earlier by chemical vapour deposition technique (chemical vapor deposition, CVD) on silicon nitride layer, form an oxide layer and inserting in the groove, (cemical mechanic polishing CMP) removes the silicon nitride layer unnecessary silicon oxide layer in top and finishes with chemical mechanical milling method again.Afterwards, remove nitration case and pad silicon oxide layer, so just finish the making of fleet plough groove isolation structure.Its major defect is:
1, because close with pad silicon oxide layer and lining silicon oxide layer 14 by the character of the component isolation structure 16 that silica constituted, when utilizing etching solution when removing the pad silicon oxide layer, unavoidably can be simultaneously etched by the component isolation structure 16 that silica constituted, make lining silicon oxide layer 14 pointizations of groove top corners 20, cause that electric field is concentrated, and cause the insulation effect variation of groove top corners 20, and then unusual element characteristic appears.
2 moreover, in etching substrate 10, when forming groove and utilizing thermal oxidation method to form lining silicon oxide layer 14 again, all can in substrate 10, produce stress, for example, stress can concentrate on the top corners 20 and the bottom corner 22 of groove, and produces leakage current.
3, in addition, forming the lining silicon oxide layer with thermal oxidation method needs the more processing procedure time, thereby production capacity is descended.
4 moreover, because typical semiconductor factory is to carry out above-mentioned thermal oxidation processing procedure with batch formula boiler tube (batch furnace), so the uniformity of wayward film and reduces the reliability of element.
Summary of the invention
The formation method that the purpose of this invention is to provide a kind of fleet plough groove isolation structure, the wet oxidation that wherein serves as a contrast silicon oxide layer and be at high temperature by single silicon wafer process forms, to obtain the lining silicon oxide layer of a sphering in the groove top corners, reach the inhomogeneity purpose of the lining silicon oxide layer that increases each special wafer.
Another object of the present invention provides a kind of formation method of fleet plough groove isolation structure, and it is after forming the lining silicon oxide layer, and enforcement one is annealing in process when participating in the cintest, reaches to discharge stress and prevent that alloy from diffusing to the purpose of fleet plough groove isolation structure from element region.
The object of the present invention is achieved like this: a kind of formation method of fleet plough groove isolation structure.At first, provide substrate with a groove; Then, use the wet oxidation of single silicon wafer process, in the surperficial compliance formation one silica layer of groove, to serve as a contrast silicon oxide layer as one; Afterwards, substrate and lining silicon oxide layer are implemented an annealing in process when participating in the cintest; At last, in groove, insert an insulating barrier fully, and finish the making of fleet plough groove isolation structure.
Wherein, the thickness of silicon oxide layer is in the scope of 150-250 dust, and it can use hydrogen and oxygen as reacting gas, and forms under 1100-1200 ℃ temperature range.Moreover the flow of hydrogen is in the scope of 10-16slm, and the flow of oxygen is in the scope of 5-8slm.When participating in the cintest the temperature of annealing in process is 1100-1200 ℃ scope, and the time of carrying out is in the 20-60 scope of second.Insulating barrier is by the formed oxide of high-density plasma.
Describe in detail below in conjunction with preferred embodiment and accompanying drawing.
Description of drawings
Fig. 1 is the generalized section of traditional manufacturing fleet plough groove isolation structure.
Fig. 2-Fig. 8 is the generalized section of the formation method of fleet plough groove isolation structure of the present invention.
Embodiment
Consult Fig. 2-shown in Figure 8, the formation method of fleet plough groove isolation structure of the present invention comprises the steps.
At first, consult shown in Figure 2ly, a substrate 30 is provided, for example a silicon base is formed with mask layer 35 on substrate 100 surfaces, and mask layer 35 preferable thickness are 200-3500 , and it can be the stacked structure of single layer structure or most layers.As shown in Figure 2, mask layer 35 is preferably by the thicker silicon nitride layer 34 of one deck pad silicon oxide layer 32 and one deck and is formed.Wherein, the method that forms pad silicon oxide layer 32 can be thermal oxidation method, or forms with traditional normal pressure or Low Pressure Chemical Vapor Deposition (LPCVD) deposition.Silicon nitride layer 34 on pad silicon oxide layer 32 can utilize Low Pressure Chemical Vapor Deposition, is that the reaction raw materials deposition forms with dichlorosilane and ammonia.Then on mask layer 35 surfaces, form one deck photoresist layer 36.Afterwards, by the conventional lithography processing procedure, form an opening 37 in photoresist layer 36, this opening 37 is in order to the definition shallow channel isolation area.
Next, consult shown in Figure 3ly, the photoresist layer 36 by having opening 37 is as etching mask, carry out the anisotropic etching processing procedure, for example reactive ion etching (reactive ion etching, RIE), with opening 37 design transfer of photoresist layer 36 to mask layer 35.Then, with suitable etching solution or ashing treatment, remove after the photoresist layer 36, by mask layer 35 as etching mask, carry out the anisotropic etching processing procedure, reactive ion etching for example is etched to a desired depth with the substrate 30 with opening 38 belows of mask layer 35, and forms the groove 88 that the degree of depth is about 3000-6000 .
Next, consult Fig. 4-shown in Figure 5, carry out committed step of the present invention, consult shown in Figure 4ly, form one silica layer 40 in the surperficial compliance of groove 38, with as a lining silicon oxide layer, its thickness is in the scope of 150-250 dust.In the present embodiment, in order to make silicon oxide layer 40 spherings (rounder) of top corners 38a of groove 38, the mode that silicon oxide layer 40 forms, do not adopt the mode of utilizing batch formula boiler tube to carry out thermal oxidation traditionally, but form by the wet oxidation of single silicon wafer process (single wafer process).For example, (ThermalProcess Common Centura TPCC) carries out the wet oxidation of single silicon wafer process to the depositing device that can be provided by Ying Cai company.Wherein, be to utilize hydrogen and oxygen reacting gas as wet oxidation.The flow of hydrogen is in the scope of 10-16slm, and the flow of oxygen is in the scope of 5-8slm.Preferable hydrogen and oxygen flow then are respectively 12 and 6slm.Moreover the operating pressure of wet oxidation is in the scope of 7-12Torr, and preferable operating pressure is then in the scope of 9-10Torr.Moreover the one-tenth of silicon oxide layer 40 is for a long time about 60-70 between second.In addition, the employed growth temperature of TPCC (1000-1200 ℃) is higher than the growth temperature (800-900 ℃) of conventional high-temperature boiler tube.For example, in the present embodiment, preferable growth temperature is 1150 ℃.Simultaneously, TPCC has higher heating rate and growth speed, therefore can shorten the processing procedure time effectively.
Next, consult shown in Figure 5, at nitrogen (N 2) or nitrous oxide (N 2O) in the atmosphere, substrate 30 and silicon oxide layer 40 implemented (in-situ) annealing in process 41 when participating in the cintest.The time of carrying out is about the 20-60 scope of second.Herein, institute's substrate that refers to 30 when participating in the cintest is from forming silicon oxide layer 40 to carrying out annealing in process all at same reative cell, and do not have vacuum breaker.In the present embodiment, the temperature of annealing in process 41 is identical with above-mentioned growth temperature when participating in the cintest.That is annealing temperature is 1000-1200 ℃ scope, and preferable annealing temperature is 1150 ℃.
Herein, come personally after forming lining silicon oxide layer 40 purpose of annealing in process 41 has three:
The first, via from the silicon atom of substrate 30 and from the complete bond of the oxygen atom of silicon oxide layer 40, repair the rough interfaces between groove 38 surfaces and the silicon oxide layer 40, with the insulation characterisitic of reinforcing line silicon oxide layer 40; The second, be released in etched trench 38 and form during the lining silicon oxide layer 40, be formed at the top corners 38a of groove 38 and the stress of bottom corner 38b, when preventing element operation, concentrate at these local electric fields that produce; The 3rd, nitrogen-atoms is diffused to silicon oxide layer 40, and produce bond with wherein silicon atom and oxygen atom.This Si-O-N bond can be in follow-up processing procedure, and the alloy in barrier element district (not illustrating) diffuses into fleet plough groove isolation structure, and increases the reliability of element.
In addition, implement annealing in process 41, also can form a sealant 39 on lining silicon oxide layer 40, a silicon oxynitride (SiON) layer for example is to strengthen the diffusion barrier effect.
Next, consult shown in Figure 6ly, an insulating barrier 42 is the tops that are formed at mask layer 35, and inserts fully in the groove 38.For example, the material of aforesaid insulating barrier 42 can be mixes or unadulterated silica, the silica that mixes comprises phosphorosilicate glass (PSG), Pyrex (BSG), boron-phosphorosilicate glass (BPSG) or the like, and unadulterated silica comprises silica or the high-density plasma silica (HDPoxde) that is made of tetraethyl-metasilicate (TEOS).In the present embodiment, the material of employed insulating barrier 42 is the high-density plasma silica, and its deposition process is high density plasma CVD method (HDPCVD) method.Afterwards, carry out again cycle of annealing or Rapid Thermal processing procedure (rapid thermal process, RTP) so that insulating barrier 42 densifications.
Next, consult insulating barrier shown in Figure 7, that mask layer 35 tops are unnecessary 42 and remove, to form fleet plough groove isolation structure 42a.Its removal method can be utilized etch-back or chemical mechanical milling method (CMP)
At last, consult shown in Figure 8ly, mask layer 35 is divested.Wherein, the method that divests silicon nitride layer 34 is a wet etching, for example be with hot phosphoric acid (PO4) for etching solution soaks with its removal; The method that divests pad silicon oxide layer 32 is a wet etching, for example is to be that etching solution soaks with hydrofluoric acid (HF).
In addition, when removing pad silicon oxide layer 32, the fleet plough groove isolation structure 42a of part simultaneously can be etched, and form depression 43 at the top corners 38a place of fleet plough groove isolation structure 42a.Yet, as previously discussed, because the lining silicon oxide layer 40 at top corners 38a place sphering,, and avoid the generation of leakage current so sinking degree can be dropped to minimumly.
Compared to conventional art, lining silicon oxide layer of the present invention is to form by single silicon wafer process, therefore can increase the uniformity of lining silicon oxide layer on each special wafer.Moreover the method according to this invention because of can shortening the processing procedure time, and improves production capacity.In addition, in the method for the invention, impose the step of annealing in process when participating in the cintest, can improve the quality of lining silicon oxide layer, and then strengthen the insulation characterisitic of fleet plough groove isolation structure.
Though the present invention discloses as above with preferred embodiment, so it is not in order to limiting the present invention, anyly has the knack of this skill person, and without departing from the spirit and scope of the present invention, institute does to change and retouch, and all belongs within protection scope of the present invention.

Claims (9)

1, a kind of formation method of fleet plough groove isolation structure is characterized in that: which comprises at least the following step:
(1) provides a substrate, be coated with a mask layer on it;
(2) this mask layer of etching forming at least one opening, and exposes this substrate;
(3) substrate of this opening below of etching is to form a groove therein;
(4) in one both under the fixed temperature,, form one silica layer, with as a lining silicon oxide layer in this flute surfaces compliance by the wet oxidation of single silicon wafer process;
(5), this substrate and this silicon oxide layer are implemented an annealing in process when participating in the cintest in this both under the fixed temperature;
(6) on this mask layer, form an insulating barrier, and insert this groove;
(7) remove this insulating barrier of this mask layer top;
(8) remove this mask layer.
2, the formation method of fleet plough groove isolation structure according to claim 1 is characterized in that: the reacting gas of this wet oxidation is hydrogen and oxygen.
3, the formation method of fleet plough groove isolation structure according to claim 2 is characterized in that: the flow of this hydrogen is in the scope of 10-16slm, and the flow of this oxygen is in the scope of 5-8slm.
4, the formation method of fleet plough groove isolation structure according to claim 1, it is characterized in that: the thickness of this silicon oxide layer is in the scope of 150-250 dust.
5, the formation method of fleet plough groove isolation structure according to claim 1 is characterized in that: this both fixed temperature be 1100-1200 ℃ scope.
6, the formation method of fleet plough groove isolation structure according to claim 1 is characterized in that: annealing in process is to implement in any atmosphere of nitrogen or nitrous oxide when participating in the cintest.
7, the formation method of fleet plough groove isolation structure according to claim 1 is characterized in that: the time of annealing in process is in the 20-60 scope of second when participating in the cintest.
8, the formation method of fleet plough groove isolation structure according to claim 1 is characterized in that: this insulating barrier is by the formed oxide of high-density plasma.
9, the formation method of fleet plough groove isolation structure according to claim 1 is characterized in that: this insulating barrier of removing this mask layer top is to realize by cmp.
CN 02146139 2002-10-30 2002-10-30 Forming method of shallow groove spacing structure Expired - Lifetime CN1237603C (en)

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Publication number Priority date Publication date Assignee Title
US8163625B2 (en) * 2009-04-07 2012-04-24 Taiwan Semiconductor Manufacturing Company, Ltd. Method for fabricating an isolation structure
CN102122629B (en) * 2010-01-08 2013-06-19 中芯国际集成电路制造(上海)有限公司 Method for manufacturing lining oxide layer of shallow trench isolation (STI)
CN116525456A (en) * 2023-07-03 2023-08-01 粤芯半导体技术股份有限公司 MOSFET device manufacturing method based on TDDB optimization

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