CN1232287A - 半导体器件制造方法 - Google Patents

半导体器件制造方法 Download PDF

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CN1232287A
CN1232287A CN99105574A CN99105574A CN1232287A CN 1232287 A CN1232287 A CN 1232287A CN 99105574 A CN99105574 A CN 99105574A CN 99105574 A CN99105574 A CN 99105574A CN 1232287 A CN1232287 A CN 1232287A
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儿玉修一
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Abstract

在一种半导体器件制造方法中,在半导体基片上的金属布线层上形成钝化膜。在钝化膜的预定区域形成第一开口以达到金属布线层的表面。通过使用惰性气体在等离子体处理装置的处理室中溅蚀由硅氧化物制成的伪基片。在已进行溅蚀的等离子体处理装置的处理室中,通过使用惰性气体等离子体溅射清理暴露于第一开口底部的金属布线层的表面。

Description

半导体器件制造方法
本发明涉及一种使用有机薄膜制造半导体器件的方法。
在LSI(大规模集成电路)封装中，当沿其周围部分形成很多管脚时，管脚间距不可避免地要减少。如果端子被形成在封装的整个表面上，可不减少封装的尺寸而形成很多管脚。
作为一个在封装的整个表面上形成端子的实例，将采用倒装片压焊技术，通过该技术把一芯片连接到将安装其有源元件表面的基片上。通常，在芯片的有源元件的表面上形成焊料块。芯片被翻转并定位在将要安装的基片上。其后，焊料被熔化以便立即与芯片接合。
用于该倒装片压焊技术中的每个焊料块通过一在钝化膜中的开口被连接到一铝布线图案(布线层)，钝化膜作为形成在芯片的有源元件表面上的保护膜。因此，在形成焊料块时，一用于暴露布线图案的开口必须形成于在芯片的最上层形成的钝化膜上。为了形成开口，通常使用干蚀技术。由于诸如聚酰亚胺之类的树脂通常被用来形成钝化膜，在干蚀中，氧气主要被用作蚀刻气体。
作为用于该图案构成的掩膜图案也是由有机树脂制成的，当使用氧气进行干蚀时，形成抗蚀层的掩膜图案也同时受到蚀刻，由聚酰亚胺制成的钝化膜的开口构成部分也受到蚀刻。因此，在使用氧气干蚀时，有机物质分解并通过蚀刻升华重新混合以轻易沉积在各个部分。
即使在不使用氧气的干蚀中，例如，即使在使用碳化合物气体作为干蚀气体并使用有机薄膜作为掩膜图案时，掩膜图案或多或少受到蚀刻。结果，分解和升华的有机物质与蚀刻气体重新反应，产生的有机物质被沉积在各个部分。
当这样一种沉积物被沉积在暴露在开口底部的金属布线层的表面上时，可轻易形成一薄膜，从而导致金属布线层和形成在它上面的焊料块之间的接合失败。
为了解决这个问题，当在钝化膜中形成一开口以暴露下面的金属布线层时，诸如氩气之类的惰性等离子体辐射到(溅射清理)暴露的金属布线层部分，从而清除沉积在暴露的金属布线层处的材料。使用氩等离子体溅射清理的过程利用了溅射现象，也可以有效去除形成在金属布线层的暴露区域上的原始氧化物。
在使用氩等离子体进行溅射清理时，清理目标变成溅射目标，就出现了一个新的问题，形成目标的材料附着在等离子体处理室的内壁上。尤其是，当由有机物质制成的钝化膜或类似物被溅射时，由该有机物质组成的沉积物被沉积在处理室的内壁上。当这些沉积物变大时，它形成有机物质粉末，然后剥离并脱落而附着在处理目标上，降低了产品质量。由于这些有机物质粉末，可检测到直径0.2微米或更大的颗粒。例如，当有机物质粉末附着在将形成焊料块的金属布线层的表面上时，在金属布线层和焊料块之间的接合失败，并且焊料块的粘结强度降低。
本发明的一个目的是提供一种半导体器件的制造方法，其中抑制了在溅射清理中在处理装置中的粉末的产生。
为了达到上述目的，按照本发明，所提供的半导体器件制造方法包括如下步骤：在基片上的金属布线层上形成一有机绝缘膜；在有机绝缘膜的预定区域中形成第一开口以达到金属布线层的表面；通过使用惰性气体等离子体在等离子体处理装置中的处理室中溅蚀由硅氧化物制成的伪基片(dummy substrate)；以及通过使用惰性等离子体在进行蚀刻的等离子体处理装置的处理室中溅射清理暴露在第一开口的底部的金属布线层的表面。
图1A-1H示出按照本发明一实施例的制造半导体器件的步骤。
下面将参照附图详细描述本发明。
图1A-1H示出按照本发明一实施例的制造半导体器件的步骤。如图1A所示，一由硅氧化物制成的中间层绝缘膜101被形成在一半导体基片100上，半导体基片100上形成诸如晶体管之类的元件以及用于连接这些元件的多层互连结构。在图1A中，在半导体基片100上形成的元件及形成多层互连结构的多层互连没有被说明。
由铝制成的最上面的金属布线层102被形成在中间层绝缘薄膜101上。形成由硅氧化物制成的覆盖膜103以覆盖金属布线层102，其后在覆盖膜103上形成由聚酰亚胺制成的作为保护膜的钝化膜104。
用此方式制造大规模集成电路芯片，如图1B所示，具有一开口105a的抗蚀图案105形成于金属布线层102上的钝化膜104上，并且通过使用抗蚀图案105作为掩膜可选择蚀刻钝化膜104。根据已知的光刻法可形成抗蚀图案105。由于此种蚀刻目的在于蚀刻作为有机物质的聚酰亚胺，可通过使用氧气作为蚀刻气体的离子反应蚀刻进行。结果，在金属布线层102上面的钝化膜104的预定区域中形成一开口106。
当光敏聚酰亚胺被作为钝化膜104的材料使用时，通过光刻法作出图案形成开口106。此时，光敏聚酰亚胺被施加到覆盖膜103，然后，生成物结构被加热以去除溶剂，进行预定图案的曝光和显影以形成开口106。于是，生成物结构被加热使得开口形成处的聚酰亚胺薄膜热固。
去除抗蚀图案105，生成物结构被加热使得钝化膜104软化，以便在开口106的侧表面上形成中度倾斜表面，如图1C所示。
如图1D所示，通过使用形成有开口106的钝化膜104作为掩膜选择蚀刻覆盖膜103，以形成达到金属布线层102的开口107。通过使用四氟化碳(CF4)作为蚀刻气体的离子反应蚀刻进行该蚀刻。
如图1E所示，通过溅射，由钛和钨组成的钨化钛(TiW)被沉积在暴露于开口106的底部的金属布线层102的表面上、开口106的侧表面上、开口107的侧表面上、以及钝化膜104的表面上以形成钨化钛膜。
此时，当半导体基片100被阳极连接时，在膜构成前，通过溅射立即进行使用氩气(惰性气体)等离子体的溅射清理。当完成溅射清理时，形成钨化钛膜108且不把半导体基片100暴露在空气中。
在该溅射清理中，半导体基片100被放置在等离子体处理装置的处理装置中，暴露在开口107的底部的金属布线层102的表面被暴露在氩气等离子体中。在这种状态下，氩气离子冲击并去除沉积在暴露于开口107的底部的金属布线层102表面的有机膜以及形成的自然氧化物。
在溅射清理半导体基片100之前，用同样的等离子体处理装置进行溅射清理由硅氧化物制成的伪基片的预处理。换句话说，伪基片被溅射清理，其后暴露在开口107的底表面的金属布线层102的表面受到溅射清理。
在溅射清理由硅氧化物制成的伪基片中，伪基片，即硅氧化物被溅蚀。溅蚀掉的硅氧化物被沉积在等离子体处理室的内壁上或其它结构的表面上以在它们的表面上形成一硅氧化物膜。
在使用伪基片的预处理中，氩气的流率被设定为30sccm，所采用的RF(整流器)功率被设定为300W，并且在处理室中的温度被设定为2mTorr(毫乇)。硅氧化物的蚀刻数量被设定为在伪基片的薄膜厚度数量中约10纳米到50纳米。
当以此方式形成硅氧化物膜时，附着在等离子体处理室的内壁或其它结构的表面的外来物质被覆盖硅氧化物膜。结果，在接着对暴露在开口107的底部的金属布线层102的表面进行的溅射清理中，可防止剥离附着在等离子体处理室的内壁或其它结构的表面的外来物质。换而言之，当溅射清理暴露在开口107的底部的金属布线层102的表面时，在等离子体处理室中不产生外来物质。结果，可防止外来物质附着在已溅射清理过的金属布线层102的表面上。
进行如上所述的预处理和溅射清理后，形成钨化钛膜。接着，通过溅射铜(Cu)被沉积以在钨化钛膜108上形成铜膜109，如图1F所示。可用电镀代替溅射形成铜膜109。
如图1G所示，抗蚀图案110被形成以覆盖开口107及其周围区域。通过使用抗蚀图案110作为掩膜选择蚀刻铜膜109和钨化钛膜108。
去除抗蚀图案110。其后，如图1H所示，在铜膜109上形成用于倒装片压焊中焊料块111。
不必对作为产品的每个基片进行如上所述的预处理。表1示出了通过溅射清理所处理过的目标基片的数目、当进行预处理时在基片上检测出的粉末颗粒的数目和当不进行预处理时在基片上检测出的粉末颗粒的数目之间的关系。
表1
已处理的基片的数目 0 50 100 150 200
未经预处理的粉末颗粒的数目 8 50 2000 5150 5400
经预处理的粉末颗粒的数目 8 15 19 17 19
在表1中，“经预处理的粉末颗粒的数目”是当对每50个基片进行预处理时检测出的粉末颗粒的数目。从表1中可明显看出，未经预处理，当通过溅射清理处理的基片的数目约为100时，粉末急剧增加。因此，可对每100个基片作为最小值进行预处理。从表1中也可看出，当进行预处理时，可极大抑制粉末的产生。
在上述实施例中，聚酰亚胺被用来形成钝化膜。然而，本发明并不仅限于此。本发明可使用其它的有机膜来制造半导体器件，例如，诸如氟化聚芳醚或氟化聚酰亚胺之类的氟塑料或氟化塑料，在钝化膜中形成的包括开口的图案也可由这些材料制成。
如上所述，按照本发明，在溅射清理暴露在开口底部的金属布线层的步骤之前，伪基片被蚀刻，以便在等离子体处理装置的内壁上或结构厚度表面上形成薄硅氧化物膜。因此，附着在等离子体处理装置的内壁或结构的表面的外来物质被薄硅氧化物膜覆盖。结果，附着在等离子体处理装置的内壁或类似物的外来物质可被防止剥离并附着在基片上。

Claims (7)

1、一种半导体器件制造方法，其特征在于，它包括如下步骤：
在基片(100)上的金属布线层(102)上形成一有机绝缘膜(104)；
在有机绝缘膜的预定区域中形成第一开口(106)以达到金属布线层的表面；
通过使用惰性气体等离子体在等离子体处理装置中的处理室中溅蚀由硅氧化物制成的伪基片；以及
通过使用惰性等离子体在进行蚀刻的所述等离子体处理装置的所述处理室中溅射清理暴露在第一开口的底部的金属布线层的表面。
2．按照权利要求1所述的方法，其特征在于：
所述方法还包括在有机绝缘膜和包括金属布线层的基片的表面之间形成一无机绝缘膜(103)的步骤，以及
形成第一开口的步骤包括通过使用形成有第一开口的有机绝缘膜作为掩膜选择蚀刻无机绝缘膜，从而形成达到金属布线层表面的第二开口(107)。
3．按照权利要求1所述的方法，其特征在于，还包括步骤：
溅射清理后，在暴露的金属布线层的表面上、第一开口的侧壁以及在围绕第一开口且不暴露于空气中的有机绝缘膜上形成一由钛和钨制成的钨化钛膜(108)；
在钨化钛膜上形成铜膜(109)；以及
在铜膜上形成焊料块(111)。
4、按照权利要求1所述的方法，其特征在于，有机绝缘膜由聚酰亚胺制成，并且惰性气体为氩气。
5、按照权利要求4所述的方法，其特征在于，在所述等离子体处理装置的所述等离子体室中采用的氩气的流率、RF功率及真空度分别被设定为30sccm、300W及2mTorr。
6、按照权利要求1所述的方法，其特征在于，作为伪基片材料的硅氧化物被蚀刻掉的量相应为在伪基片的厚度中的10纳米到50纳米。
7、按照权利要求1所述的方法，其特征在于，每当预定数目的基片被处理时，伪基片被溅蚀。
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