CN1231844C - 控制对sdram的连续访问的电路 - Google Patents

控制对sdram的连续访问的电路 Download PDF

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Publication number
CN1231844C
CN1231844C CN03123280.9A CN03123280A CN1231844C CN 1231844 C CN1231844 C CN 1231844C CN 03123280 A CN03123280 A CN 03123280A CN 1231844 C CN1231844 C CN 1231844C
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CN
China
Prior art keywords
dma
signal
requires
triggering
sdram
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN03123280.9A
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English (en)
Chinese (zh)
Other versions
CN1462946A (zh
Inventor
黑沼明
田中壮平
绵谷雅文
中山亨
胜拓二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
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Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Publication of CN1462946A publication Critical patent/CN1462946A/zh
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Publication of CN1231844C publication Critical patent/CN1231844C/zh
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Dram (AREA)
  • Memory System (AREA)
CN03123280.9A 2002-04-25 2003-04-25 控制对sdram的连续访问的电路 Expired - Fee Related CN1231844C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2002123811A JP4054598B2 (ja) 2002-04-25 2002-04-25 メモリ制御回路、ｄｍａ要求ブロック及びメモリアクセスシステム
JP123811/2002 2002-04-25

Publications (2)

Publication Number Publication Date
CN1462946A CN1462946A (zh) 2003-12-24
CN1231844C true CN1231844C (zh) 2005-12-14

Family

ID=29243698

Family Applications (1)

Application Number Title Priority Date Filing Date
CN03123280.9A Expired - Fee Related CN1231844C (zh) 2002-04-25 2003-04-25 控制对sdram的连续访问的电路

Country Status (3)

Country Link
US (1) US6859848B2 (https=)
JP (1) JP4054598B2 (https=)
CN (1) CN1231844C (https=)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7107365B1 (en) * 2002-06-25 2006-09-12 Cypress Semiconductor Corp. Early detection and grant, an arbitration scheme for single transfers on AMBA advanced high-performance bus
US7899957B1 (en) * 2003-12-30 2011-03-01 Altera Corporation Memory controller having a buffer for providing beginning and end data
WO2008084017A1 (fr) * 2007-01-05 2008-07-17 Proton World International N.V. Limitation d'acces a une ressource d'un circuit electronique
JP5064336B2 (ja) * 2008-09-12 2012-10-31 株式会社リコー 画像形成システムおよびプログラム
KR101989860B1 (ko) 2012-12-21 2019-06-17 에스케이하이닉스 주식회사 메모리 컨트롤러 및 이를 포함하는 메모리 시스템
JP6210018B2 (ja) * 2014-04-25 2017-10-11 株式会社オートネットワーク技術研究所 スイッチのオン／オフ制御方法及びスイッチ回路
JP6316143B2 (ja) * 2014-08-22 2018-04-25 ルネサスエレクトロニクス株式会社 半導体装置、メモリアクセス制御方法、及び半導体装置システム
KR102850055B1 (ko) * 2021-07-23 2025-08-25 삼성전자주식회사 Dma를 이용한 데이터 처리 장치 및 방법

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10133998A (ja) 1996-11-05 1998-05-22 Canon Inc データ処理方法とその方法を用いた記録装置
US6366989B1 (en) * 1998-09-17 2002-04-02 Sun Microsystems, Inc. Programmable memory controller
JP3976927B2 (ja) 1999-01-25 2007-09-19 キヤノン株式会社 バス制御装置
US6622203B2 (en) * 2001-05-29 2003-09-16 Agilent Technologies, Inc. Embedded memory access method and system for application specific integrated circuits

Also Published As

Publication number Publication date
US20030204651A1 (en) 2003-10-30
US6859848B2 (en) 2005-02-22
JP2003316642A (ja) 2003-11-07
CN1462946A (zh) 2003-12-24
JP4054598B2 (ja) 2008-02-27

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CF01 Termination of patent right due to non-payment of annual fee