CN1203542C - 功率半导体器件 - Google Patents

功率半导体器件 Download PDF

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Publication number
CN1203542C
CN1203542C CNB011232439A CN01123243A CN1203542C CN 1203542 C CN1203542 C CN 1203542C CN B011232439 A CNB011232439 A CN B011232439A CN 01123243 A CN01123243 A CN 01123243A CN 1203542 C CN1203542 C CN 1203542C
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China
Prior art keywords
thickness
solder layer
substrate
power semiconductor
alloy
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Expired - Lifetime
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CNB011232439A
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CN1354510A (zh
Inventor
西堀弘
深田雅一
吉田贵信
吉松直树
高尾治雄
木本信义
上贝康己
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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    • H—ELECTRICITY
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • H05K3/0061—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink
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    • C04B37/00—Joining burned ceramic articles with other burned ceramic articles or other articles by heating
    • C04B37/02—Joining burned ceramic articles with other burned ceramic articles or other articles by heating with metallic articles
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    • H01L23/043—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
    • H01L23/049—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads being perpendicular to the base
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  • Engineering & Computer Science (AREA)
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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Materials Engineering (AREA)
  • Power Engineering (AREA)
  • Organic Chemistry (AREA)
  • Structural Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

在Cu合金形成的金属基板1上，装载半导体元件衬底2。半导体元件衬底2配有例如陶瓷形成的绝缘衬底3，而且在其上面和下面配有均为Al合金制的电路图形4和下面图形5。下面图形5被配置在整个绝缘衬底3上，通过图形层8被连接在金属基板1上。将金属基板1和绝缘衬底3的厚度例如分别设定为3.5～5.5mm和0.5～1mm，将电路图形4的厚度设定为0.4～0.6mm，将下面图形5和图形层8C的厚度分别设定为0.2mm以下和100～300μm。

Description

功率半导体器件
                       发明领域
本发明涉及功率半导体器件，特别涉及采用具有形成电路图形的上表面和形成下面图形的下表面的绝缘衬底、将下面图形用连接材料连接在金属基板上的功率半导体器件。
                       背景技术
功率半导体器件的下面图形以往担当着吸热层的功能，通过将其连接在金属基板上来进行散热。在下面形成图形并在其相反侧的上面形成电路图形的绝缘衬底例如使用陶瓷来形成。
作为电路图形和下面图形的材质，以往使用Cu(铜)合金(包含Cu本身，以下在本说明书中相同)、或Al(铝)合金(包含Al本身，以下在本说明书中相同)。在后者的情况下，电路图形的厚度和下面图形的厚度相同，例如被设定为0.4mm或0.5mm。另外，在绝缘衬底下将下面图形和金属基板进行连接的焊料层的厚度被任意地设定。
作为电路图形和下面图形的材质，在使用Cu合金的情况下，因温度循环而在绝缘衬底或焊料层中容易很快发生裂纹。为了避免出现它，作为金属基板的材质，采用Al/SiC或Ci/Mo材料。由于这些材料与Cu相比膨胀系数与作为绝缘衬底材料的陶瓷的膨胀系数相近，所以可提高功率半导体器件的可靠性。但是，与Cu合金相比，存在价格高的问题。
另一方面，作为电路图形和下面图形的材质，在使用Al合金的情况下，可以提高陶瓷性的绝缘衬底的耐循环性。但是，在消除焊料层的较快裂纹之前希望不大。因此，作为金属基板的材质，仍然采用Al/SiC或Cu/Mo材料。
特别是在下面图形使用0.4～0.5mm厚度的Al合金情况下，与使用Cu合金的情况相比，电阻增大。电阻的增大招致作为功率半导体器件整体的热阻的增大，使绝缘衬底上装载的半导体元件的散热性恶化。
而且，由于焊料层的厚度被任意地设定，所以焊料层的厚度不均匀地形成。因此，在下面图形和金属基板的连接中绝缘衬底倾斜，热阻增大，存在失去作为目标的热阻和焊料层的抗裂纹性能的平衡的问题。而且，还存在依赖于温度循环的焊料层的裂纹因焊料层变薄而从角部容易较快产生的问题。该裂纹容易导致热阻增大或容易破坏功率半导体器件。
                       发明概述
本发明是用于解决上述问题的发明，目的在于提供功率半导体器件，作为电路图形和下面图形的材质，采用Al合金来抑制成本，并且降低热阻，提高焊料层的热循环性的耐性。
本发明中方案1的发明是功率半导体器件，包括：厚度为0.5～1mm的陶瓷衬底；在所述陶瓷衬底的上表面中用铝合金形成的、装载功率半导体元件的0.4～0.6mm厚度的电路图形；在与所述陶瓷衬底的所述上表面相反侧的下表面上用厚度0.2mm以下的所述铝合金来配置在整个面上的下面图形；由厚度3.5～5.5mm的铜合金形成的、与所述下面图形对置的金属基板；以及夹入在所述下面图形的整个面和所述金属基板之间来对两者进行连接的厚度100～300μm的焊料层。
本发明中方案2的发明是功率半导体器件，包括：厚度为0.5～1mm的陶瓷衬底；在所述陶瓷衬底的上表面中用铝合金形成的、装载功率半导体元件的0.4～0.6mm厚度的电路图形；在与所述陶瓷衬底的所述上表面相反侧的下表面上用厚度0.1mm以下的金属化层来配置在整个面上的下面图形；由厚度3.5～5.5mm的铜合金形成的、与所述下面图形对置的金属基板；以及夹入在所述下面图形的整个面和所述金属基板之间来对两者进行连接的厚度50～400μm的焊料层。
本发明中方案3的发明是方案1或方案2所述的功率半导体器件，其中，还配有在所述下面图形上配置的引线凸点。
                    附图的简单说明
图1是例示可应用本发明的功率半导体器件的剖面图。
图2是表示半导体元件2附近的结构要素的厚度的剖面图。
图3是说明本发明结构的曲线图。
                   优选实施例描述
图1是例示以下实施例中共同采用的功率半导体器件的结构剖面图。
在Cu合金形成的金属基板1上装载半导体元件衬底2。详细地说，半导体元件衬底2包括例如氮化铝(AlN)、氧化铝(Al2O3)等陶瓷形成的绝缘衬底3，而且在其上面和下面还包括分别用钎料等进行连接的电路图形4和下面图形5。电路图形4和下面图形5都由Al合金来形成。金属基板1的厚度例如被设定为3.5～5.5mm，绝缘衬底3的厚度例如被设定为0.5～1mm，而电路图形4的厚度被设定为0.4～0.6mm。将下面图形5配置在绝缘衬底3的整个面上。
电路图形4中功率MOS晶体管等第1半导体元件6和续流二极管等第2半导体元件7分别通过焊料层8A、8B来装载。另一方面，下面图形5通过焊料层8C被连接在金属基板1上。金属基板1具有作为半导体元件衬底2的吸热层的功能。
在金属基板1上，一边围住半导体元件衬底2一边装载外壳10，在外壳10中面对半导体元件衬底2的一侧上装载盖12。将主电路端子11保持在外壳10中，通过内部连接用铝引线13电连接第1和第2半导体元件6、7。
图2是表示半导体元件衬底2附近的构成要素的厚度的剖面图。在本发明中，厚度t2、t3分别表示下面图形5和焊料层8C的厚度。
实施例1
图3是说明本发明的结构的曲线图，线组L1表示因热循环在焊料层8C上产生的变形ε(无名数)与焊料层8C的厚度t3的相关性，线组L2表示热阻Rth(℃/W)与焊料层8C的厚度t3的相关性。
作为热循环的条件，为-40～125℃，其次数在要求高度可靠性的电气铁路和汽车用的功率模块中以1000～1500次循环为目标。
在线组L1中线L11、L12、L13、L14分别表示下面图形5的厚度t2为0.1mm、0.2mm、0.3mm、0.4mm的情况，在线组L2中线L21、L22、L23、L24分别表示下面图形5的厚度t2为0.1mm、0.2mm、0.3mm、0.4mm的情况。对于陶瓷形成的绝缘衬底3以Al箔作为下面图形5进行连接的情况下，下限大致可为0.1mm。在金属基板1、绝缘衬底3、电路图形4的上述厚度范围内，根据它们的厚度，线L11、L12、L13、L14、L21、L22、L23、L24几乎不变动。为了比较，在电路图形4和下面图形5使用Cu合金的情况下，具体地说，以线L19、L29(分别属于线组L1、L2)来表示按0.3mm形成前者、按0.15mm形成后者的情况。
焊料层8C的厚度t3越厚，并且下面图形5的厚度t2越薄，在焊料层8C上产生的变形ε越小。与电路图形4和下面图形5使用Cu合金的情况(线L19)相比，获得小的变形ε，在使用Al合金的情况下，期望其厚度t2为0.1mm(线L11)。但是，为了使焊料层8C上产生的变形ε比允许值ε0小，在下面图形5的厚度t2为0.1mm的情况下，焊料层8C的厚度t3需要在100μm以上。
焊料层8C的厚度t3越薄，并且下面图形5的厚度t2越薄，热阻Rth越小。与电路图形4和下面图形5使用Cu合金的情况(线L19)相比，不能获得小的热阻，而在使用Al合金的情况下，期望其厚度t2为0.1mm(线L21)。但是，为了使热阻Rth比允许值Rth0小，即使在下面图形5的厚度t2为0.1mm(线L21)的情况下，也期望将焊料层8C的厚度t3设定在100μm以下。另一方面，即使在下面图形5的厚度t2为0.2mm(线L12)的情况下，只要焊料层8C的厚度t3为300μm，焊料层8C上产生的变形ε仍比允许值ε0小。
由以上可知，在将电路图形4和下面图形5均用Al合金来形成的情况下，例如在金属基板1、绝缘衬底3、电路图形4的上述厚度范围中，在下面图形5的厚度t2在0.2mm以下的情况下，如果将焊料层8C的厚度t3设定在100～300μm的范围内，则可以最佳地抑制变形ε和热阻Rth，可以提供散热性和热循环良好的功率半导体器件。而且，金属基板1不必一定采用高价的Al/SiC或Cu/Mo材料，可以采用低价的Cu合金。
不用说，与电路图形4和下面图形5中使用Cu合金的情况相比，使用Al合金时的优点可以象以往那样。即，由于弹性系数小，所以可以获得对绝缘衬底3施加的应力小的优点，以及在用焊料层8A、8B将第1和第2半导体元件6、7连接装载到电路图形4时不易附着焊料飞沫的优点。
实施例2
线组L1中的线L10、线组L2中的线L20均表示采用金属化层作为下面图形5的情况。在金属基板1、绝缘衬底3、电路图形4的上述厚度范围内，依据它们的厚度，线L10、L20几乎不变动。该金属化层可以用公知的金属化技术、例如热喷镀或镀敷来形成，其膜厚被设定为0.005～0.1mm，期望设定为0.020mm以下。作为金属化层的材料，可以采用Mo-Mn(钼-锰)、W(钨)。或者使用电路图形4和绝缘衬底3之间设置的钎料、例如Al系材料也可以。无论怎样，为了提高金属化层的表面、即与金属基板1的连接侧与焊料层8C的粘结性、浸润性，期望实施镀镍。
这样，通过采用金属化层作为下面图形5，可以使其膜厚非常薄，所以焊料层8C的厚度t3的选择范围扩宽。具体地说，例如在金属基板1、绝缘衬底3、电路图形4的上述厚度范围中，只要焊料层8C的厚度t3在50μm以上，则焊料层8C中产生变形ε可以比允许值ε0小，只要焊料层8C的厚度t3在400μm以上，则热阻Rth可以比允许值Rth0小。就是说，可以将焊料层8C的厚度t3设定在50～400μm之间。
由以上可知，根据本实施例，可以使焊料层8C的厚度薄，结果是散热性、生产率良好，可以提供低价格的功率半导体器件。
实施例3
如图1或图2所示，在下面图形5和金属基板1之间，在与焊料层8C保持接触的情况下，例如夹入Al制的引线凸点9，具有使金属基板1和半导体元件衬底2的间隔均匀的功能。
由此，在下面图形5和金属基板1的连接中，可以避免绝缘衬底3倾斜。而且，可以确保下面图形5和金属基板1的间隔，容易使焊料层8C的厚度均匀，因而容易使其变薄。因此，生产率高，在成本降低上非常有效。
引线凸点9的直径考虑到散热性和可靠性为50～400μm左右就可以，因此，对于上述两个实施例来说，当然也适用。
根据本发明中方案1的发明，可以提供散热性和热循环良好的功率半导体器件。
根据本发明中方案2的发明，由于在下面图形中采用金属化层，所以不仅可以使其厚度薄，还可以使焊料层的厚度薄，其结果是可以提供散热性、生产率良好、价格低的功率半导体器件。
根据本发明中方案3的发明，在下面图形和金属基板的连接中可以避免陶瓷衬底倾斜。可以确保下面图形和金属基板的间隔，容易使焊料层的厚度均匀，因而容易使其薄型化。因此，生产率高，在成本降低上十分有效。

Claims (3)

1.一种功率半导体器件，包括：
厚度为0.5～1mm的陶瓷衬底；
功率半导体元件；
在所述陶瓷衬底的上表面中用铝合金形成的、装载所述功率半导体元件的0.4～0.6mm厚度的电路图形；
在与所述陶瓷衬底的所述上表面相反侧的下表面上用铝合金配置在整个面上的下面图形；
由厚度3.5～5.5mm的铜合金形成的、与所述下面图形对置的金属基板；以及
夹在所述下面图形的整个面和所述金属基板之间来对两者进行连接的焊料层，其特征在于
所述下面图形的厚度在0.2mm以下，且
所述焊料层的厚度为100～300μm。
2.一种功率半导体器件，包括：
厚度为0.5～1mm的陶瓷衬底；
功率半导体元件；
在所述陶瓷衬底的上表面中用铝合金形成的、装载所述功率半导体元件的0.4～0.6mm厚度的电路图形；
在与所述陶瓷衬底的所述上表面相反侧的下表面上用铝合金配置在整个面上的下面图形；
由厚度3.5～5.5mm的铜合金形成的、与所述下面图形对置的金属基板；以及
夹在所述下面图形的整个面和所述金属基板之间来对两者进行连接的焊料层，其特征在于
所述下面图形的厚度在0.1mm以下，且
所述焊料层的厚度为50～400μm。
3.如权利要求1或2所述的功率半导体器件，其中，还具有在所述下面图形上配置的引线凸点。
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