CN118138027A - Compatible driving circuit and device of silicon carbide MOS tube - Google Patents

Compatible driving circuit and device of silicon carbide MOS tube Download PDF

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Publication number
CN118138027A
CN118138027A CN202311369619.5A CN202311369619A CN118138027A CN 118138027 A CN118138027 A CN 118138027A CN 202311369619 A CN202311369619 A CN 202311369619A CN 118138027 A CN118138027 A CN 118138027A
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China
Prior art keywords
resistor
voltage
output
square wave
unit
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CN202311369619.5A
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Inventor
万志群
刘超群
巫广明
张玉喜
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Shenzhen Skonda Electronic Co ltd
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Shenzhen Skonda Electronic Co ltd
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Priority to CN202311369619.5A priority Critical patent/CN118138027A/en
Publication of CN118138027A publication Critical patent/CN118138027A/en
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K7/00—Modulating pulses with a continuously-variable modulating signal
    • H03K7/08—Duration or width modulation ; Duty cycle modulation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0081—Power supply means, e.g. to the switch driver

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Abstract

The application relates to the technical field of MOS tube driving, in particular to a compatible driving circuit and equipment of a silicon carbide MOS tube, wherein the circuit comprises a square wave generating module, an isolation boosting module, a rectifying module, a voltage regulating output module and an isolation voltage regulating module, wherein the square wave generating module is used for acquiring PWM signals sent by an external singlechip and converting the square wave signals into power square wave signals, the isolation boosting module is used for boosting the power square wave signals into high-voltage square wave signals, the rectifying module is used for rectifying the high-voltage square wave signals into high-voltage direct current signals, the voltage regulating output module is used for regulating the high-voltage direct current signals into first driving voltages and outputting the first driving voltages to a load, the isolation voltage regulating module is used for acquiring the voltage regulating signals sent by the singlechip and regulating the first driving voltages into second driving voltages according to the voltage regulating signals, and the compatible driving voltages are conveniently supplied for different types of silicon carbide MOS tubes.

Description

Compatible driving circuit and device of silicon carbide MOS tube
Technical Field
The application relates to the technical field of MOS tube driving, in particular to a compatible driving circuit and device of a silicon carbide MOS tube.
Background
Compared with the traditional silicon MOS tube, the silicon carbide MOS tube has the advantages of greatly reduced on-resistance and switching loss and is suitable for higher working frequency, and because the production technical schemes of all factories are different, the driving voltages of the silicon carbide MOS tubes produced by all factories are also different, the driving voltages of the main factories are mainly concentrated at "-3V to +15V" and "-4V to 18V", in order to adapt to the silicon carbide MOS tubes of different types, the two methods generally need to change the layout of BOM (Bill of materials) or PCB (Printed Circuit Board ) by changing the transformation ratio of a driving transformer or adjusting an output sampling loop to adjust the output voltage, so that the operation of changing the silicon carbide MOS tubes of different types is more complicated.
Therefore, how to conveniently supply the adaptive driving voltage for the silicon carbide MOS tubes of different types is a technical problem to be solved.
Disclosure of Invention
The application aims to conveniently supply the adaptive driving voltage for different types of silicon carbide MOS tubes.
The technical aim of the application is realized by the following technical scheme:
A compatible driving circuit of a silicon carbide MOS tube comprises a square wave generating module, an isolation boosting module, a rectifying module, a voltage regulating output module and an isolation voltage regulating module;
The square wave generation module is used for acquiring PWM signals sent by an external singlechip and converting the PWM signals into power square wave signals, and comprises an input end and an output end, wherein the input end of the square wave generation module is connected with the singlechip, and the output end of the square wave generation module is used for outputting and converting the power square wave signals;
The isolation boosting module is used for boosting the power square wave signal into a high-voltage square wave signal, the rectifying module is used for rectifying the high-voltage square wave signal into a high-voltage direct current signal, and the rectifying module comprises a first rectifying unit and a second rectifying unit;
the first rectifying unit and the second rectifying unit comprise an input end and an output end;
the isolation boosting module comprises an input end and two output ends, wherein the input end of the isolation boosting module is connected with the output end of the square wave generating module, the first output end of the isolation boosting module is connected with the input end of the first rectifying unit, and the second output end of the isolation boosting module is connected with the input end of the second rectifying unit;
the voltage regulating output module is used for regulating the high-voltage direct-current signal into a first driving voltage suitable for a first silicon carbide MOS tube and outputting the first driving voltage to the first silicon carbide MOS tube, and the first silicon carbide MOS tube comprises a first MOS upper tube and a first MOS lower tube;
the pressure regulating output module comprises an upper pipe output unit and a lower pipe output unit, wherein the upper pipe output unit and the lower pipe output unit comprise an input end, an output end and a pressure regulating end;
The input end of the upper pipe output unit is connected with the output end of the first rectifying unit and is used for receiving the high-voltage direct current signal output by the first rectifying unit, and the output end of the upper pipe output unit is used for adjusting the high-voltage direct current signal into the applicable direct current signal of the first MOS upper pipe and outputting the applicable direct current signal to the upper pipe;
The input end of the lower pipe output unit is connected with the output end of the second rectifying unit and is used for receiving the high-voltage direct current signal output by the second rectifying unit, and the output end of the lower pipe output unit is used for adjusting the high-voltage direct current signal into a direct current signal applicable to the first MOS lower pipe and outputting the direct current signal to the lower pipe;
The isolation voltage regulating module is used for acquiring a voltage regulating signal sent by the singlechip, regulating the first driving voltage into a second driving voltage according to the voltage regulating signal, and outputting the second driving voltage to a second silicon carbide MOS tube through the voltage regulating output module, wherein the second silicon carbide MOS tube comprises a second MOS upper tube and a second MOS lower tube;
the isolation voltage regulating module comprises a first voltage regulating unit and a second voltage regulating unit, wherein the first voltage regulating unit and the second voltage regulating unit comprise an input end and an output end;
the first voltage regulating unit is used for regulating the applicable direct current signal of the first MOS upper tube to the applicable direct current signal of the second MOS upper tube, the input end of the first voltage regulating unit is used for acquiring the voltage regulating signal, and the output end of the first voltage regulating unit is connected with the voltage regulating end of the upper tube output unit;
The second voltage regulating unit is used for regulating the applicable direct current signal of the first MOS lower tube into the applicable direct current signal of the second MOS lower tube, the input end of the second voltage regulating unit is used for acquiring the voltage regulating signal, and the output end of the second voltage regulating unit is connected with the voltage regulating end of the lower tube output unit.
By adopting the technical scheme, when the singlechip does not send a voltage regulation signal, the first output unit outputs a first driving voltage to the upper tube of the silicon carbide MOS, and the second output unit outputs the first driving voltage to the lower tube of the silicon carbide MOS; when the singlechip sends a voltage regulating signal, the first output unit can output a second driving voltage to the upper tube of the silicon carbide MOS, and the second output unit can output the second driving voltage to the lower tube of the silicon carbide MOS, so that the driving voltage required by the silicon carbide MOS tubes of two different types is conveniently adapted.
Optionally, the square wave generating module comprises a first resistor, a second resistor and a power square wave generator;
The power square wave generator comprises a first square wave receiving end, a second square wave receiving end, a first power square wave output end and a second power square wave output end;
One end of the first resistor is connected with the singlechip, the other end of the first resistor is connected with the first square wave receiving end, and the first power square wave output end is connected with the input end of the isolation step-up transformer;
one end of the second resistor is connected with the singlechip, the other end of the second resistor is connected with the second square wave receiving end, and the second power square wave output end is connected with the input end of the isolation boosting module.
By adopting the technical scheme, PWM signals sent by the singlechip are converted into power square wave signals with specific power, and the power square wave signals can be matched with the output power of the isolation boosting module.
Optionally, the square wave generating module further comprises a first capacitor and a second capacitor;
One end of the first capacitor is connected with the connection part of the first resistor and the first square wave receiving end, and the other end of the first capacitor is grounded; one end of the second capacitor is connected with the connection part of the second resistor and the second square wave receiving end, and the other end of the second capacitor is grounded.
By adopting the technical scheme, the interference signals are grounded and filtered, so that the signal interference is eliminated, and the stability of the signals is improved.
Optionally, the isolation boosting module comprises a transformer, and the transformer comprises a primary winding, a first secondary winding and a second secondary winding;
one end of the primary winding is connected with the first power square wave output end, and the other end of the primary winding is connected with the second power square wave output end; one end of the first secondary winding is connected with the output end of the first rectifying unit, and the other end of the first secondary winding is connected with the input end of the first rectifying unit;
One end of the second secondary winding is connected with the output end of the second rectifying unit, and the other end of the second secondary winding is connected with the input end of the second rectifying unit.
By adopting the technical scheme, the power square wave signal is boosted into the high-voltage square wave signal through the transformer, so that the signal transmission is facilitated.
Optionally, the isolated boost module further comprises a third capacitor; the third capacitor is connected in series between the first power square wave output end and one end of the primary winding.
By adopting the technical scheme, the capacitor can inhibit high-frequency signals, reduce signal interference and keep stable transmission of signals.
Optionally, the first rectifying unit includes a first diode, a second diode, a third diode and a fourth diode, and the second rectifying unit includes a fifth diode, a sixth diode, a seventh diode and an eighth diode;
The positive electrode of the first diode is connected with one end of the first secondary winding and the negative electrode of the second diode, the negative electrode of the first diode is connected with the input end of the upper tube output unit, and the positive electrode of the second diode is connected with the first negative voltage output end; the positive electrode of the third diode is connected with the other end of the first secondary winding and the negative electrode of the fourth diode, and the negative electrode of the fourth diode is connected with the first negative voltage output end.
By adopting the technical scheme, the full-bridge rectification is carried out on the high-voltage square wave signals output by the two output ends of the isolation boosting module, and the high-voltage direct current signals are generated.
Optionally, the upper tube output unit includes a first signal controller, a third resistor, a fourth resistor and a fifth resistor, and the first signal controller includes an input end and an output end;
The input end of the first signal controller is connected with the cathodes of the first diode and the third diode and is used for receiving a first high-voltage direct-current signal formed by rectification of the first rectifying unit, and the output end of the first signal controller is connected with one end of the third resistor and a first positive voltage output end;
The other end of the third resistor is connected with one end of the fourth resistor, the other end of the fourth resistor is connected with one end of the fifth resistor, and the other end of the fifth resistor is connected with the first negative voltage output end;
The lower pipe output unit comprises a second signal controller, a sixth resistor, a seventh resistor and an eighth resistor, wherein the second signal controller comprises an input end and an output end;
The input end of the second signal controller is connected with the cathodes of the fifth diode and the sixth diode and is used for receiving a second high-voltage direct-current signal formed by rectification of the second rectifying unit, and the output end of the second signal controller is connected with one end of a sixth resistor and a second positive voltage output end;
The other end of the sixth resistor is connected with one end of the seventh resistor, the other end of the seventh resistor is connected with one end of the eighth resistor, and the other end of the eighth resistor is connected with the second negative voltage output end.
By adopting the technical scheme, the high-voltage direct current signals output by the first rectifying unit and the second rectifying unit are divided, the total voltage and the positive and negative voltages output by the resistors are regulated through the resistance values of the resistors, and the driving voltage of the silicon carbide MOS tube is adapted.
Optionally, the upper pipe output unit further comprises a first operational amplifier, and the lower pipe output unit further comprises a second operational amplifier;
The positive phase input end of the first operational amplifier is connected with the joint of the third resistor and the fourth resistor, the negative phase input end of the first operational amplifier is connected with the output end of the first operational amplifier, and the output end of the first operational amplifier is grounded;
the positive phase input end of the second operational amplifier is connected with the joint of the sixth resistor and the seventh resistor, the negative phase input end of the second operational amplifier is connected with the output end of the second operational amplifier, and the output end of the second operational amplifier is grounded.
By adopting the technical scheme, the ground signal is constructed through the operational amplifier, so that the signal of the ground terminal is kept stable, and if the voltage is directly output to the ground, the feedback quantity can be influenced, so that the output voltage is changed.
Optionally, the first voltage regulating unit includes a first triode, a first photoelectric coupler and a ninth resistor; the first photoelectric coupler comprises a first photodiode and a first photoelectric triode;
The base electrode of the first triode is connected with the singlechip and is used for receiving the voltage regulating signal, the collector electrode of the first triode is connected with the cathode of the first photodiode, and the emitter electrode of the first triode is grounded;
the positive electrode of the first photodiode is connected with an external level signal source, the collector electrode of the first photodiode is connected with one end of the ninth resistor, the other end of the ninth resistor is connected with the junction of the fourth resistor and the fifth resistor, and the emitter electrode of the first photodiode is connected with the first negative voltage output end and the other end of the fifth resistor;
The second voltage regulating unit comprises a second triode, a second photoelectric coupler and a tenth resistor; the second photoelectric coupler comprises a second photodiode and a second photoelectric triode;
the base electrode of the second triode is connected with the singlechip and is used for receiving the voltage regulating signal, the collector electrode of the second triode is connected with the cathode of the second photodiode, and the emitter electrode of the second triode is grounded;
The positive electrode of the second photodiode is connected with an external level signal source, the collector electrode of the second photodiode is connected with one end of the tenth resistor, the other end of the tenth resistor is connected with the junction of the seventh resistor and the eighth resistor, and the emitter electrode of the second photodiode is connected with the second negative voltage output end and the other end of the eighth resistor.
Through adopting above-mentioned technical scheme, first voltage regulating unit and second voltage regulating unit can receive the voltage regulating signal that the singlechip sent to change the resistance of first output unit and second output unit respectively, make the drive voltage who outputs to carborundum MOS upper and lower tube change, adapt to the drive voltage demand of another carborundum MOS pipe.
In another aspect of the application, a device is disclosed that includes a circuit structure of a compatible drive circuit of the silicon carbide MOS tube described above.
In summary, the present application includes at least one of the following beneficial effects:
1. When the singlechip does not send a voltage regulating signal, the first output unit outputs a first driving voltage to an upper tube of the silicon carbide MOS, and the second output unit outputs the first driving voltage to a lower tube of the silicon carbide MOS; when the singlechip sends a voltage regulating signal, the first output unit can output a second driving voltage to the upper tube of the silicon carbide MOS, and the second output unit can output the second driving voltage to the lower tube of the silicon carbide MOS, so that the driving voltage required by the silicon carbide MOS tubes of two different types is conveniently adapted.
2. The first operational amplifier and the second operational amplifier are grounded, and the ground signals are constructed through the two first-stage operational amplifiers, so that the voltage output to the ground is kept stable, and the fluctuation of the output voltage caused by the change of the signal feedback quantity due to the load effect of direct grounding output is prevented.
3. The total voltage and the positive and negative voltage output to the load can be regulated by regulating the resistance values of resistors in the first output unit, the second output unit, the first voltage regulating unit and the second voltage regulating unit, wherein the total voltage is used for driving the silicon carbide MOS tube, and the silicon carbide MOS tube is not easy to turn off when the driving voltage threshold value of the silicon carbide MOS tube is low and is usually turned off by adopting negative pressure, so that the negative voltage is also required to be regulated to turn off by adopting negative pressure.
Drawings
FIG. 1 is a block diagram of one embodiment of a compatible drive circuit for a silicon carbide MOS tube of the present application;
Fig. 2 is a schematic circuit diagram of one embodiment of a compatible driver circuit for a silicon carbide MOS transistor of the present application.
Detailed Description
The present application will be described in further detail with reference to the accompanying drawings.
Referring to fig. 1, fig. 1 is a block diagram of an embodiment of a compatible driving circuit of a silicon carbide MOS transistor according to the present application, which includes a square wave generating block 1, an isolated boosting block 2, a rectifying block 3, a voltage regulating output block 4, and an isolated voltage regulating block 5.
The square wave generation module 1 is used for obtaining PWM signals sent by an external singlechip and converting the square wave signals into power square wave signals, and comprises an input end and an output end, wherein the input end of the square wave generation module 1 is connected with the singlechip, and the output end of the square wave generation module 1 is used for outputting and converting the power square wave signals.
Regarding the square wave generation module 1: the square wave generating module comprises a square wave generator, the square wave generator can convert a received square wave signal into a power square wave signal with a specific power level, so that the square wave signal with a certain power is stably output. FAN3224 is only an alternative embodiment and should not be construed as limiting the choice of square wave generator, and square wave generators based on the same concept should be considered as being within the scope of the present application.
The isolation boosting module 2 is used for boosting the power square wave signal into a high-voltage square wave signal, the rectifying module 3 is used for rectifying the high-voltage square wave signal into a high-voltage direct current signal, and the rectifying module 3 comprises a first rectifying unit 31 and a second rectifying unit 32;
the first rectifying unit 31 and the second rectifying unit 32 each include an input terminal and an output terminal;
The isolation boosting module 2 comprises an input end and two output ends, the input end of the isolation boosting module 2 is connected with the output end of the square wave generating module 1, the first output end of the isolation boosting module 2 is connected with the input end of the first rectifying unit 31, and the second output end of the isolation boosting module 2 is connected with the input end of the second rectifying unit 32.
Regarding the isolation boosting module 2: the isolating boosting module 2 contains a transformer for isolating boosting, and the transformer at least comprises a primary winding and two secondary windings, wherein induction electromotive forces generated at two ends of the primary winding can be induced at two ends of a first secondary winding and a second secondary winding, the first secondary winding outputs a high-voltage square wave signal to the first rectifying unit 31 and the second secondary winding outputs a high-voltage square wave signal to the second rectifying unit 32, so that alternating current signal transmission is performed in an isolating manner, and meanwhile, the effect of signal boosting is achieved through the winding turn ratio.
Regarding the rectifying module 3: the rectification module 3 includes two rectification units, each rectification unit includes a plurality of diodes, the plurality of diodes are connected in a combined manner to form a rectification bridge, in this embodiment, the first rectification unit 31 converts the high-voltage square wave signal induced by the first secondary winding into a high-voltage direct current signal through full-bridge rectification, and the second rectification unit 32 converts the high-voltage square wave signal induced by the second secondary winding into a high-voltage direct current signal through full-bridge rectification.
The voltage regulating output module 4 is configured to regulate the high-voltage direct current signal to a first driving voltage applicable to a first silicon carbide MOS tube, and output the first driving voltage to the first silicon carbide MOS tube, where the first silicon carbide MOS tube includes a first MOS upper tube and a first MOS lower tube;
the pressure regulating output module 4 comprises an upper pipe output unit 41 and a lower pipe output unit 42, wherein the upper pipe output unit 41 and the lower pipe output unit 42 comprise an input end, an output end and a pressure regulating end;
The input end of the upper pipe output unit 41 is connected to the output end of the first rectifying unit 31, and is configured to receive the high-voltage dc signal output by the first rectifying unit 31, and the output end of the upper pipe output unit 41 is configured to adjust the high-voltage dc signal to an applicable dc signal of the first MOS upper pipe and output the adjusted high-voltage dc signal to the upper pipe;
The input end of the down pipe output unit 42 is connected to the output end of the second rectifying unit 32, and is configured to receive the high-voltage dc signal output by the second rectifying unit 32, and the output end of the down pipe output unit 42 is configured to adjust the high-voltage dc signal to an applicable dc signal of the first MOS down pipe and output the applicable dc signal to the down pipe.
Regarding the voltage regulation output module 4: the voltage regulating output module 4 comprises an upper pipe output unit 41 and a lower pipe output unit 42, wherein the upper pipe output unit 41 provides driving voltage for an upper pipe of a silicon carbide MOS pipe which is driven by a half bridge, the lower pipe output unit 42 provides driving voltage for a lower pipe of the same silicon carbide MOS pipe which is driven by the half bridge, the upper pipe output unit 41 and the lower pipe output unit 42 both comprise a signal controller and a plurality of resistors, the first signal controller can output a high-voltage direct current signal formed by rectification of the first rectifying unit 31 when the isolation voltage regulating unit 5 does not receive a singlechip, and the high-voltage direct current signal is divided by the plurality of resistors in the upper pipe output unit 41 to form positive and negative voltages; similarly, when the isolation voltage regulator 5 does not receive the single-chip microcomputer, the second signal controller can output a high-voltage direct-current signal formed by rectification of the second rectification unit 32, and the high-voltage direct-current signal is divided by a plurality of resistors in the upper tube output unit 42.
The isolation voltage regulation module 5 is used for obtaining a voltage regulation signal sent by the singlechip and regulating the first driving voltage to a second driving voltage applicable to a second silicon carbide MOS tube according to the voltage regulation signal, wherein the second silicon carbide MOS tube comprises a second MOS upper tube and a second MOS lower tube;
The isolation voltage regulating module 5 comprises a first voltage regulating unit 51 and a second voltage regulating unit 52, wherein the first voltage regulating unit 51 and the second voltage regulating unit 52 comprise an input end and an output end;
The first voltage regulating unit 51 is configured to regulate the applicable dc signal of the first MOS upper tube to the applicable dc signal of the second MOS upper tube, an input end of the first voltage regulating unit 51 is configured to obtain the voltage regulating signal, and an output end of the first voltage regulating unit 51 is connected to a voltage regulating end of the upper tube output unit 41;
The second voltage regulating unit 52 is configured to regulate the applicable dc signal of the first MOS lower tube to the applicable dc signal of the second MOS lower tube, an input end of the second voltage regulating unit 52 is configured to obtain the voltage regulating signal, and an output end of the second voltage regulating unit 52 is connected to a voltage regulating end of the lower tube output unit 42.
Regarding the isolated voltage regulation module 5: the isolation voltage regulating module 5 comprises a first voltage regulating unit 51 and a second voltage regulating unit 52, and each voltage regulating unit comprises a photoelectric coupler and a resistor. When the voltage regulating signal triggers the photoelectric coupler in the first voltage regulating unit 51, the voltage regulating end of the signal controller in the upper tube output unit 41 is turned on through the path of the first voltage regulating unit 51, so that the resistor in the upper tube output unit 51 is integrated into the upper tube output unit 41, and the resistance value of the upper tube output unit 41 is changed, so that the total voltage and the positive and negative voltages output to the upper tube are changed. The voltage regulating signals are high-low level signals, and when the single chip microcomputer sends out high level signals, the triodes in the first voltage regulating unit 51 and the second voltage regulating unit 52 are triggered, so that the photoelectric coupler in the units is conducted.
Similarly, the second voltage regulating unit 52 is connected with the lower tube output unit 42, when the voltage regulating signal triggers the photoelectric coupler in the second voltage regulating unit 52, the voltage regulating end of the signal controller in the lower tube output unit 42 is opened through the passage of the second voltage regulating unit 52, so that the resistor in the lower tube output unit 52 is integrated into the upper tube output unit 42, and the resistance value of the lower tube output unit 42 is changed, so that the total voltage and the positive and negative voltages output to the lower tube are changed.
The circuit connection of an embodiment of the present application is specifically described based on a module connection diagram of a compatible driving circuit of a silicon carbide MOS transistor, and referring to fig. 2, fig. 2 is a schematic circuit diagram of an embodiment of a compatible driving circuit of a silicon carbide MOS transistor of the present application.
In the embodiment of the application, the square wave generating module 1 comprises a first resistor R1, a second resistor R2 and a power square wave generator U1;
the power square wave generator U1 comprises a first square wave receiving end INA, a second square wave receiving end INB, a first power square wave output end OUTA and a second power square wave output end OUTB;
one end of the first resistor R1 is connected with the singlechip, the other end of the first resistor R1 is connected with the first square wave receiving end, and the first power square wave output end is connected with the input end of the isolation step-up transformer T1;
One end of the second resistor R2 is connected with the singlechip, the other end of the second resistor R2 is connected with the second square wave receiving end, and the second power square wave output end is connected with the input end of the isolation boosting module.
Specifically, the duty ratio of the PWM signal sent by the singlechip is two-way complementation, and certain dead time is reserved at the same time, so that the situation that the upper tube and the lower tube of the silicon carbide MOS tube are simultaneously opened due to signal transmission delay is prevented. The first resistor R1 divides the first input port of the PWM signal, and the second resistor R2 divides the second input port of the PWM signal, preventing a short circuit. The external level signal VCC provides a dc signal for the first power square wave enable port ENA, the second power square wave enable port ENB, and the device power supply port VDD of the power square wave generator U1.
More specifically, the PWM signal sent by the single chip microcomputer is respectively input from a first square wave receiving end INA and a second square wave receiving end INB of the power square wave generator U1, after the INA port receives the PWM signal, the direct current signal received by the port ENA supplies energy, and the power square wave signal with specific power is generated and output from the OUTA port; similarly, the direct current signal received by the INB port from the port ENA is used to generate a power square wave signal with specific power and output the power square wave signal from the OUTB port. The output of U1 is a complementary square wave of magnitude VCC, which in the embodiment of the application is set to 12V. The square wave generating module 1 can also be added with a capacitor to eliminate interference signals, and the following details are described:
The square wave generating module 1 further comprises a first capacitor C1 and a second capacitor C2;
one end of the first capacitor C1 is connected to the connection between the first resistor R1 and the first square wave receiving end INA, and the other end is grounded.
Specifically, the PWM signal input to the first square wave receiving terminal INA by the singlechip is filtered, so that the interference signal is grounded and discharged, and the stability of the signal is increased.
One end of the second capacitor C2 is connected to the connection between the second resistor R2 and the second square wave receiving end INB, and the other end is grounded.
Specifically, the PWM signal input to the second square wave receiving terminal INB by the singlechip is filtered, so that the interference signal is grounded and discharged, and the stability of the signal is improved.
The power square wave signal generated by the power square wave generator U1 is output to the isolation boost module 2, and the isolation boost module 2 is described in detail below:
the isolation boosting module 2 comprises a transformer T1, wherein the transformer T1 comprises a primary winding, a first secondary winding and a second secondary winding;
One end of the primary winding is connected with the first power square wave output end OUTA, and the other end of the primary winding is connected with the second power square wave output end OUTB;
One end of the first secondary winding is connected with the output end of the first rectifying unit 31, and the other end of the first secondary winding is connected with the input end of the first rectifying unit 31;
One end of the second secondary winding is connected with the output end of the second rectifying unit 32, and the other end is connected with the input end of the second rectifying unit 32.
Specifically, the power square wave signal generates a positive-negative induced electromotive force at two ends of the primary winding of the transformer T1, and the first secondary winding and the second secondary winding correspondingly sense the electromotive force to generate the power square wave signal, thereby forming isolated transmission. And the power square wave signal is boosted by changing the turn ratio of the primary winding to the secondary winding. In the embodiment of the present application, the transformation ratio of the transformer T1 is set to 1:2, namely, the boosted high-voltage square wave signal is 2 times of the voltage value of the signal source VCC, assuming that VCC is 12V, the high-voltage square wave signal of 24V is output to the rectifying module 3. In addition, one end of the primary winding can be subjected to voltage stabilizing treatment, and the voltage stabilizing treatment is specifically described below:
The isolated boost module 3 further comprises a third capacitor C3; the third capacitor C3 is connected in series between the first power square wave output terminal OUTA and one end of the primary winding.
Specifically, the capacitor C3 in series can perform voltage stabilization on the square wave signal at one end of the primary winding of the transformer T1, so as to avoid the circuit from being damaged greatly by the signal transient, and the capacitor C3 may also be in series between the second power square wave output end OUTB and the other end of the primary winding, so that the same effect can be achieved.
More specifically, the high-voltage square wave signal generated by the first secondary winding is output to the first rectifying unit 31 for rectification, the high-voltage square wave signal generated by the second secondary winding is output to the second rectifying unit 32 for rectification, and the signal rectifying portion will be described in detail below:
The first rectifying unit 31 includes a first diode D1, a second diode D2, a third diode D3, and a fourth diode D4, and the second rectifying unit 32 includes a fifth diode D5, a sixth diode D6, a seventh diode D7, and an eighth diode D8;
The positive electrode of the first diode D1 is connected with one end of the first secondary winding and the negative electrode of the second diode D2, the negative electrode of the first diode D1 is connected with the input end of the upper tube output unit 41, and the positive electrode of the second diode D2 is connected with the first negative voltage output end VOUT1-;
The positive electrode of the third diode D3 is connected with the other end of the first secondary winding and the negative electrode of the fourth diode D4, and the negative electrode of the fourth diode D4 is connected with the first negative voltage output end VOUT1-.
Specifically, diodes D1, D2, D3 and D4 form a full bridge rectifier, build up positive and negative DC voltages, output negative voltage to VOUT 1-port, and positive voltage to upper tube output unit 41. In the embodiment of the application, the amplitude of the high-voltage square wave signal is 24V, and the direct current signal formed by rectification is also 24V.
The positive electrode of the fifth diode D5 is connected to one end of the second secondary winding and the negative electrode of the sixth diode D6, the negative electrode of the fifth diode D5 is connected to the input end of the lower tube output unit 42, and the positive electrode of the sixth diode D6 is connected to the second negative voltage output end VOUT2-;
The positive electrode of the seventh diode D7 is connected with the other end of the second secondary winding and the negative electrode of the eighth diode D8, and the negative electrode of the eighth diode D8 is connected with the second negative voltage output end VOUT2-.
Specifically, diodes D5, D6, D7 and D8 form a full bridge rectifier, build positive and negative voltages, output negative voltages to the VOUT 2-port, and positive voltages to the down tube output unit 42. In the embodiment of the application, the amplitude of the high-voltage square wave signal is 24V, and the direct current signal formed by rectification is also 24V.
When receiving the rectified high-voltage direct current signal, the upper tube output unit 41 and the lower tube output unit 42 are adjusted by a voltage regulator composed of a signal controller and a plurality of resistors to obtain the required total voltage and positive and negative voltages, and the voltage adjustment is specifically described below:
The upper pipe output unit 41 includes a first signal controller U2, a third resistor R3, a fourth resistor R4, and a fifth resistor R5, and the first signal controller U2 includes an input terminal and an output terminal;
the input end of the first signal controller U2 is connected to the cathodes of the first diode D1 and the third diode D3, and is configured to receive a first high-voltage direct-current signal rectified by the first rectifying unit 31, and the output end of the first signal controller U2 is connected to one end of the third resistor R3 and a first positive voltage output end VOUT1+;
the other end of the third resistor R3 is connected with one end of the fourth resistor R4, the other end of the fourth resistor R4 is connected with one end of the fifth resistor R5, and the other end of the fifth resistor R5 is connected with the first negative voltage output end VOUT1-.
Specifically, the positive dc signal and the negative dc signal rectified by the first rectifying unit 31 may be adjusted by changing the resistance values of the resistors R3, R4, and R5, and the total output voltage may be adjusted by the ratio of (r3+r4) to R5, specifically using the following formula:
Wherein V 1+ is a positive voltage output to the upper silicon carbide MOS tube, V 1- is a negative voltage output to the lower silicon carbide MOS tube, V 1+-V1- is a total voltage output to the lower silicon carbide MOS tube, when the total voltage reaches a driving voltage requirement of the lower silicon carbide MOS tube, the lower silicon carbide MOS tube is turned on, V REF is a reference voltage, and the reference voltage is a voltage value of a direct current signal formed by rectifying the first rectifying unit 31.
The positive and negative voltages are regulated by the ratio of R3 to (R4+R5), and the following formula is adopted:
Wherein, The ratio of positive voltage to negative voltage is that the positive voltage and the negative voltage are regulated while the total voltage is regulated, and because the threshold value of the driving voltage of the silicon carbide MOS tube is lower and is not easy to turn off at 0V, negative voltage turn-off is usually adopted, and the negative voltage power supply requirements of the silicon carbide MOS tubes of different categories for negative voltage turn-off are different, so that the output power supply negative voltage is correspondingly regulated when the silicon carbide MOS tubes of different categories are adapted.
The down tube output unit 42 includes a second signal controller U3, a sixth resistor R6, a seventh resistor R7, and an eighth resistor R8, and the second signal controller U3 includes an input terminal and an output terminal;
The input end of the second signal controller U3 is connected to the cathodes of the fifth diode D5 and the sixth diode D6, and is configured to receive the second high-voltage direct-current signal rectified by the second rectifying unit 32, and the output end of the second signal controller is connected to one end of the sixth resistor R6 and the second positive voltage output end VOUT2+;
The other end of the sixth resistor R6 is connected with one end of the seventh resistor R7, the other end of the seventh resistor R7 is connected with one end of the eighth resistor R8, and the other end of the eighth resistor R8 is connected with the second negative voltage output end VOUT2-.
Specifically, the method for adjusting the total voltage and the positive and negative voltages of V 2+ and V 2- is similar to the above-mentioned upper tube output unit 41, and the total voltage and the positive and negative voltages output to the silicon carbide MOS lower tube can be adjusted by adjusting the resistance values of R6, R7 and R8.
More specifically, the ground signal can be further constructed through the first-stage operational amplifier, so that the output voltage is unstable due to the fact that the feedback quantity of the direct current signal is directly output to the ground, and the following specific explanation is made on the voltage stabilizing operation of the operational amplifier:
the upper pipe output unit 41 further comprises a first operational amplifier U4, and the lower pipe output unit 42 further comprises a second operational amplifier U5;
The positive phase input end of the first operational amplifier U4 is connected with the joint of the third resistor R3 and the fourth resistor R4, the negative phase input end of the first operational amplifier U4 is connected with the output end of the first operational amplifier U4, and the output end of the first operational amplifier U4 is grounded;
the positive phase input end of the second operational amplifier U5 is connected with the connection part of the sixth resistor R6 and the seventh resistor R7, the negative phase input end of the second operational amplifier U5 is connected with the output end of the second operational amplifier U5, and the output end of the second operational amplifier U5 is grounded.
Specifically, the negative phase input end of the first operational amplifier U4 is connected with the output end of the first operational amplifier U4, the negative phase input end of the second operational amplifier U5 is connected with the output end of the second operational amplifier U5, feedback circuits are respectively formed, stability of signal output is ensured, the output end is used as a reference voltage, stability of signals is maintained, and influence on a driving voltage value output to the silicon carbide MOS tube is avoided.
Further, when the silicon carbide MOS required by another driving voltage needs to be replaced, the layout or BOM of the PCB is not required to be changed, the singlechip is directly used for sending a voltage regulating signal to adapt to the output driving power supply of the replaced silicon carbide MOS tube, and the voltage regulating process is specifically described as follows:
The first voltage regulating unit 51 includes a first triode Q1, a first photo coupler U6, and a ninth resistor R9; the first photoelectric coupler U6 comprises a first photodiode and a first phototriode;
The base electrode of the first triode Q1 is connected with the singlechip and is used for receiving the voltage regulating signal, the collector electrode of the first triode Q1 is connected with the cathode of the first photodiode, and the emitter electrode of the first triode Q1 is grounded;
The positive electrode of the first photodiode is connected with an external level signal source, the collector electrode of the first photodiode is connected with one end of the ninth resistor R9, the other end of the ninth resistor R9 is connected with the junction of the fourth resistor R4 and the fifth resistor R5, and the emitter electrode of the first photodiode is connected with the other ends of the first negative voltage output end VOUT 1-and the fifth resistor R5;
The second voltage regulating unit 52 includes a second triode Q2, a second photocoupler U7, and a tenth resistor R10; the second photoelectric coupler U7 comprises a second photodiode and a second phototransistor;
The base electrode of the second triode Q2 is connected with the singlechip and is used for receiving the voltage regulating signal, the collector electrode of the second triode Q2 is connected with the cathode of the second photodiode, and the emitter electrode of the second triode Q2 is grounded;
The positive electrode of the second photodiode is connected with an external level signal source, the collector electrode of the second photodiode is connected with one end of the tenth resistor R10, the other end of the tenth resistor R10 is connected with the junction of the seventh resistor R7 and the eighth resistor R8, and the emitter electrode of the second photodiode is connected with the second negative voltage output end VOUT 2-and the other end of the eighth resistor R8.
Specifically, the principle of the first voltage regulating unit 51 is the same as that of the second voltage regulating unit 52, and the first voltage regulating unit 51 is taken as an example for explanation, when the singlechip sends a voltage regulating signal to trigger the base electrode of the first triode Q1, an external direct current signal source passes through the first photodiode and the first triode Q1 to the ground, and the base electrode of the first photodiode senses the optical signal to conduct the body diode. After the body diode of the first phototransistor is turned on, the control end of the first signal controller U2 in the first output unit 41 is turned on through the resistor R9, the first phototransistor, and the first negative voltage output terminal VOUT 1-in a loop, which is equivalent to connecting the resistor R9 in parallel to two ends of the resistor R5.
More specifically, after the resistor R5 and the resistor R9 are connected in parallel by the voltage regulating signal sent by the singlechip, the total voltage and the positive and negative voltages output to the upper tube can be regulated simultaneously, and the following formula is adopted for regulating the total voltage:
regarding the regulation of the positive and negative voltages, the following formula is adopted:
Wherein, R5// R9 is the resistance value after the parallel connection of the resistor R5 and the resistor R9, and for the same reason of the total voltage and the positive and negative voltage output to the lower tube of the silicon carbide MOS tube, the resistors R3, R4, R5 and R9 are replaced by the resistors R6, R7, R8 and R10 corresponding to the lower tube output unit 42 and the second voltage regulating unit 52 in sequence, and the total voltage and the positive and negative voltage values output to the lower tube after the regulation can be obtained by substituting the above formula.
The embodiments of the present application are all preferred embodiments of the present application, and are not intended to limit the scope of the present application in this way, therefore: all equivalent changes in structure, shape and principle of the application should be covered in the scope of protection of the application.

Claims (10)

1. A compatible drive circuit of a silicon carbide MOS tube is characterized in that: the device comprises a square wave generating module, an isolation boosting module, a rectifying module, a voltage regulating output module and an isolation voltage regulating module;
The square wave generation module is used for acquiring PWM signals sent by an external singlechip and converting the PWM signals into power square wave signals, and comprises an input end and an output end, wherein the input end of the square wave generation module is connected with the singlechip, and the output end of the square wave generation module is used for outputting and converting the power square wave signals;
The isolation boosting module is used for boosting the power square wave signal into a high-voltage square wave signal, the rectifying module is used for rectifying the high-voltage square wave signal into a high-voltage direct current signal, and the rectifying module comprises a first rectifying unit and a second rectifying unit;
the first rectifying unit and the second rectifying unit comprise an input end and an output end;
the isolation boosting module comprises an input end and two output ends, wherein the input end of the isolation boosting module is connected with the output end of the square wave generating module, the first output end of the isolation boosting module is connected with the input end of the first rectifying unit, and the second output end of the isolation boosting module is connected with the input end of the second rectifying unit;
The voltage regulating output module is used for regulating the high-voltage direct-current signal into a first driving voltage and outputting the first driving voltage to the first silicon carbide MOS tube, and the first silicon carbide MOS tube comprises a first MOS upper tube and a first MOS lower tube;
the pressure regulating output module comprises an upper pipe output unit and a lower pipe output unit, wherein the upper pipe output unit and the lower pipe output unit comprise an input end, an output end and a pressure regulating end;
The input end of the upper pipe output unit is connected with the output end of the first rectifying unit and is used for receiving the high-voltage direct current signal output by the first rectifying unit, and the output end of the upper pipe output unit is used for adjusting the high-voltage direct current signal into the applicable direct current signal of the first MOS upper pipe and outputting the applicable direct current signal to the upper pipe;
The input end of the lower pipe output unit is connected with the output end of the second rectifying unit and is used for receiving the high-voltage direct current signal output by the second rectifying unit, and the output end of the lower pipe output unit is used for adjusting the high-voltage direct current signal into a direct current signal applicable to the first MOS lower pipe and outputting the direct current signal to the lower pipe;
The isolation voltage regulating module is used for acquiring a voltage regulating signal sent by the singlechip, regulating the first driving voltage into a second driving voltage according to the voltage regulating signal, and outputting the second driving voltage to a second silicon carbide MOS tube through the voltage regulating output module, wherein the second silicon carbide MOS tube comprises a second MOS upper tube and a second MOS lower tube;
the isolation voltage regulating module comprises a first voltage regulating unit and a second voltage regulating unit, wherein the first voltage regulating unit and the second voltage regulating unit comprise an input end and an output end;
the first voltage regulating unit is used for regulating the applicable direct current signal of the first MOS upper tube to the applicable direct current signal of the second MOS upper tube, the input end of the first voltage regulating unit is used for acquiring the voltage regulating signal, and the output end of the first voltage regulating unit is connected with the voltage regulating end of the upper tube output unit;
The second voltage regulating unit is used for regulating the applicable direct current signal of the first MOS lower tube into the applicable direct current signal of the second MOS lower tube, the input end of the second voltage regulating unit is used for acquiring the voltage regulating signal, and the output end of the second voltage regulating unit is connected with the voltage regulating end of the lower tube output unit.
2. The compatible driver circuit of a silicon carbide MOS transistor of claim 1, wherein: the square wave generating module comprises a first resistor, a second resistor and a power square wave generator;
The power square wave generator comprises a first square wave receiving end, a second square wave receiving end, a first power square wave output end and a second power square wave output end;
One end of the first resistor is connected with the singlechip, the other end of the first resistor is connected with the first square wave receiving end, and the first power square wave output end is connected with the input end of the isolation step-up transformer;
one end of the second resistor is connected with the singlechip, the other end of the second resistor is connected with the second square wave receiving end, and the second power square wave output end is connected with the input end of the isolation boosting module.
3. The compatible driver circuit of a silicon carbide MOS transistor of claim 2, wherein: the square wave generating module further comprises a first capacitor and a second capacitor;
one end of the first capacitor is connected with the connection part of the first resistor and the first square wave receiving end, and the other end of the first capacitor is grounded;
One end of the second capacitor is connected with the connection part of the second resistor and the second square wave receiving end, and the other end of the second capacitor is grounded.
4. The compatible driver circuit of a silicon carbide MOS transistor of claim 2, wherein: the isolation boosting module comprises a transformer, wherein the transformer comprises a primary winding, a first secondary winding and a second secondary winding;
one end of the primary winding is connected with the first power square wave output end, and the other end of the primary winding is connected with the second power square wave output end;
One end of the first secondary winding is connected with the output end of the first rectifying unit, and the other end of the first secondary winding is connected with the input end of the first rectifying unit;
One end of the second secondary winding is connected with the output end of the second rectifying unit, and the other end of the second secondary winding is connected with the input end of the second rectifying unit.
5. The compatible driver circuit of a silicon carbide MOS transistor of claim 4, wherein: the isolated boost module further comprises a third capacitor; the third capacitor is connected in series between the first power square wave output end and one end of the primary winding.
6. The compatible driver circuit of a silicon carbide MOS transistor of claim 4, wherein: the first rectifying unit comprises a first diode, a second diode, a third diode and a fourth diode, and the second rectifying unit comprises a fifth diode, a sixth diode, a seventh diode and an eighth diode;
The positive electrode of the first diode is connected with one end of the first secondary winding and the negative electrode of the second diode, the negative electrode of the first diode is connected with the input end of the upper tube output unit, and the positive electrode of the second diode is connected with the first negative voltage output end;
The anode of the third diode is connected with the other end of the first secondary winding and the cathode of the fourth diode, and the cathode of the fourth diode is connected with the first negative voltage output end;
The positive electrode of the fifth diode is connected with one end of the second secondary winding and the negative electrode of the sixth diode, the negative electrode of the fifth diode is connected with the input end of the lower tube output unit, and the positive electrode of the sixth diode is connected with the second negative voltage output end;
the positive electrode of the seventh diode is connected with the other end of the second secondary winding and the negative electrode of the eighth diode, and the negative electrode of the eighth diode is connected with the second negative voltage output end.
7. The compatible driver circuit of a silicon carbide MOS transistor of claim 6, wherein: the upper tube output unit comprises a first signal controller, a third resistor, a fourth resistor and a fifth resistor, wherein the first signal controller comprises an input end and an output end;
The input end of the first signal controller is connected with the cathodes of the first diode and the third diode and is used for receiving a first high-voltage direct-current signal formed by rectification of the first rectifying unit, and the output end of the first signal controller is connected with one end of the third resistor and a first positive voltage output end;
The other end of the third resistor is connected with one end of the fourth resistor, the other end of the fourth resistor is connected with one end of the fifth resistor, and the other end of the fifth resistor is connected with the first negative voltage output end;
The lower pipe output unit comprises a second signal controller, a sixth resistor, a seventh resistor and an eighth resistor, wherein the second signal controller comprises an input end and an output end;
The input end of the second signal controller is connected with the cathodes of the fifth diode and the sixth diode and is used for receiving a second high-voltage direct-current signal formed by rectification of the second rectifying unit, and the output end of the second signal controller is connected with one end of a sixth resistor and a second positive voltage output end;
The other end of the sixth resistor is connected with one end of the seventh resistor, the other end of the seventh resistor is connected with one end of the eighth resistor, and the other end of the eighth resistor is connected with the second negative voltage output end.
8. The compatible driver circuit of claim 7, wherein: the upper pipe output unit further comprises a first operational amplifier, and the lower pipe output unit further comprises a second operational amplifier;
The positive phase input end of the first operational amplifier is connected with the joint of the third resistor and the fourth resistor, the negative phase input end of the first operational amplifier is connected with the output end of the first operational amplifier, and the output end of the first operational amplifier is grounded;
the positive phase input end of the second operational amplifier is connected with the joint of the sixth resistor and the seventh resistor, the negative phase input end of the second operational amplifier is connected with the output end of the second operational amplifier, and the output end of the second operational amplifier is grounded.
9. The compatible driver circuit of claim 7, wherein: the first voltage regulating unit comprises a first triode, a first photoelectric coupler and a ninth resistor; the first photoelectric coupler comprises a first photodiode and a first photoelectric triode;
The base electrode of the first triode is connected with the singlechip and is used for receiving the voltage regulating signal, the collector electrode of the first triode is connected with the cathode of the first photodiode, and the emitter electrode of the first triode is grounded;
the positive electrode of the first photodiode is connected with an external level signal source, the collector electrode of the first photodiode is connected with one end of the ninth resistor, the other end of the ninth resistor is connected with the junction of the fourth resistor and the fifth resistor, and the emitter electrode of the first photodiode is connected with the first negative voltage output end and the other end of the fifth resistor;
The second voltage regulating unit comprises a second triode, a second photoelectric coupler and a tenth resistor; the second photoelectric coupler comprises a second photodiode and a second photoelectric triode;
the base electrode of the second triode is connected with the singlechip and is used for receiving the voltage regulating signal, the collector electrode of the second triode is connected with the cathode of the second photodiode, and the emitter electrode of the second triode is grounded;
The positive electrode of the second photodiode is connected with an external level signal source, the collector electrode of the second photodiode is connected with one end of the tenth resistor, the other end of the tenth resistor is connected with the junction of the seventh resistor and the eighth resistor, and the emitter electrode of the second photodiode is connected with the second negative voltage output end and the other end of the eighth resistor.
10. An apparatus comprising a circuit structure of a compatible drive circuit for a silicon carbide MOS transistor according to any of claims 1 to 9.
CN202311369619.5A 2023-10-19 2023-10-19 Compatible driving circuit and device of silicon carbide MOS tube Pending CN118138027A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311369619.5A CN118138027A (en) 2023-10-19 2023-10-19 Compatible driving circuit and device of silicon carbide MOS tube

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311369619.5A CN118138027A (en) 2023-10-19 2023-10-19 Compatible driving circuit and device of silicon carbide MOS tube

Publications (1)

Publication Number Publication Date
CN118138027A true CN118138027A (en) 2024-06-04

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202311369619.5A Pending CN118138027A (en) 2023-10-19 2023-10-19 Compatible driving circuit and device of silicon carbide MOS tube

Country Status (1)

Country Link
CN (1) CN118138027A (en)

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