CN118101392A - Method for reducing backward crosstalk in communication and backward synthesis circuit - Google Patents

Method for reducing backward crosstalk in communication and backward synthesis circuit Download PDF

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CN118101392A
CN118101392A CN202410510050.8A CN202410510050A CN118101392A CN 118101392 A CN118101392 A CN 118101392A CN 202410510050 A CN202410510050 A CN 202410510050A CN 118101392 A CN118101392 A CN 118101392A
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backward
circuit
current source
tail current
emphasis
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CN118101392B (en
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Chengdu Cetc Xingtuo Technology Co ltd
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Chengdu Cetc Xingtuo Technology Co ltd
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Abstract

The invention discloses a method for reducing backward crosstalk in communication and a backward synthesis circuit. In order to solve the problems of how to not reduce the amplitude of an output signal and effectively weaken backward crosstalk when high-frequency signals are transmitted and ensure the reliability of a system, the method for reducing the backward crosstalk in communication is applied to a backward synthesis circuit and comprises the following steps: detecting the opening or closing of the backward pre-emphasis function; if the backward pre-emphasis function is started, selecting a power supply voltage as an output common mode point of a backward synthesis circuit, and enabling a first tail current source and a second tail current source in the backward synthesis circuit to be opened so as to keep the backward synthesis circuit to work normally; if the backward pre-emphasis function is closed, the first voltage is selected as an output common mode point of the backward synthesis circuit, and a first tail current source and a second tail current source in the backward synthesis circuit are closed. The invention can effectively weaken backward crosstalk when high-frequency signals are transmitted while improving the reliability of the system. The invention is suitable for the field of high-speed wired communication.

Description

Method for reducing backward crosstalk in communication and backward synthesis circuit
Technical Field
The invention relates to the field of high-speed wired communication, in particular to a method for reducing backward crosstalk in communication and a backward synthesis circuit.
Background
Serializers and deserializers (Serializer and Deserializer, serDes) are common high-speed wired communication technologies. The SerDes technique typically requires link equalization, while the de-emphasis technique, the pre-emphasis technique, is a link equalization method commonly used to implement a feedback decision equalizer (Decision Feedback Equalizer, DFE) and a forward feedback equalizer (Feed Forward Equalizer, FFE). Further, the weighting technique can be divided into: the forward de-emphasis, the forward pre-emphasis, the backward de-emphasis and the backward pre-emphasis are respectively used for solving the problems of forward crosstalk and backward crosstalk in a communication link. The present invention is directed to a backward pre-emphasis technique in DFE or FFE.
The current-mode (Current Mode Logic, CML) structure is a current-based level structure that represents a logical value by controlling the magnitude of a current. By controlling the current, the CML circuit can realize fast response and low power consumption, and is the preferred structure of the high-speed wired communication circuit.
Meanwhile, the high-speed signal is affected by skin effect, transmission line dielectric loss, reflection and other reasons, serious backward crosstalk can be generated after the high-speed signal passes through a transmission channel with larger loss, and the backward crosstalk can cause the influence of the signal amplitude at the moment on the subsequent signal amplitude, so that the error rate of the system is increased.
The pre-emphasis technique and the de-emphasis technique can compensate the high frequency signal, and table 1 is a comparison table of the advantages and disadvantages of the pre-emphasis technique and the de-emphasis technique, wherein the pre-emphasis technique does not reduce the amplitude of the output signal, but increases the power consumption additionally, while the de-emphasis technique does not increase the power consumption additionally, but reduces the amplitude of the signal. In attenuating the backward crosstalk of the high frequency signal, if the amplitude of the output signal of the circuit is required, a compensation technology of backward pre-emphasis is required.
Table 1: pre-emphasis technique and de-emphasis technique comparison table
Fig. 1 is a schematic diagram of a backward pre-emphasis circuit in the prior art, which includes a main circuit driving circuit, a sub circuit driving circuit, a backward branch circuit driving circuit, a backward combining circuit, and a pre-emphasis combining circuit. The input signal passes through the backward branch driving circuit and forms phase lag with the output of the auxiliary driving circuit, and the backward synthesis circuit synthesizes the signal after inverting the output of the backward branch driving circuit and the auxiliary driving circuit to obtain a backward synthesis signal. And then synthesizing the backward synthesized signal with the output of the main driving circuit through a pre-emphasis synthesis circuit to finally obtain a backward pre-emphasis signal. The backward synthesis circuit and the pre-emphasis synthesis circuit are gilbert circuits, and fig. 2 is a schematic diagram of a gilbert circuit in the prior art. However, when the system turns off the backward pre-emphasis function, if the tail current source of the backward synthesis circuit is completely turned off, the output common mode point of the backward synthesis circuit is pulled up to the power supply voltage, so that the differential input pair tube of the second branch coupled with the output of the backward synthesis circuit in the pre-emphasis synthesis circuit is biased to a switch state, and if the differential input pair tube is not processed, conduction of the differential output end of the pre-emphasis synthesis circuit is caused, and the backward pre-emphasis compensation effect is affected.
When the system is closed and the backward pre-emphasis function is achieved, the tail currents of the backward branch driving circuit and the auxiliary driving circuit are only closed, the tail current of the backward synthesis circuit is kept open, a voltage dividing resistor is added between a power supply of the backward synthesis circuit and an output load resistor to reduce the output common mode point voltage, so that the output voltage of the backward synthesis circuit is reduced by using the voltage drop generated on the voltage dividing resistor, and the differential input pair tube of a second branch in the pre-emphasis synthesis circuit is biased to a cut-off state, but the mode can cause: whether or not the back pre-emphasis function is on, the back-combining circuit tail current must be kept on, which is typically on the order of milliamperes, which increases circuit power consumption and reduces system reliability.
Therefore, how to design a method and a backward combining circuit for reducing backward crosstalk in communication, which effectively weaken backward crosstalk during high-frequency signal transmission and increase system reliability without reducing output signal amplitude, is a technical problem to be solved in the current high-speed wired communication field.
Disclosure of Invention
In order to alleviate or partially alleviate the above technical problem, the solution of the present invention is as follows:
a method for reducing backward crosstalk in communication is applied to a backward synthesis circuit, and comprises the following steps:
Detecting the on or off state of the backward pre-emphasis function;
If the backward pre-emphasis function is started, selecting a power supply voltage as an output common mode point of a backward synthesis circuit, and enabling a first tail current source and a second tail current source in the backward synthesis circuit to be opened so as to keep the backward synthesis circuit to work normally;
If the backward pre-emphasis function is closed, selecting the first voltage as an output common mode point of the backward synthesis circuit, and closing a first tail current source and a second tail current source in the backward synthesis circuit;
wherein the first voltage is less than one half of a supply voltage.
Further, the first voltage is obtained by stepping down the power supply voltage.
Further, the current signal falling edge amplitude is increased by reducing the amplitude of the backward signal to suppress backward crosstalk.
A backward combining circuit applied to a backward pre-emphasis circuit of a current mode structure, the backward combining circuit being configured to combine two differential input signals, the backward combining circuit comprising:
The backward pre-emphasis switch circuit detects the on or off of the backward pre-emphasis function in real time to generate a voltage reduction circuit control signal, a power supply selection circuit control signal and a tail current source switch control signal;
the step-down circuit is used for step-down the power supply voltage under the action of a step-down circuit control signal output by the backward pre-emphasis switching circuit to obtain a first voltage;
the power supply selection circuit is used for selecting a power supply voltage or a first voltage output by the voltage reduction circuit as a power supply voltage of the Gilbert circuit module under the action of a power supply selection circuit control signal output by the backward pre-emphasis switching circuit;
the backward pre-emphasis switch circuit is used for controlling the tail current source switch control circuit under the action of a tail current source switch control circuit control signal output by the backward pre-emphasis switch circuit so as to control the on or off of a first tail current source and a second tail current source in the Gilbert circuit module;
the two paths of differential input signals of the backward synthesis circuit are the inputs of the Gilbert circuit module, and the differential output of the Gilbert circuit module is the output of the backward synthesis circuit;
wherein the first voltage is less than one half of a supply voltage.
Further, the backward pre-emphasis circuit increases the current signal falling edge amplitude by reducing the backward signal amplitude to suppress backward crosstalk.
Further, if the start of the backward pre-emphasis function is detected, the step-down circuit does not work, the backward pre-emphasis switch circuit controls the power supply selection circuit to select the power supply voltage as the power supply voltage of the gilbert circuit module, and controls the tail current source switch control circuit to conduct the first tail current source and the second tail current source in the gilbert circuit module so as to keep the backward synthesis circuit to work normally;
When the backward pre-emphasis function is detected to be closed, the backward pre-emphasis switch circuit controls the step-down circuit to work, controls the power supply selection circuit to select the first voltage as the power supply voltage of the Gilbert circuit module, and controls the tail current source switch control circuit to enable the first tail current source and the second tail current source in the Gilbert circuit module to be closed.
Further, the step-down circuit is a low dropout linear voltage regulator.
Further, the gilbert circuit module comprises a first branch and a second branch;
The first branch circuit comprises a first transistor, a second transistor, a first load resistor, a first tail current source and N-type transistors;
the control electrode of the first transistor is coupled with a first positive signal in the input signal of the backward synthesis circuit, the first electrode of the first transistor is coupled with the input end of the first tail current source, the second electrode of the first transistor is coupled with one end of the first load resistor and is used as a negative output signal end in the differential output of the backward synthesis circuit, and the other end of the first load resistor is coupled with the output of the power supply selection circuit;
The control electrode of the second transistor receives a first negative signal in the input signal of the backward synthesis circuit, the first electrode of the second transistor is coupled with the input end of the first tail current source, the second electrode of the second transistor is coupled with one end of the second load resistor and is coupled with the positive output signal end of the backward synthesis circuit, and the other end of the second load resistor is coupled with the output of the power supply selection circuit;
the second branch circuit comprises a third transistor, a fourth transistor, a second load resistor, a second tail current source and N-type transistors;
The control electrode of the third transistor receives a second negative signal in the backward synthesis circuit differential input signal, the first electrode of the third transistor is coupled with the input end of the second tail current source, and the second electrode of the third transistor is coupled with the negative output signal end in the backward synthesis circuit differential output;
The control electrode of the fourth transistor receives the second positive signal in the input signal of the backward synthesis circuit, the first electrode of the fourth transistor is coupled with the input end of the second tail current source, and the second electrode of the fourth transistor is coupled with the positive output signal end in the differential output of the backward synthesis circuit.
Further, the backward pre-load switch circuit comprises a D trigger and a charge pump;
When the pre-emphasis function is started, the D trigger outputs a high level; the high level output by the trigger D turns on the control of the charge pump to enable the charge pump to start charging;
when the charge pump charging voltage reaches the reset voltage of the D trigger, the D trigger is reset, the D trigger outputs a low level, the detection of the pre-emphasis function is restarted, and the charge pump is discharged, so that the continuous detection on whether the pre-emphasis is started or not is realized.
Further, the backward pre-emphasis switch circuit comprises at least one driving circuit, and the at least one driving circuit is used for driving the output of the D trigger so as to obtain a voltage reduction circuit control signal, a power supply selection circuit control signal and a tail current source switch control signal which are output by the backward pre-emphasis switch circuit.
The technical scheme of the invention has one or more of the following beneficial technical effects:
(1) When the backward pre-emphasis function is detected to be closed, the backward synthesis circuit can output lower common-mode voltage through the voltage-reducing circuit, and a tail current source in the backward synthesis circuit does not need to be kept on. Whereas the prior art has to keep the tail current source in the backward combining circuit on and obtain a lower output common mode voltage through the divider resistance. Compared with the prior art, the invention improves the reliability of the system.
(2) The voltage reducing circuit does not need to have strong load capacity, and the current when the voltage reducing circuit is conducted is usually in microampere magnitude, so that compared with the current (milliamp magnitude) when a tail current source in a backward synthesis circuit is started in the prior art, the voltage reducing circuit can effectively reduce the power consumption of the circuit.
(3) The invention can effectively weaken backward crosstalk during high-frequency signal transmission.
Furthermore, other advantageous effects that the present invention has will be mentioned in the specific embodiments.
Drawings
FIG. 1 is a schematic diagram of a prior art backward pre-emphasis circuit;
FIG. 2 is a schematic diagram of a prior art Gilbert circuit;
FIG. 3 is a schematic diagram of the operation of a backward combining circuit in the backward pre-emphasis circuit based on the CML structure of the present invention;
FIG. 4 is a schematic diagram of a backward combining circuit according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a backward pre-emphasis switch circuit according to an embodiment of the invention;
fig. 6 is a flow chart of a method of reducing backward crosstalk in communications according to the present invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is apparent that the described embodiments are some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
In order to clearly describe the technical solution of the embodiments of the present invention, in the embodiments of the present invention, the words "first", "second", etc. are used to distinguish the same item or similar items having substantially the same function and effect. It will be appreciated by those of skill in the art that the words "first," "second," and the like do not limit the amount and order of execution, and that the words "first," "second," and the like do not necessarily differ. Meanwhile, in the embodiments of the present invention, words such as "exemplary" or "such as" are used to mean serving as examples, illustrations or explanations. Meanwhile, the broken lines and the solid lines in the drawings of the present invention each represent a signal coupling line, only to show whether the signal coupling lines are cross-connected or not.
Numerous specific details are set forth in the following description in order to provide a better understanding of the invention. It will be understood by those skilled in the art that the present invention may be practiced without some of these specific details. In some instances, well known methods, procedures, components, and circuits have not been described in detail so as not to obscure the present invention.
The backward pre-emphasis technology utilizes the amplitude of the weakened backward signal to increase the falling edge amplitude of the current signal, and has the effect of suppressing backward crosstalk. The amplitude of the signal jump edge is reinforced in the time domain, so that the high-frequency component in the signal frequency domain has higher amplitude, and the backward pre-emphasis circuit strengthens the amplitude at the rising and falling edges on the basis of the original signal to artificially boost the amplitude of the high-frequency component in the signal frequency spectrum component so as to achieve the aim of high-frequency compensation.
Fig. 3 is a schematic diagram of the operation of a backward combining circuit in the backward pre-emphasis circuit based on the CML structure of the present invention. The invention detects whether the backward pre-emphasis function is started in real time, if so, the backward synthesis circuit adopts the power supply voltage to supply power, and all tail current sources of the backward synthesis circuit are normally started, so that the backward synthesis circuit is in a normal working state. If not, the pre-emphasis function is turned off, the backward synthesis circuit selects the first voltage V low output by the voltage-reducing circuit to supply power, all tail current sources of the backward synthesis circuit are turned off, and at the moment, the output voltage of the backward synthesis circuit is the output voltage of the voltage-reducing circuit. Therefore, when the pre-emphasis function is closed, the differential input pair tube (namely the differential input pair tube of the second branch) coupled with the output of the backward synthesis circuit in the pre-emphasis synthesis circuit is ensured to be biased to the cut-off state, and the power consumption is reduced because the first tail current source and the second tail current source in the backward synthesis circuit are kept closed.
Fig. 4 is a schematic diagram of a backward combining circuit according to an embodiment of the present invention, where the backward combining circuit is applied to a backward pre-emphasis circuit with a CML structure, and can detect whether the backward pre-emphasis function is on in real time based on a conventional backward combining circuit. The backward synthesis circuit shown in fig. 4 comprises a gilbert circuit module, a backward pre-emphasis switch circuit, a voltage reduction circuit, a power supply selection circuit and a tail current source switch control circuit.
The gilbert circuit module comprises a first branch and a second branch, wherein the first branch comprises a first differential input pair of tubes (a first transistor M 1 and a second transistor M 2), a first load resistor R 1 and a first tail current source I 1, and the second branch comprises a second differential input pair of tubes (a third transistor M 3 and a fourth transistor M 4), a second load resistor R 2 and a second tail current source I 2. Further, the first transistor M 1, the second transistor M 2, the third transistor M 3, and the fourth transistor M 4 are all N-type transistors;
In the first branch, the control electrode of the first transistor M 1 receives the first positive signal Vin1+ in the input signal of the backward combining circuit, the first electrode of the first transistor M 1 is coupled to the input end of the tail current source I 1, the second electrode of the first transistor M 1 is coupled to one end of the first load resistor R 1 and is used as the negative output signal end Vout-in the differential output of the backward combining circuit, and the other end of the first load resistor R 1 is coupled to the output of the power selecting circuit, i.e. is coupled to the node V CM.
The control electrode of the second transistor M 2 receives the first negative signal Vin 1-in the input signal of the backward combining circuit, the first electrode of the second transistor M 2 is coupled to the input end of the first tail current source I 1, the second electrode of the second transistor M 2 is coupled to one end of the second load resistor R 2 and coupled to the positive output signal terminal vout+ in the differential output of the backward combining circuit, and the other end of the second load resistor R 2 is coupled to the output of the power selecting circuit.
In the second branch, the control electrode of the third transistor M 3 receives the second negative signal Vin 2-in the input signal of the backward combining circuit, the first electrode of the third transistor M 3 is coupled to the input end of the second tail current source I 2, and the second electrode of the third transistor M 3 is coupled to the negative output signal end Vout-in the differential output of the backward combining circuit.
The control electrode of the fourth transistor M 4 receives the second positive signal Vin2+ in the input signal of the backward combining circuit, the first electrode of the fourth transistor M 4 is coupled to the input terminal of the second tail current source I 2, and the second electrode of the fourth transistor M 4 is coupled to the positive output signal terminal vout+ in the differential output of the backward combining circuit.
Optionally, in this embodiment, the first transistor M 1 to the fourth transistor M 4 are NMOS transistors, and in other embodiments, the first transistor M 1 to the fourth transistor M 4 may also be other types of transistors, such as N-type transistors, PMOS transistors, P-type transistors, and the like, and accordingly, the connection manners of other elements in the current mode driving module are correspondingly changed.
And the backward pre-emphasis switch circuit detects the on or off state of the backward pre-emphasis function in real time and generates control signals for respectively controlling the voltage-reducing circuit, the power supply selection circuit and the tail current source switch control circuit, such as the voltage-reducing circuit control signal, the power supply selection circuit control signal and the tail current source switch control circuit control signal.
When the start of the backward pre-emphasis function is detected, the backward pre-emphasis switch circuit controls the power supply selection circuit to select the power supply voltage as an output common mode point (namely the power supply voltage of the gilbert circuit module), and controls the tail current source switch control circuit to enable the first tail current source I 1 and the second tail current source I 2 to be opened, so that the backward synthesis circuit can work normally.
When the backward pre-emphasis function is detected to be closed, the backward pre-emphasis switch circuit controls the step-down circuit to work, so that a first voltage V low smaller than the power supply voltage is obtained. Meanwhile, the backward pre-emphasis switch circuit sends a control signal to the power supply selection circuit and the tail current source switch control circuit, so that the power supply selection circuit selects the output voltage of the voltage reduction circuit as an output common mode point, and the first tail current source and the second tail current source in the backward synthesis circuit are closed, and the output voltage of the backward synthesis circuit is the first voltage V low at the moment, so that the differential input pair tube of the second branch in the pre-emphasis synthesis circuit is ensured to be biased to be in an cut-off state, and meanwhile, the tail current source of the backward synthesis circuit is kept closed, so that the power consumption is further reduced.
The control end of the voltage reducing circuit is coupled with the first output end of the backward de-emphasis function detecting circuit, and reduces the power supply voltage under the control signal of the voltage reducing circuit sent by the backward de-emphasis function detecting circuit.
Optionally, the first voltage V low is less than VCC/2.
Optionally, in some class of embodiments, the step-down circuit is a low dropout linear regulator (Low Dropout Regulator, LDO). The LDO output of the low dropout linear regulator does not need to have load capacity, only generates extremely low power consumption, usually in microampere magnitude, and after receiving the control signal of the backward de-emphasis function detection circuit, the LDO starts to work to generate a first voltage V low which is far lower than the power supply voltage.
The two input ends of the power supply selection circuit are respectively coupled with the output end of the voltage reduction circuit and the power supply voltage (Volt Current Condenser, VCC), the control end of the power supply selection circuit is coupled with the second output end of the backward de-emphasis function detection circuit, and the output end of the power supply selection circuit is an output common mode point of the backward de-emphasis circuit with low power consumption.
The control end of the tail current source switch control circuit is coupled with the third output end of the backward de-emphasis function detection circuit, and the output end of the tail current source switch control circuit is coupled with the current control end of the gilbert circuit module and is used for controlling the on or off of the first tail current source I 1 and the second tail current source I 2 in the gilbert circuit module at the same time.
Fig. 5 is a schematic diagram of a backward pre-emphasis switch circuit according to an embodiment of the present invention, including a D flip-flop, an inverter, a charge pump, and a plurality of voltage drivers (i.e., a first voltage driver, a second voltage driver, a third voltage driver, and a fourth voltage driver).
The first voltage driver is coupled with the output of the secondary driving circuit and drives the output of the secondary driving circuit.
The clock input end of the D trigger is coupled with the output of the first voltage driver, the data input end of the D trigger is coupled with the power supply, the reset end of the D trigger is coupled with the output of the charge pump, and the output end of the D trigger is coupled with the control end of the charge pump.
The input end of the charge pump is coupled with the charging current source, when the D trigger outputs a high level, the charging control of the charge pump is turned on, the charge pump starts to charge, the output voltage of the charge pump rises, when the output voltage of the charge pump reaches the reset voltage of the D trigger, the D trigger is reset, and at the moment, the D trigger outputs a low level and controls the charge pump to discharge.
And an inverter for inverting the output of the D flip-flop.
The input end of the second voltage driver is coupled with the output end of the inverter, and the output end of the second voltage driver is coupled with the control signal of the voltage reducing circuit. The input end of the third voltage driver is coupled with the output end of the inverter, and the output end of the third voltage driver is coupled with the control signal of the power supply selection circuit. The input end of the fourth voltage driver is coupled with the output end of the inverter, and the output end of the fourth voltage driver is coupled with the control signal of the tail current source switch control circuit.
When the pre-emphasis function is started, the output frequency of the auxiliary circuit driving circuit is the same as that of the main circuit driving circuit, and the output of the auxiliary circuit driving circuit is input into a clock port of the D trigger after reaching full swing under the driving of the first voltage driver. The data input end of the D trigger is coupled with the power supply, and when the clock port of the D trigger receives the rising edge of the output of the secondary driving circuit, the output of the D trigger is changed from low level to high level. At this time, the high level of the D flip-flop output controls the charge pump to start charging. After the charge pump is charged for a certain time, the output voltage of the charge pump reaches the reset voltage of the D trigger, so that the D trigger is reset, the output of the secondary driving circuit is detected again, and the charge pump is discharged, thereby realizing continuous detection on whether the pre-emphasis is started or not.
When the pre-emphasis function is closed, the tail current source of the auxiliary circuit driving circuit is in an off state, the output of the auxiliary circuit driving circuit is always high level, the D trigger can not detect rising edges all the time, the output is always high level after passing through the phase inverter, and the output can not be turned over until the pre-emphasis function is started. And finally, driving the D trigger to pass through the output level of the inverter by the second voltage driver to the fourth voltage driver to respectively serve as control signals of the step-down circuit, the power supply selection circuit and the tail current source switch control circuit.
Since the charge pump only provides a reset signal to the D flip-flop, no load carrying capability is required and a smaller capacitance and charging current can be used, e.g. the current can be less than 100uA.
Fig. 6 is a flow chart of a method of reducing backward crosstalk in communications according to the present invention. The invention also discloses a method for reducing backward crosstalk in communication, which comprises the following steps:
Detecting the on or off state of the backward pre-emphasis function;
If the backward pre-emphasis function is started, the power supply voltage is selected as an output common mode point of the backward synthesis circuit, and a first tail current source and a second tail current source in the backward synthesis circuit are opened to keep the backward synthesis circuit working normally;
If the backward pre-emphasis function is closed, selecting a first voltage V low as an output common mode point of the backward synthesis circuit, and closing a first tail current source and a second tail current source in the backward synthesis circuit;
Wherein the first voltage V low is less than one-half of the supply voltage.
Further, the first voltage V low is obtained by stepping down the power supply voltage.
Further, the current signal falling edge amplitude is increased by reducing the amplitude of the backward signal to suppress backward crosstalk.
The foregoing is merely illustrative of the present invention, and the present invention is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims (10)

1. A method for reducing backward crosstalk in communications, applied to a backward combining circuit, comprising the steps of:
Detecting the on or off state of the backward pre-emphasis function;
If the backward pre-emphasis function is started, selecting a power supply voltage as an output common mode point of a backward synthesis circuit, and enabling a first tail current source and a second tail current source in the backward synthesis circuit to be opened so as to keep the backward synthesis circuit to work normally;
If the backward pre-emphasis function is closed, selecting the first voltage as an output common mode point of the backward synthesis circuit, and closing a first tail current source and a second tail current source in the backward synthesis circuit;
wherein the first voltage is less than one half of a supply voltage.
2. The method for reducing backward crosstalk in communications according to claim 1, characterized in that:
The first voltage is obtained by stepping down the power supply voltage.
3. A method of reducing backward crosstalk in communications according to claim 1 or 2, characterised in that:
The current signal falling edge amplitude is increased by reducing the amplitude of the backward signal to suppress backward crosstalk.
4. A backward combining circuit applied to a backward pre-emphasis circuit of a current mode structure, the backward combining circuit being configured to combine two differential input signals, the backward combining circuit comprising:
The backward pre-emphasis switch circuit detects the on or off of the backward pre-emphasis function in real time to generate a voltage reduction circuit control signal, a power supply selection circuit control signal and a tail current source switch control signal;
the step-down circuit is used for step-down the power supply voltage under the action of a step-down circuit control signal output by the backward pre-emphasis switching circuit to obtain a first voltage;
the power supply selection circuit is used for selecting a power supply voltage or a first voltage output by the voltage reduction circuit as a power supply voltage of the Gilbert circuit module under the action of a power supply selection circuit control signal output by the backward pre-emphasis switching circuit;
the backward pre-emphasis switch circuit is used for controlling the tail current source switch control circuit under the action of a tail current source switch control circuit control signal output by the backward pre-emphasis switch circuit so as to control the on or off of a first tail current source and a second tail current source in the Gilbert circuit module;
the two paths of differential input signals of the backward synthesis circuit are the inputs of the Gilbert circuit module, and the differential output of the Gilbert circuit module is the output of the backward synthesis circuit;
wherein the first voltage is less than one half of a supply voltage.
5. The backward synthesis circuit of claim 4, wherein:
The backward pre-emphasis circuit increases the current signal falling edge amplitude by reducing the backward signal amplitude to suppress backward crosstalk.
6. The backward synthesis circuit of claim 5, wherein:
If the backward pre-emphasis function is detected to be started, the step-down circuit does not work, the backward pre-emphasis switch circuit controls the power supply selection circuit to select the power supply voltage as the power supply voltage of the Gilbert circuit module, and controls the tail current source switch control circuit to enable the first tail current source and the second tail current source in the Gilbert circuit module to be conducted so as to keep the backward synthesis circuit to work normally;
When the backward pre-emphasis function is detected to be closed, the backward pre-emphasis switch circuit controls the step-down circuit to work, controls the power supply selection circuit to select the first voltage as the power supply voltage of the Gilbert circuit module, and controls the tail current source switch control circuit to enable the first tail current source and the second tail current source in the Gilbert circuit module to be closed.
7. A backward combining circuit as claimed in any one of claims 4 to 6, wherein:
The step-down circuit is a low dropout linear voltage regulator.
8. A backward combining circuit as claimed in any one of claims 4 to 6, wherein:
the gilbert circuit module comprises a first branch and a second branch;
The first branch circuit comprises a first transistor, a second transistor, a first load resistor, a first tail current source and N-type transistors;
the control electrode of the first transistor is coupled with a first positive signal in the input signal of the backward synthesis circuit, the first electrode of the first transistor is coupled with the input end of the first tail current source, the second electrode of the first transistor is coupled with one end of the first load resistor and is used as a negative output signal end in the differential output of the backward synthesis circuit, and the other end of the first load resistor is coupled with the output of the power supply selection circuit;
The control electrode of the second transistor receives a first negative signal in the input signal of the backward synthesis circuit, the first electrode of the second transistor is coupled with the input end of the first tail current source, the second electrode of the second transistor is coupled with one end of the second load resistor and is coupled with the positive output signal end of the backward synthesis circuit, and the other end of the second load resistor is coupled with the output of the power supply selection circuit;
the second branch circuit comprises a third transistor, a fourth transistor, a second load resistor, a second tail current source and N-type transistors;
The control electrode of the third transistor receives a second negative signal in the backward synthesis circuit differential input signal, the first electrode of the third transistor is coupled with the input end of the second tail current source, and the second electrode of the third transistor is coupled with the negative output signal end in the backward synthesis circuit differential output;
The control electrode of the fourth transistor receives the second positive signal in the input signal of the backward synthesis circuit, the first electrode of the fourth transistor is coupled with the input end of the second tail current source, and the second electrode of the fourth transistor is coupled with the positive output signal end in the differential output of the backward synthesis circuit.
9. A backward combining circuit as claimed in any one of claims 4 to 6, wherein:
the backward pre-emphasis switch circuit comprises a D trigger and a charge pump;
When the pre-emphasis function is started, the D trigger outputs a high level; the high level output by the trigger D turns on the control of the charge pump to enable the charge pump to start charging;
when the charge pump charging voltage reaches the reset voltage of the D trigger, the D trigger is reset, the D trigger outputs a low level, the detection of the pre-emphasis function is restarted, and the charge pump is discharged, so that the continuous detection on whether the pre-emphasis is started or not is realized.
10. The backward synthesis circuit of claim 9, wherein:
The backward pre-emphasis switch circuit comprises at least one driving circuit, and the at least one driving circuit is used for driving the output of the D trigger so as to obtain a voltage reduction circuit control signal, a power supply selection circuit control signal and a tail current source switch control signal which are output by the backward pre-emphasis switch circuit.
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