CN118041297A - Continuous time linear equalizer circuit with multiple feedback paths - Google Patents

Continuous time linear equalizer circuit with multiple feedback paths Download PDF

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Publication number
CN118041297A
CN118041297A CN202410188272.2A CN202410188272A CN118041297A CN 118041297 A CN118041297 A CN 118041297A CN 202410188272 A CN202410188272 A CN 202410188272A CN 118041297 A CN118041297 A CN 118041297A
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resistor
capacitor
feedback
nmos tube
circuit
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刘继业
屈帅
潘钰媛
张涛
牛世琪
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Beijing Microelectronic Technology Institute
Mxtronics Corp
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Beijing Microelectronic Technology Institute
Mxtronics Corp
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00—Networks using active elements
    • H03H11/02—Multiple-port networks
    • H03H11/32—Networks for transforming balanced signals into unbalanced signals and vice versa, e.g. baluns
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/34—Negative-feedback-circuit arrangements with or without positive feedback

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Abstract

The invention provides a continuous time linear equalizer circuit with multiple feedback paths, which comprises a differential amplifying circuit and a multiple path negative feedback circuit; the differential amplifying circuit amplifies the received external differential input signal and generates a current output signal which is sent to the multichannel negative feedback circuit; the multi-channel negative feedback circuit receives a current output signal of the differential amplifying circuit, generates a negative feedback voltage signal and outputs the negative feedback voltage signal to the differential amplifying circuit; meanwhile, the multi-channel negative feedback circuit also receives an external control signal, and adjusts the negative feedback voltage sent to the differential amplifying circuit in real time according to the external control signal; the differential amplifying circuit amplifies each frequency component of the external differential input signal according to the received negative feedback voltage signal, and generates and outputs a differential output voltage signal. The invention can flexibly adjust the frequency response of the equalizer, so that the equalizer circuit can better compensate the line loss of each frequency component of the communication signal, and the compensation effect is improved.

Description

一种多反馈通路的连续时间线性均衡器电路A continuous-time linear equalizer circuit with multiple feedback paths

技术领域Technical Field

本发明涉及一种连续时间线性均衡器模拟电路，属于集成电路设计领域。The invention relates to a continuous time linear equalizer analog circuit, belonging to the field of integrated circuit design.

背景技术Background technique

高速串行通信中存在信号传输损耗，信号.包含不同的频率分量，高频分量在传输线缆上的损耗大，低频分量损耗小，因此在接收端需要均衡电路对高低频信号提供不同的放大系数，补偿信号损耗。传统的连续时间线性均衡器电路只有低频、高频两个反馈回路，频率响应固化，无法灵活调整频率响应曲线，难以应对不同场景的频率衰减情况。There is signal transmission loss in high-speed serial communication. The signal contains different frequency components. The high-frequency component has a large loss on the transmission cable, while the low-frequency component has a small loss. Therefore, the equalization circuit is required at the receiving end to provide different amplification factors for high and low frequency signals to compensate for signal loss. The traditional continuous-time linear equalizer circuit has only two feedback loops, low frequency and high frequency. The frequency response is fixed and the frequency response curve cannot be flexibly adjusted. It is difficult to cope with frequency attenuation in different scenarios.

发明内容Summary of the invention

本发明的技术解决问题为：克服现有技术的不足，提供一种多反馈通路的连续时间线性均衡器电路，改善传统连续时间线性均衡器的反馈电路，使其频率响应曲线更加平滑；同时增加反馈电路的可调参数，灵活调整均衡器的响应曲线以应对不同的频率衰减情况，提高信号补偿效果。The technical problem solved by the present invention is: to overcome the shortcomings of the prior art, to provide a continuous-time linear equalizer circuit with multiple feedback paths, to improve the feedback circuit of the traditional continuous-time linear equalizer, and to make its frequency response curve smoother; at the same time, to increase the adjustable parameters of the feedback circuit, to flexibly adjust the response curve of the equalizer to cope with different frequency attenuation conditions, and to improve the signal compensation effect.

本发明的技术方案为：一种多反馈通路的连续时间线性均衡器电路，包括差分放大电路和多通路负反馈电路；其中：The technical solution of the present invention is: a continuous time linear equalizer circuit with multiple feedback paths, comprising a differential amplifier circuit and a multi-path negative feedback circuit; wherein:

差分放大电路对接收的外部差分输入信号进行放大并产生电流输出信号送至多通路负反馈电路；The differential amplifier circuit amplifies the received external differential input signal and generates a current output signal which is sent to the multi-channel negative feedback circuit;

多通路负反馈电路接收差分放大电路的电流输出信号，产生负反馈电压信号，并输出到差分放大电路中；同时，多通路负反馈电路还接收外部控制信号，根据外部控制信号实时调节发送到差分放大电路中的负反馈电压；The multi-channel negative feedback circuit receives the current output signal of the differential amplifier circuit, generates a negative feedback voltage signal, and outputs it to the differential amplifier circuit; at the same time, the multi-channel negative feedback circuit also receives an external control signal, and adjusts the negative feedback voltage sent to the differential amplifier circuit in real time according to the external control signal;

差分放大电路再根据接收的负反馈电压信号对外部差分输入信号各频率分量进行放大，产生差分输出电压信号并输出。The differential amplifier circuit then amplifies each frequency component of the external differential input signal according to the received negative feedback voltage signal, generates a differential output voltage signal and outputs it.

所述差分放大电路包括第八电阻、第九电阻、第一NMOS管、第二NMOS管、第三NMOS管和第四NMOS管；第八电阻、第九电阻正极均连接电源VCC；第八电阻负极和第一NMOS管漏极连接在一起，作为差分放大电路的反相输出端Von；第九电阻负极和第二NMOS管漏极连接在一起，作为差分放大电路的同相输出端Vop；第一NMOS管栅极连接外部差分输入信号的同向端Vinp；第二NMOS管栅极连接外部差分输入信号的反相端Vinn；第一NMOS管源极和第三NMOS管漏极连接，形成差分放大电路反馈点VF1；第二NMOS管源极、第四NMOS管漏极连接，形成差分放大电路反馈点VF2；第三NMOS管栅极、第四NMOS管栅极分别连接外部偏置电压信号；第三NMOS管源极、第四NMOS管源极分别连接地GND。The differential amplifier circuit comprises an eighth resistor, a ninth resistor, a first NMOS tube, a second NMOS tube, a third NMOS tube and a fourth NMOS tube; the positive electrodes of the eighth resistor and the ninth resistor are both connected to the power supply VCC; the negative electrode of the eighth resistor and the drain of the first NMOS tube are connected together as the inverting output terminal Von of the differential amplifier circuit; the negative electrode of the ninth resistor and the drain of the second NMOS tube are connected together as the inverting output terminal Vop of the differential amplifier circuit; the gate of the first NMOS tube is connected to the inverting terminal Vinp of the external differential input signal; the gate of the second NMOS tube is connected to the inverting terminal Vinn of the external differential input signal; the source of the first NMOS tube and the drain of the third NMOS tube are connected to form a feedback point VF1 of the differential amplifier circuit; the source of the second NMOS tube and the drain of the fourth NMOS tube are connected to form a feedback point VF2 of the differential amplifier circuit; the gate of the third NMOS tube and the gate of the fourth NMOS tube are respectively connected to the external bias voltage signal; the source of the third NMOS tube and the source of the fourth NMOS tube are respectively connected to the ground GND.

第一NMOS管、第二NMOS管接收外部差分输入电压信号和负反馈电压信号，将外部差分输入电压信号转化为电流信号；电流信号流过第八电阻、第九电阻转化为差分输出电压信号，完成对差分输入信号的放大；同时，电流信号经过反馈点VF1、VF2流入多通路负反馈电路，为多通路负反馈电路提供输入电流信号；第三NMOS管、第四NMOS管的栅极连接外部偏置电压，形成电流源，为差分放大电路提供偏置电流。The first NMOS tube and the second NMOS tube receive external differential input voltage signals and negative feedback voltage signals, and convert the external differential input voltage signals into current signals; the current signals flow through the eighth resistor and the ninth resistor and are converted into differential output voltage signals, thereby completing the amplification of the differential input signals; at the same time, the current signals flow into the multi-channel negative feedback circuit through the feedback points VF1 and VF2, thereby providing input current signals for the multi-channel negative feedback circuit; the gates of the third NMOS tube and the fourth NMOS tube are connected to the external bias voltage, thereby forming a current source, thereby providing bias current for the differential amplifier circuit.

所述多通路负反馈电路包括第一电阻、第二电阻、第三电阻、第四电阻、第五电阻、第六电阻、第七电阻、第一电容、第二电容、第三电容、第四电容、第五电容、第六电容、第五NMOS管、第六NMOS管、第七NMOS管；The multi-path negative feedback circuit comprises a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a fifth NMOS transistor, a sixth NMOS transistor, and a seventh NMOS transistor;

第一电阻正极、第五NMOS管漏极、第四电容正极、第五电容正极、第六电容正极分别连接差分放大电路反馈点VF1；第三电阻负极、第四电阻负极、第五电阻负极、第三电容负极、第七NMOS管源极分别差分放大电路反馈点VF2；第二电阻正极连接第一电阻负极和第五NMOS管漏极；第二电阻负极连接第三电阻正极和第五NMOS管源极；第五NMOS管栅极连接外部低频反馈控制电压信号VL；第六NMOS管栅极、第七NMOS管栅极分别对应连接外部高频反馈控制电压信号VH1、VH2；第六NMOS管源极连接第一电容、第二电容、第三电容的正极；第一电容负极连接第四电阻正极；第二电容负极连接第五电阻正极；第四电容负极连接第六电阻正极；第五电容负极连接第七电阻正极；第六电阻负极、第七电阻负极、第六电容负极分别连接第七NMOS管漏极。The positive electrode of the first resistor, the drain of the fifth NMOS tube, the positive electrode of the fourth capacitor, the positive electrode of the fifth capacitor, and the positive electrode of the sixth capacitor are respectively connected to the feedback point VF1 of the differential amplifier circuit; the negative electrode of the third resistor, the negative electrode of the fourth resistor, the negative electrode of the fifth resistor, the negative electrode of the third capacitor, and the source electrode of the seventh NMOS tube are respectively connected to the feedback point VF2 of the differential amplifier circuit; the positive electrode of the second resistor is connected to the negative electrode of the first resistor and the drain of the fifth NMOS tube; the negative electrode of the second resistor is connected to the positive electrode of the third resistor and the source electrode of the fifth NMOS tube; the gate electrode of the fifth NMOS tube is connected to the external low-frequency feedback control voltage signal V L ; the gate electrode of the sixth NMOS tube and the gate electrode of the seventh NMOS tube are respectively connected to the external high-frequency feedback control voltage signals V H1 and V H2 ; the source electrode of the sixth NMOS tube is connected to the positive electrodes of the first capacitor, the second capacitor, and the third capacitor; the negative electrode of the first capacitor is connected to the positive electrode of the fourth resistor; the negative electrode of the second capacitor is connected to the positive electrode of the fifth resistor; the negative electrode of the fourth capacitor is connected to the positive electrode of the sixth resistor; the negative electrode of the fifth capacitor is connected to the positive electrode of the seventh resistor; the negative electrode of the sixth resistor, the negative electrode of the seventh resistor, and the negative electrode of the sixth capacitor are respectively connected to the drain of the seventh NMOS tube.

负反馈电路接收差分放大电路发送来的电流信号，在反馈点VF1、VF2产生负反馈电压信号，送回差分放大电路；负反馈电路包含多条反馈通路，第一电阻、第二电阻、第三电阻、第五NMOS管构成低频反馈通路，第四电阻、第一电容构成第一条高频反馈通路，第五电阻、第二电容、构成第二条高频反馈通路，第三电容构成第三条高频反馈通路，第六电阻、第四电容构成第四条高频反馈通路，第七电阻、第五电容构成第五条反馈通路，第六电容构成第六条高频反馈通路；外部控制信号VL控制第五NMOS管的导通电阻大小，从而调整低频反馈通路的整体阻值，进而调节低频增益；外部控制信号VH1控制第六NMOS管导通或关断，从而决定第一条、第二条、第三条高频反馈通路是否接入反馈环路中；外部控制信号VH2控制第七NMOS管导通或关断，从而决定第四条、第五条、第六条高频反馈通路是否接入反馈环路中；通过控制信号VH1、VH2控制高频反馈通路是否导通，进而调节高频增益。The negative feedback circuit receives the current signal sent by the differential amplifier circuit, generates a negative feedback voltage signal at feedback points VF1 and VF2, and sends it back to the differential amplifier circuit; the negative feedback circuit includes multiple feedback paths, the first resistor, the second resistor, the third resistor, and the fifth NMOS tube constitute a low-frequency feedback path, the fourth resistor and the first capacitor constitute a first high-frequency feedback path, the fifth resistor and the second capacitor constitute a second high-frequency feedback path, the third capacitor constitutes a third high-frequency feedback path, the sixth resistor and the fourth capacitor constitute a fourth high-frequency feedback path, the seventh resistor and the fifth capacitor constitute a fifth feedback path, and the sixth capacitor constitutes a sixth high-frequency feedback path; the external control signal V L controls the on-resistance of the fifth NMOS tube, thereby adjusting the overall resistance of the low-frequency feedback path, and then adjusting the low-frequency gain; the external control signal V H1 controls the sixth NMOS tube to turn on or off, thereby determining whether the first, second, and third high-frequency feedback paths are connected to the feedback loop; the external control signal V H2 controls the seventh NMOS tube to turn on or off, thereby determining whether the fourth, fifth, and sixth high-frequency feedback paths are connected to the feedback loop; through the control signals V H1 , V H2 controls whether the high-frequency feedback path is turned on, thereby adjusting the high-frequency gain.

所述第一电阻和第三电阻的取值相同。The first resistor and the third resistor have the same value.

所述第六NMOS管和第七NMOS管尺寸相同，第四电阻、第一电容、第五电阻、第二电容、第三电容分别对应与第六电阻、第四电容、第七电阻、第五电容、第六电容的取值相同。The sixth NMOS tube and the seventh NMOS tube have the same size, and the fourth resistor, the first capacitor, the fifth resistor, the second capacitor, and the third capacitor have the same values as the sixth resistor, the fourth capacitor, the seventh resistor, the fifth capacitor, and the sixth capacitor, respectively.

所述第一电容、第二电容、第三电容取值不同，第四电容、第五电容、第六电容的取值不同。The first capacitor, the second capacitor, and the third capacitor have different values, and the fourth capacitor, the fifth capacitor, and the sixth capacitor have different values.

本发明相对现有技术的优点在于：本发明提供一种多反馈通路的连续时间线性均衡器电路，用于补偿高速串行通信收发系统中信号传输损耗，对接收信号实现整形。使用多通路负反馈电路调整均衡器的频率响应，反馈电路提供多条反馈路径，具有多个可调器件，各个反馈路径具有不同的频率增益调整效果，改善了传统连续时间线性均衡器的增益曲线，实现均衡器电路频率响应曲线的灵活可调，具有更好的信号补偿效果。The advantages of the present invention over the prior art are: the present invention provides a continuous time linear equalizer circuit with multiple feedback paths, which is used to compensate for signal transmission loss in a high-speed serial communication transceiver system and realize shaping of the received signal. A multi-path negative feedback circuit is used to adjust the frequency response of the equalizer, and the feedback circuit provides multiple feedback paths and has multiple adjustable devices. Each feedback path has a different frequency gain adjustment effect, which improves the gain curve of the traditional continuous time linear equalizer, realizes flexible adjustment of the frequency response curve of the equalizer circuit, and has a better signal compensation effect.

附图说明BRIEF DESCRIPTION OF THE DRAWINGS

图1为本发明多反馈通路的连续时间线性均衡器电路结构图。FIG. 1 is a circuit diagram of a continuous-time linear equalizer with multiple feedback paths according to the present invention.

图2为差分放大电路。Figure 2 is a differential amplifier circuit.

图3为多通路负反馈电路。Figure 3 is a multi-path negative feedback circuit.

具体实施方式Detailed ways

本发明一种多反馈通路的连续时间线性均衡器电路，包括差分放大电路、多通路负反馈电路；差分放大电路接收并放大输入信号，多通路负反馈电路接收外部控制信号，调整差分放大电路对各频率信号的增益大小，反馈电路提供多条反馈路径，各个反馈路径具有不同的频率增益调整效果，实现均衡器电路频率响应曲线的灵活可调。The present invention discloses a continuous time linear equalizer circuit with multiple feedback paths, comprising a differential amplifier circuit and a multi-path negative feedback circuit; the differential amplifier circuit receives and amplifies an input signal, the multi-path negative feedback circuit receives an external control signal, and adjusts the gain of the differential amplifier circuit for each frequency signal; the feedback circuit provides multiple feedback paths, each feedback path has a different frequency gain adjustment effect, and realizes flexible and adjustable frequency response curve of the equalizer circuit.

所述差分放大电路包括第八电阻101、第九电阻102、第一NMOS管103、第二NMOS管104、第三NMOS管105和第四NMOS管106；第八电阻101、第九电阻102正极均连接电源VCC；第八电阻101负极和第一NMOS管103漏极连接在一起，作为差分放大电路的反相输出端Von；第九电阻102负极和第二NMOS管104漏极连接在一起，作为差分放大电路的同相输出端Vop；第一NMOS管103栅极连接外部差分输入信号的同向端Vinp；第二NMOS管104栅极连接外部差分输入信号的反相端Vinn；第一NMOS管103源极和第三NMOS管105漏极连接，形成差分放大电路反馈点VF1；第二NMOS管104源极、第四NMOS管106漏极连接，形成差分放大电路反馈点VF2；第三NMOS管105栅极、第四NMOS管106栅极分别连接外部偏置电压信号；第三NMOS管105源极、第四NMOS管106源极分别连接地GND。The differential amplifier circuit includes an eighth resistor 101, a ninth resistor 102, a first NMOS transistor 103, a second NMOS transistor 104, a third NMOS transistor 105 and a fourth NMOS transistor 106; the positive electrodes of the eighth resistor 101 and the ninth resistor 102 are both connected to the power supply VCC; the negative electrode of the eighth resistor 101 and the drain of the first NMOS transistor 103 are connected together as the inverting output terminal Von of the differential amplifier circuit; the negative electrode of the ninth resistor 102 and the drain of the second NMOS transistor 104 are connected together as the inverting output terminal Vop of the differential amplifier circuit; the gate of the first NMOS transistor 103 is connected to the external The same-direction end Vinp of the differential input signal; the gate of the second NMOS tube 104 is connected to the inverting end Vinn of the external differential input signal; the source of the first NMOS tube 103 and the drain of the third NMOS tube 105 are connected to form a differential amplifier circuit feedback point VF1; the source of the second NMOS tube 104 and the drain of the fourth NMOS tube 106 are connected to form a differential amplifier circuit feedback point VF2; the gate of the third NMOS tube 105 and the gate of the fourth NMOS tube 106 are respectively connected to the external bias voltage signal; the source of the third NMOS tube 105 and the source of the fourth NMOS tube 106 are respectively connected to the ground GND.

第一NMOS管103、第二NMOS管104接收外部差分输入电压信号和负反馈电压信号，将外部差分输入电压信号转化为电流信号；电流信号流过第八电阻101、第九电阻102转化为差分输出电压信号，完成对差分输入信号的放大；同时，电流信号经过反馈点VF1、VF2流入多通路负反馈电路，为多通路负反馈电路提供输入电流信号；第三NMOS管105、第四NMOS管106的栅极连接外部偏置电压，形成电流源，为差分放大电路提供偏置电流。The first NMOS tube 103 and the second NMOS tube 104 receive the external differential input voltage signal and the negative feedback voltage signal, and convert the external differential input voltage signal into a current signal; the current signal flows through the eighth resistor 101 and the ninth resistor 102 and is converted into a differential output voltage signal, thereby completing the amplification of the differential input signal; at the same time, the current signal flows into the multi-channel negative feedback circuit through the feedback points VF1 and VF2, thereby providing an input current signal for the multi-channel negative feedback circuit; the gates of the third NMOS tube 105 and the fourth NMOS tube 106 are connected to the external bias voltage to form a current source, thereby providing a bias current for the differential amplifier circuit.

所述多通路负反馈电路包括第一电阻201、第二电阻202、第三电阻203、第四电阻204、第五电阻205、第六电阻206、第七电阻207、第一电容208、第二电容209、第三电容210、第四电容211、第五电容212、第六电容213、第五NMOS管214、第六NMOS管215、第七NMOS管216；The multi-path negative feedback circuit includes a first resistor 201, a second resistor 202, a third resistor 203, a fourth resistor 204, a fifth resistor 205, a sixth resistor 206, a seventh resistor 207, a first capacitor 208, a second capacitor 209, a third capacitor 210, a fourth capacitor 211, a fifth capacitor 212, a sixth capacitor 213, a fifth NMOS transistor 214, a sixth NMOS transistor 215, and a seventh NMOS transistor 216;

第一电阻201正极、第五NMOS管214漏极、第四电容211正极、第五电容212正极、第六电容213正极分别连接差分放大电路反馈点VF1；第三电阻203负极、第四电阻204负极、第五电阻205负极、第三电容210负极、第七NMOS管216源极分别差分放大电路反馈点VF2；第二电阻202正极连接第一电阻201负极和第五NMOS管214漏极；第二电阻202负极连接第三电阻203正极和第五NMOS管214源极；第五NMOS管214栅极连接外部低频反馈控制电压信号VL；第六NMOS管215栅极、第七NMOS管216栅极分别对应连接外部高频反馈控制电压信号VH1、VH2；第六NMOS管215源极连接第一电容208、第二电容209、第三电容210的正极；第一电容208负极连接第四电阻204正极；第二电容209负极连接第五电阻205正极；第四电容211负极连接第六电阻206正极；第五电容212负极连接第七电阻207正极；第六电阻206负极、第七电阻207负极、第六电容213负极分别连接第七NMOS管216漏极。The positive electrode of the first resistor 201, the drain of the fifth NMOS tube 214, the positive electrode of the fourth capacitor 211, the positive electrode of the fifth capacitor 212, and the positive electrode of the sixth capacitor 213 are respectively connected to the differential amplifier circuit feedback point VF1; the negative electrode of the third resistor 203, the negative electrode of the fourth resistor 204, the negative electrode of the fifth resistor 205, the negative electrode of the third capacitor 210, and the source of the seventh NMOS tube 216 are respectively connected to the differential amplifier circuit feedback point VF2; the positive electrode of the second resistor 202 is connected to the negative electrode of the first resistor 201 and the drain of the fifth NMOS tube 214; the negative electrode of the second resistor 202 is connected to the positive electrode of the third resistor 203 and the source of the fifth NMOS tube 214; the gate of the fifth NMOS tube 214 is connected to the external low-frequency feedback control voltage signal V L ; the gate of the sixth NMOS tube 215 and the gate of the seventh NMOS tube 216 are respectively connected to the external high-frequency feedback control voltage signals V H1 and V H2 The source of the sixth NMOS tube 215 is connected to the positive electrodes of the first capacitor 208, the second capacitor 209 and the third capacitor 210; the negative electrode of the first capacitor 208 is connected to the positive electrode of the fourth resistor 204; the negative electrode of the second capacitor 209 is connected to the positive electrode of the fifth resistor 205; the negative electrode of the fourth capacitor 211 is connected to the positive electrode of the sixth resistor 206; the negative electrode of the fifth capacitor 212 is connected to the positive electrode of the seventh resistor 207; the negative electrode of the sixth resistor 206, the negative electrode of the seventh resistor 207 and the negative electrode of the sixth capacitor 213 are respectively connected to the drain of the seventh NMOS tube 216.

负反馈电路接收差分放大电路发送来的电流信号，在反馈点VF1、VF2产生负反馈电压信号，送回差分放大电路；负反馈电路包含多条反馈通路，第一电阻201、第二电阻202、第三电阻203、第五NMOS管214构成低频反馈通路，第四电阻204、第一电容208构成第一条高频反馈通路，第五电阻205、第二电容209、构成第二条高频反馈通路，第三电容210构成第三条高频反馈通路，第六电阻206、第四电容211构成第四条高频反馈通路，第七电阻207、第五电容212构成第五条反馈通路，第六电容213构成第六条高频反馈通路；外部控制信号VL控制第五NMOS管214的导通电阻大小，从而调整低频反馈通路的整体阻值，进而调节低频增益；外部控制信号VH1控制第六NMOS管215导通或关断，从而决定第一条、第二条、第三条高频反馈通路是否接入反馈环路中；外部控制信号VH2控制第七NMOS管216导通或关断，从而决定第四条、第五条、第六条高频反馈通路是否接入反馈环路中；通过控制信号VH1、VH2控制高频反馈通路是否导通，进而调节高频增益。The negative feedback circuit receives the current signal sent by the differential amplifier circuit, generates a negative feedback voltage signal at feedback points VF1 and VF2, and sends it back to the differential amplifier circuit; the negative feedback circuit includes multiple feedback paths, the first resistor 201, the second resistor 202, the third resistor 203, and the fifth NMOS tube 214 constitute a low-frequency feedback path, the fourth resistor 204 and the first capacitor 208 constitute a first high-frequency feedback path, the fifth resistor 205, the second capacitor 209, constitute a second high-frequency feedback path, the third capacitor 210 constitutes a third high-frequency feedback path, the sixth resistor 206 and the fourth capacitor 211 constitute a fourth high-frequency feedback path, the seventh resistor 207 and the fifth capacitor 212 constitute a fifth feedback path, and the sixth capacitor 213 constitutes a sixth high-frequency feedback path; the external control signal V L controls the on-resistance of the fifth NMOS tube 214, thereby adjusting the overall resistance of the low-frequency feedback path, and then adjusting the low-frequency gain; the external control signal V H1 controls the sixth NMOS tube 215 to be turned on or off, thereby determining whether the first, second, and third high-frequency feedback paths are connected to the feedback loop; the external control signal V H2 controls the seventh NMOS tube 216 to be turned on or off, thereby determining whether the fourth, fifth, and sixth high-frequency feedback paths are connected to the feedback loop; the high-frequency feedback paths are controlled by the control signals V H1 and V H2 to be turned on or off, thereby adjusting the high-frequency gain.

所述第一电阻201和第三电阻203的取值相同。The first resistor 201 and the third resistor 203 have the same value.

所述第六NMOS管215和第七NMOS管216尺寸相同，第四电阻204、第一电容208、第五电阻205、第二电容209、第三电容210分别对应与第六电阻206、第四电容211、第七电阻207、第五电容212、第六电容213的取值相同。The sixth NMOS tube 215 and the seventh NMOS tube 216 have the same size, and the fourth resistor 204, the first capacitor 208, the fifth resistor 205, the second capacitor 209, and the third capacitor 210 have the same values as the sixth resistor 206, the fourth capacitor 211, the seventh resistor 207, the fifth capacitor 212, and the sixth capacitor 213, respectively.

所述第一电容208、第二电容209、第三电容210取值不同，第四电容211、第五电容212、第六电容213的取值不同。The first capacitor 208 , the second capacitor 209 , and the third capacitor 210 have different values, and the fourth capacitor 211 , the fifth capacitor 212 , and the sixth capacitor 213 have different values.

下面结合附图和具体实施方式对本发明进行详细说明。The present invention is described in detail below with reference to the accompanying drawings and specific embodiments.

本发明为一种多反馈通路的连续时间线性均衡器电路，电路结构图如图1所示，为本发明的总体电路图，即本发明的基本形式，它由差分放大电路、多通路负反馈电路两部分组成。差分放大电路接收并放大输入信号，多通路负反馈电路接收外部控制信号，调整差分放大电路对各频率信号的增益大小，反馈电路提供多条反馈路径，各个反馈路径具有不同的频率增益调整效果，使均衡器能够对信号进行合适的高频和低频补偿。The present invention is a continuous time linear equalizer circuit with multiple feedback paths. The circuit structure diagram is shown in FIG1, which is the overall circuit diagram of the present invention, that is, the basic form of the present invention. It consists of two parts: a differential amplifier circuit and a multi-path negative feedback circuit. The differential amplifier circuit receives and amplifies the input signal, the multi-path negative feedback circuit receives an external control signal, and adjusts the gain of the differential amplifier circuit to each frequency signal. The feedback circuit provides multiple feedback paths, and each feedback path has a different frequency gain adjustment effect, so that the equalizer can perform appropriate high-frequency and low-frequency compensation on the signal.

图2为差分放大电路。第一NMOS管103和第二NMOS管104接收输入信号，配合第八电阻101和第九电阻102对信号进行放大。第三NMOS管105和第四NMOS管106栅极连接外部偏置电压信号，为差分电路提供偏置电流。Figure 2 is a differential amplifier circuit. The first NMOS transistor 103 and the second NMOS transistor 104 receive input signals and amplify the signals in cooperation with the eighth resistor 101 and the ninth resistor 102. The gates of the third NMOS transistor 105 and the fourth NMOS transistor 106 are connected to external bias voltage signals to provide bias current for the differential circuit.

图3为多通路负反馈电路。反馈电路感应差分放大电路的电流信号，产生反馈电压信号，调整增益曲线。第一电阻201、第二电阻202、第三电阻203、第五NMOS管214构成低频反馈通路，第四电阻204、第一电容208、第五电阻205、第二电容209、第三电容210、第六电阻206、第四电容211、第七电阻207、第五电容212、第六电容213构成了6条高频反馈通路。第五NMOS管214作为低频增益控制器件，根据外部控制信号VL的大小，调节均衡器的低频增益。控制信号VL越大，低频反馈通路的阻值越小，均衡器的低频增益越大。第六NMOS管215、第七NMOS管216作为高频增益控制器件，根据外部控制信号VH1、VH2的大小，调节均衡器的高频增益。当控制信号VH1、VH2为高电压时，第六NMOS管215、第七NMOS管216控制多条高频反馈通路导通，增大均衡器的高频增益，否则高频反馈通路关断，减小均衡器的高频增益。多条高频反馈通路并联使用，使均衡器的频率响应曲线更加平滑。高频反馈通路中各个电容、电阻的大小都会影响均衡器的频率特性，可以根据具体应用的增益补偿需求，设计各个电容、电阻参数，灵活调整均衡器的频率响应曲线。FIG3 is a multi-channel negative feedback circuit. The feedback circuit senses the current signal of the differential amplifier circuit, generates a feedback voltage signal, and adjusts the gain curve. The first resistor 201, the second resistor 202, the third resistor 203, and the fifth NMOS tube 214 constitute a low-frequency feedback path, and the fourth resistor 204, the first capacitor 208, the fifth resistor 205, the second capacitor 209, the third capacitor 210, the sixth resistor 206, the fourth capacitor 211, the seventh resistor 207, the fifth capacitor 212, and the sixth capacitor 213 constitute 6 high-frequency feedback paths. The fifth NMOS tube 214 is used as a low-frequency gain control device to adjust the low-frequency gain of the equalizer according to the size of the external control signal V L. The larger the control signal V L , the smaller the resistance of the low-frequency feedback path, and the larger the low-frequency gain of the equalizer. The sixth NMOS tube 215 and the seventh NMOS tube 216 are used as high-frequency gain control devices to adjust the high-frequency gain of the equalizer according to the size of the external control signals V H1 and V H2 . When the control signals V H1 and V H2 are high voltages, the sixth NMOS transistor 215 and the seventh NMOS transistor 216 control multiple high-frequency feedback paths to be turned on, increasing the high-frequency gain of the equalizer, otherwise the high-frequency feedback paths are turned off, reducing the high-frequency gain of the equalizer. Multiple high-frequency feedback paths are used in parallel to make the frequency response curve of the equalizer smoother. The size of each capacitor and resistor in the high-frequency feedback path will affect the frequency characteristics of the equalizer. The parameters of each capacitor and resistor can be designed according to the gain compensation requirements of the specific application, and the frequency response curve of the equalizer can be flexibly adjusted.

本发明说明书中未作详细描述的内容属本领域专业技术人员的公知技术。The contents not described in detail in the specification of the present invention belong to the well-known technologies of professionals in the field.

Claims (8)

1. A multi-feedback path continuous time linear equalizer circuit, comprising a differential amplifying circuit and a multi-path negative feedback circuit; wherein:
the differential amplifying circuit amplifies the received external differential input signal and generates a current output signal which is sent to the multichannel negative feedback circuit;
The multi-channel negative feedback circuit receives a current output signal of the differential amplifying circuit, generates a negative feedback voltage signal and outputs the negative feedback voltage signal to the differential amplifying circuit; meanwhile, the multi-channel negative feedback circuit also receives an external control signal, and adjusts the negative feedback voltage sent to the differential amplifying circuit in real time according to the external control signal;
The differential amplifying circuit amplifies each frequency component of the external differential input signal according to the received negative feedback voltage signal, and generates and outputs a differential output voltage signal.
2. The multiple feedback path continuous time linear equalizer circuit of claim 1, wherein the differential amplifier circuit comprises an eighth resistor (101), a ninth resistor (102), a first NMOS transistor (103), a second NMOS transistor (104), a third NMOS transistor (105), and a fourth NMOS transistor (106); the anodes of the eighth resistor (101) and the ninth resistor (102) are connected with a power supply VCC; the negative electrode of the eighth resistor (101) is connected with the drain electrode of the first NMOS tube (103) and is used as an inverting output end Von of the differential amplifying circuit; the negative electrode of the ninth resistor (102) is connected with the drain electrode of the second NMOS tube (104) and is used as an in-phase output end Vop of the differential amplifying circuit; the grid electrode of the first NMOS tube (103) is connected with the homodromous end Vinp of an external differential input signal; the grid electrode of the second NMOS tube (104) is connected with the inverting terminal Vinn of the external differential input signal; the source electrode of the first NMOS tube (103) is connected with the drain electrode of the third NMOS tube (105) to form a feedback point VF1 of the differential amplifying circuit; the source electrode of the second NMOS tube (104) is connected with the drain electrode of the fourth NMOS tube (106) to form a feedback point VF2 of the differential amplifying circuit; the grid electrode of the third NMOS tube (105) and the grid electrode of the fourth NMOS tube (106) are respectively connected with external bias voltage signals; the source electrode of the third NMOS tube (105) and the source electrode of the fourth NMOS tube (106) are respectively connected with the ground GND.
3. A multiple feedback path continuous time linear equalizer circuit according to claim 2, wherein the first NMOS transistor (103), the second NMOS transistor (104) receive an external differential input voltage signal and a negative feedback voltage signal, and convert the external differential input voltage signal into a current signal; the current signal flows through an eighth resistor (101) and a ninth resistor (102) to be converted into a differential output voltage signal, and amplification of a differential input signal is completed; meanwhile, the current signal flows into the multi-channel negative feedback circuit through feedback points VF1 and VF2 to provide an input current signal for the multi-channel negative feedback circuit; and the gates of the third NMOS tube (105) and the fourth NMOS tube (106) are connected with external bias voltage to form a current source for providing bias current for the differential amplifying circuit.
4. The multi-feedback path continuous-time linear equalizer circuit of claim 2, wherein the multi-path negative feedback circuit comprises a first resistor (201), a second resistor (202), a third resistor (203), a fourth resistor (204), a fifth resistor (205), a sixth resistor (206), a seventh resistor (207), a first capacitor (208), a second capacitor (209), a third capacitor (210), a fourth capacitor (211), a fifth capacitor (212), a sixth capacitor (213), a fifth NMOS transistor (214), a sixth NMOS transistor (215), and a seventh NMOS transistor (216);
The positive electrode of the first resistor (201), the drain electrode of the fifth NMOS tube (214), the positive electrode of the fourth capacitor (211), the positive electrode of the fifth capacitor (212) and the positive electrode of the sixth capacitor (213) are respectively connected with a feedback point VF1 of the differential amplifying circuit; the negative electrode of the third resistor (203), the negative electrode of the fourth resistor (204), the negative electrode of the fifth resistor (205), the negative electrode of the third capacitor (210) and the source electrode of the seventh NMOS tube (216) are respectively used for differentiating the feedback point VF2 of the amplifying circuit; the anode of the second resistor (202) is connected with the cathode of the first resistor (201) and the drain of the fifth NMOS tube (214); the cathode of the second resistor (202) is connected with the anode of the third resistor (203) and the source of the fifth NMOS tube (214); the grid electrode of the fifth NMOS tube (214) is connected with an external low-frequency feedback control voltage signal V L; the grid electrode of the sixth NMOS tube (215) and the grid electrode of the seventh NMOS tube (216) are correspondingly connected with an external high-frequency feedback control voltage signal V H1、VH2 respectively; the source electrode of the sixth NMOS tube (215) is connected with the positive electrodes of the first capacitor (208), the second capacitor (209) and the third capacitor (210); the negative electrode of the first capacitor (208) is connected with the positive electrode of the fourth resistor (204); the cathode of the second capacitor (209) is connected with the anode of the fifth resistor (205); the negative electrode of the fourth capacitor (211) is connected with the positive electrode of the sixth resistor (206); the negative electrode of the fifth capacitor (212) is connected with the positive electrode of the seventh resistor (207); the negative electrode of the sixth resistor (206), the negative electrode of the seventh resistor (207) and the negative electrode of the sixth capacitor (213) are respectively connected with the drain electrode of the seventh NMOS tube (216).
5. The multi-feedback path continuous-time linear equalizer circuit of claim 4 wherein the negative feedback circuit receives the current signal from the differential amplifier circuit, generates negative feedback voltage signals at feedback points VF1, VF2, and sends the negative feedback voltage signals back to the differential amplifier circuit; the negative feedback circuit comprises a plurality of feedback paths, wherein a first resistor (201), a second resistor (202), a third resistor (203) and a fifth NMOS tube (214) form a low-frequency feedback path, a fourth resistor (204) and a first capacitor (208) form a first high-frequency feedback path, a fifth resistor (205), a second capacitor (209) form a second high-frequency feedback path, a third capacitor (210) form a third high-frequency feedback path, a sixth resistor (206) and a fourth capacitor (211) form a fourth high-frequency feedback path, a seventh resistor (207) and a fifth capacitor (212) form a fifth feedback path, and a sixth capacitor (213) form a sixth high-frequency feedback path; the external control signal V L controls the on-resistance of the fifth NMOS tube (214), so that the overall resistance of the low-frequency feedback path is adjusted, and the low-frequency gain is further adjusted; the external control signal V H1 controls the sixth NMOS tube (215) to be turned on or off so as to determine whether the first, second and third high-frequency feedback paths are connected into the feedback loop; the external control signal V H2 controls the seventh NMOS tube (216) to be turned on or off so as to determine whether the fourth, fifth and sixth high-frequency feedback paths are connected into the feedback loop; the control signal V H1、VH2 is used for controlling whether the high-frequency feedback path is conducted or not, so that the high-frequency gain is adjusted.
6. A multiple feedback path continuous time linear equalizer circuit according to claim 4, wherein the first resistor (201) and the third resistor (203) have the same value.
7. The multiple feedback path continuous time linear equalizer circuit according to claim 4, wherein the sixth NMOS transistor (215) and the seventh NMOS transistor (216) have the same size, and the fourth resistor (204), the first capacitor (208), the fifth resistor (205), the second capacitor (209), and the third capacitor (210) have the same values as the sixth resistor (206), the fourth capacitor (211), the seventh resistor (207), the fifth capacitor (212), and the sixth capacitor (213), respectively.
8. The multiple feedback path continuous time linear equalizer circuit of claim 4, wherein the first capacitor (208), the second capacitor (209), the third capacitor (210) are different in value, and the fourth capacitor (211), the fifth capacitor (212), and the sixth capacitor (213) are different in value.
CN202410188272.2A 2024-02-20 2024-02-20 Continuous time linear equalizer circuit with multiple feedback paths Pending CN118041297A (en)

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