CN117880658A - NCSI test circuit, device and method for PCIe network card - Google Patents

NCSI test circuit, device and method for PCIe network card Download PDF

Info

Publication number
CN117880658A
CN117880658A CN202410049126.1A CN202410049126A CN117880658A CN 117880658 A CN117880658 A CN 117880658A CN 202410049126 A CN202410049126 A CN 202410049126A CN 117880658 A CN117880658 A CN 117880658A
Authority
CN
China
Prior art keywords
pcie
ncsi
test
network card
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202410049126.1A
Other languages
Chinese (zh)
Inventor
颜剑
梁晟珲
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dongguan Yiyun Information System Co ltd
Original Assignee
Dongguan Yiyun Information System Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dongguan Yiyun Information System Co ltd filed Critical Dongguan Yiyun Information System Co ltd
Priority to CN202410049126.1A priority Critical patent/CN117880658A/en
Publication of CN117880658A publication Critical patent/CN117880658A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q1/00Details of selecting apparatus or arrangements
    • H04Q1/18Electrical details
    • H04Q1/20Testing circuits or apparatus; Circuits or apparatus for detecting, indicating, or signalling faults or troubles
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2273Test methods
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q1/00Details of selecting apparatus or arrangements
    • H04Q1/02Constructional details
    • H04Q1/028Subscriber network interface devices
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

The invention discloses NCSI test circuit, device and method of PCIe network card, the circuit includes interface module, control module and switch module; the interface module comprises a plurality of PCIe interfaces for plugging PCIe network cards; the control module is used for connecting with the upper computer to receive the test instruction and output different switch signals; the switch module is connected with the control module and the interface module and is used for selectively starting data communication of different PCIe interfaces on the control module and the interface module according to different switch signals so that the control module can perform NCSI test on the PCIe network card on the PCIe interface according to the test instruction. According to the method, the interface module is provided with the plurality of PCIe interfaces to be plugged with the plurality of PCIe network cards, the switch module selects to start the data communication between the control module and the different PCIe interfaces according to different switch signals, so that the control module can perform NCSI test on the PCIe network cards on the different PCIe interfaces according to the test instructions issued by the upper computer, and the plurality of PCIe network cards do not need to be replaced piece by piece during test, so that the test efficiency is improved.

Description

NCSI test circuit, device and method for PCIe network card
Technical Field
The invention relates to the technical field of PCIe network card test, in particular to an NCSI test circuit, an NCSI test device and an NCSI test method for a PCIe network card.
Background
With the development of computer network technology, PCIe cards (also known as PCI Express cards, PCIe-based cards) are very widely used in the field of computer networks, which are network adapters with PCIe interfaces that are used as expansion card interfaces in motherboard-level connections. While NCSI (Network Controller Sideband Interface ) is the basic function of PCIe network cards, which must be tested during PCBA diagnostics. The traditional NCSI test scheme of the current PCIe network card is that the PCIe network card is inserted into a Riser card, then the PCIe network card is inserted into a server main board, after the power-on, a server is started to enter an operating system for NCSI function test, normal power-off is required for each PCIe network card after the power-on is completed, the Riser module is taken down, the PCIe network card after the test is removed is replaced with other PCIe network cards to be tested for test, the operation steps are various, only the NCSI function of 1 PCIe network card can be tested each time, the test efficiency is low, and the test of the PCIe network card in large quantity cannot be met.
Disclosure of Invention
The embodiment of the invention provides an NCSI test circuit, an NCSI test device and an NCSI test method for a PCIe network card, which solve the problem of low test efficiency of the PCIe network card in the prior art.
In a first aspect, an embodiment of the present invention provides an NCSI test circuit for a PCIe network card, including:
the interface module comprises a plurality of PCIe interfaces for plugging PCIe network cards;
the control module is connected with the interface module and is used for being connected with an upper computer to receive the test instruction and output a switch signal;
the switch module is connected with the control module and the interface module, wherein the switch module is used for selectively starting data communication of different PCIe interfaces on the control module and the interface module according to different switch signals so that the control module can perform NCSI test on the PCIe network card on the PCIe interface according to the test instruction.
In the NCSI test circuit of the PCIe network card provided by the embodiment of the present invention, the control module includes a BMC chip, where the BMC chip is provided with a first input end, the first input end is used to connect to the host computer, and an output end of the BMC chip is connected to the switch module.
In the NCSI test circuit of the PCIe network card provided by the embodiment of the present invention, the switch module includes an analog switch, a control end and an input end of the analog switch are both connected to an output end of the BMC chip, and an output end of the analog switch is connected to the interface module.
In the NCSI test circuit of a PCIe network card provided by the embodiment of the present invention, the NCSI test circuit of the PCIe network card further includes a bus switch, where the bus switch is provided with a second input end and a third input end, an output end of the BMC chip includes a first output end and a second output end, the first output end of the BMC chip is connected to a control end of the analog switch, the second output end of the BMC chip is connected to the second input end of the bus switch, and an output end of the bus switch is connected to an input end of the analog switch, and the third input end of the bus switch is used to connect to a server to receive a first test instruction issued by the server, so that the server performs a first functional test on the PCIe network card on the PCIe interface according to the first test instruction.
In the NCSI test circuit of the PCIe network card provided by the embodiment of the present invention, the BMC chip is AST2600.
In the NCSI test circuit of the PCIe network card provided by the embodiment of the present invention, the analog switch is TUMX1308.
In the NCSI test circuit of the PCIe network card provided by the embodiment of the present invention, the bus switch is SN74CB3Q3257.
In the NCSI test circuit of the PCIe network card provided by the embodiment of the present invention, the number of PCIe interfaces is 10.
In a second aspect, an embodiment of the present invention provides an NCSI testing device for a PCIe network card, where the device includes any one of the NCSI testing circuits for a PCIe network card provided by the embodiment of the present invention.
In a third aspect, an embodiment of the present invention provides a NCSI testing method for a PCIe network card, where the method includes: if a test instruction is received, controlling the switch module to start data communication with one PCIe interface on the interface module according to the test instruction; performing NCSI test on the PCIe network card on the PCIe interface according to the test instruction; and returning to the step of controlling the switch module to start data communication with one PCIe interface on the interface module according to the test instruction if the test instruction is received when the NCSI test executed by the PCIe network card on the PCIe interface is finished.
The embodiment of the invention provides an NCSI test circuit, device and method of a PCIe network card, wherein the circuit comprises an interface module, a control module and a switch module; the interface module comprises a plurality of PCIe interfaces for plugging PCIe network cards; the control module is used for connecting with an upper computer to receive the test instruction and output different switch signals; the switch module is connected with the control module and the interface module and is used for selectively starting the data communication between the control module and different PCIe interfaces on the interface module according to the different switch signals so that the control module can perform NCSI test on the PCIe network card on the PCIe interface according to the test instruction. According to the method, the interface module is provided with the plurality of PCIe interfaces to be plugged with the plurality of PCIe network cards, the switch module selects to start the data communication between the control module and the different PCIe interfaces according to different switch signals, so that the control module can perform NCSI test on the PCIe network cards on the different PCIe interfaces according to the test instructions issued by the upper computer, and the plurality of PCIe network cards do not need to be replaced piece by piece during test, so that the test efficiency is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a block diagram of an NCSI test circuit for a PCIe network card provided by an embodiment of the present invention;
fig. 2 is a circuit diagram of an NCSI test circuit of a PCIe network card according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of an NCSI testing device for a PCIe network card according to an embodiment of the present invention;
fig. 4 is a flow chart of an NCSI testing method of a PCIe network card according to an embodiment of the present invention;
the reference numerals in the drawings are as follows:
100. NCSI test device of PCIe network card; 10. a board card; 20. a control module; 201. a first input; 202. a first output terminal; 203. a second output terminal; 30. a switch module; 40. an interface module; 401. a PCIe interface; 501. a second input terminal; 502. and a third input.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The terms of directions used in the present invention, such as "up", "down", "front", "back", "left", "right", "inside", "outside", "side", etc., refer only to the directions of the attached drawings. Accordingly, directional terminology is used to describe and understand the invention and is not limiting of the invention. In addition, in the drawings, structures similar or identical to those of the drawings are denoted by the same reference numerals.
Referring to fig. 1 and 2, and particularly to fig. 1, an embodiment of the present invention shows an NCSI testing circuit of a PCIe network card, where in this implementation, the NCSI testing circuit of the PCIe network card includes an interface module 40, a control module 20, and a switch module 30; the interface module 40 includes a plurality of PCIe interfaces 401 for plugging PCIe network cards; the control module 20 is used for connecting with an upper computer to receive the test instruction and output different switch signals; the switch module 30 is connected to the control module 20 and the interface module 40, and is configured to selectively enable data communication between the control module 20 and different PCIe interfaces 401 on the interface module 40 according to the different switch signals, so that the control module 20 performs NCSI testing on the PCIe network card on the PCIe interface 401 according to the test instruction.
In a specific implementation, the interface module 40 includes a plurality of PCIe interfaces 401, each PCIe interface 401 may be plugged with a PCIe network card, a specific number of PCIe interfaces 401 is not limited, and PCIe (PCI-Express) is a high-speed serial computer expansion bus standard, PCle belongs to high-speed serial point-to-point dual-channel high-bandwidth transmission, and connected devices allocate a unique channel bandwidth, do not share a bus bandwidth, and mainly support functions such as active power management, error reporting, end-to-end reliability transmission, hot plug, quality of service (QOS), and the like. PCle has the advantage of high data transmission rate, and PCIe interface 401 may be a PCIE3.0 interface with a bit rate of 8Gbps, which includes a series of important new functions such as transmitter and receiver equalization, PLL improvement, clock data recovery, etc., to improve data transmission and data protection performance. The control module 20 is a core module of the whole circuit, and the control module 20 can be a device with control function such as a CPU, a BMC, a singlechip or an FPGA. The control module 20 is connected to the interface module 40 via the switch module 30, and the control module 20 receives a test instruction issued by the host computer by being connected with the host computer, where the test instruction is specifically a digital signal for testing the NCSI function output by the host computer. The upper computer is specifically provided with a computer and other devices capable of independently executing NCSI function test. The switch module 30 is connected between the control module 20 and the interface module 40, after receiving a test instruction issued by the host computer, the control module 20 outputs a switch signal, the switch signal is a control signal for controlling the switch module 30 to open a test channel, the switch signal includes control information for opening the PCIe interface 401, different switch signals include control information of different PCIe interfaces 401, when the switch module 30 receives the switch signal output by the control module 20, data communication between the control module 20 and a corresponding PCIe interface 401 is selectively opened according to different switch signals, so that different PCIe interfaces 401 are selected as channels for NCSI testing, and each time one PCIe interface 401 is selected to be opened, after the corresponding PCIe interface 401 is selected as a channel for NCSI testing, a data connection is established between the PCIe network card on the PCIe interface 401 with which the data communication is opened and the control module 20, and the control module 20 executes an NCSI function test on PCIe network card on the corresponding PCIe interface 401 according to the test instruction issued by the host computer.
According to the embodiment, the plurality of PCIe interfaces are arranged on the interface module to plug in the plurality of PCIe network cards, the control module is used for outputting different switching signals to control the switching module to select to start data communication between the control module and different PCIe interfaces, so that the control module can perform NCSI test on the PCIe network cards on the PCIe interfaces according to the test instructions issued by the upper computer, the test is not required to be replaced one by one when the plurality of PCIe network cards are tested, the efficiency of NCSI test on the PCIe network cards is effectively improved, and the NCSI test on a large number of PCIe network cards can be very conveniently performed.
In an embodiment, referring to fig. 2, the control module 20 includes a BMC chip U1, where the BMC chip U1 is provided with a first input terminal 201, the first input terminal 201 is used to connect to the host computer, and an output terminal of the BMC chip U1 is connected to the switch module 30. Specifically, the control module 20 uses the BMC chip U1 as a core, and the BMC (Baseboard Management Controller) chip is an embedded circuit, and is mainly used for managing the substrate and peripheral devices of the computer system. The BMC chip U1 is used as an independent hardware unit of the computer system, and can realize the monitoring, control and management functions of the system through communication with a main processor and other hardware components. The BMC chip U1 has very powerful functions in practical application, and mainly comprises the functions of power management, temperature monitoring, server management, remote control, log recording and the like. The first input end 201 is a serial port used for communication with the upper computer by the BMC chip U1, the BMC chip U1 receives a test instruction issued by the upper computer through the first input end 201, the output end of the BMC chip U1 may include pins such as GPIO, data, addresses, etc., the BMC chip U1 is connected to the switch module 30 through the output end, different switch signals are output through the output end to control the switch module 30 to select an NCSI test channel, and the BMC chip U1 executes an NCSI test on the PCIe network card on the PCIe interface 401 according to the test instruction issued by the upper computer.
Preferably, the BMC chip U1 adopts an AST2600 chip. Two Arm Cortex A7 main cores and one Am Cortex M3 embedded core are arranged in the AST2600 chip, and the AST2600 chip adopts a 28nm process, so that the power consumption of the chip is reduced. Since the Arm cortex A7 core is added, trustZone and a Secure Boot Mode (Secure Boot Mode) can be added in firmware, which can make the BMC function of the next generation server safer. By adopting the AST2600 chip, the expandable functions of the circuit are more, more test requirements can be met, and the circuit is more stable and reliable in test execution.
In an embodiment, referring to fig. 2, the switch module 30 includes an analog switch U2, the control terminal and the input terminal of the analog switch U2 are both connected to the output terminal of the BMC chip U1, and the output terminal of the analog switch U2 is connected to the interface module 40. Specifically, the analog switch U2 is an electronic element capable of switching between two or more inputs, and the analog switch U2 has the characteristics of low resistance, low crosstalk and large bandwidth, and is internally composed of a plurality of switching tubes, so that the on-off of current between different switches can be controlled. The analog switch U2 is used in this embodiment to select and switch the data communication between the control module 20 and the interface module 40. The analog switch U2 is internally provided with a plurality of switch channels, each channel consists of a switch tube, and the switch tube controls the on-off state of the channel through an enabling pin and a control pin. The control end of the analog switch U2 is an enabling pin and a control pin, the input end is specifically a signal input line end of an internal switch tube, the output end is a signal output line end of the internal switch tube, the output end of the BMC chip U1 is connected to the control end and the input end of the analog switch U2, the output end of the BMC chip can comprise GPIO (general purpose input/output) pins, data pins, addresses and the like, and the output end of the analog switch U2 is connected with the input end of the PCIe interface 401. According to the number of data PINs of the PCIe interface 401 and the test requirement, the two analog switches U2 are cascaded into a group to control data communication between the PCIe interface 401 and the BMC chip U1. The analog switch U2 outputs different switching signals through the BMC chip U1, and may select different groups of analog chips U2 to conduct, as shown in the following table 1:
TABLE 1
H represents high level, L represents low level, X can represent no level INPUT, different groups of analog switches U2 correspond to different control signals INPUT, namely corresponding to BMC chip U1 to output different switching signals, B1-B9 can be used for representing 9 groups of corresponding analog switches U2, Z can represent that corresponding analog switches U2 are not selected, namely an upper computer does not issue a test instruction, and all groups of analog switches U2 are in standby. The output end of the BMC chip outputs different switch signals/OE, S0, S1 and S2, and can control the analog switches U2 of different groups to conduct, so that the on-off control of data communication between the control module 20 and different PCIe interfaces 401 on different interface modules 40 is realized, the signals such as data, address and the like of the BMC chip U1 are connected with the corresponding PCIe interfaces 401, and the BMC module can conduct NCSI test on the PCIe network card plugged in the PCIe interfaces 401 according to the test instruction.
Preferably, the analog switch U2 employs a TUMX1308 chip. The TUMX1308 chip is a universal Complementary Metal Oxide Semiconductor (CMOS) Multiplexer (MUX). TMUX1308 is an 8:1 single channel (single ended) multiplexer that can support bi-directional analog and digital signals ranging from GND to VDD on the source and drain pins. The TMUX1308 chip has an internal injection current control function, eliminating the need for external diode and resistor networks. The internal injection current control circuit allows the signal on the disable signal path to exceed the supply voltage without affecting the signal on the enable signal path. In addition, the TMUX1308 chip has no internal diode path to the power supply pins, thereby eliminating the risk of damaging elements connected to the power supply pins or providing accidental power to the power supply rails, and the use of the TMUX1308 chip as a data communication switch between the BMC chip U1 and the PCIe interface 401 may allow for more stable control.
In an embodiment, referring to fig. 2, the NCSI testing circuit of the PCIe network card further includes a bus switch U3, the bus switch U3 is provided with a second input end 501 and a third input end 502, an output end of the BMC chip U1 includes a first output end 202 and a second output end 203, the first output end 202 of the BMC chip U1 is connected to a control end of the analog switch U2, the second output end 203 of the BMC chip U1 is connected to the second input end 501 of the bus switch U3, and an output end of the bus switch U3 is connected to an input end of the analog switch U2, where the third input end 502 of the bus switch U3 is used to connect to a server to receive a first test instruction issued by the server, so that the server performs a first functional test on the network card on the PCIe interface 401 according to the first test instruction. Specifically, the bus switch U3 is a semiconductor switch for optimizing transmission of digital signals, and is integrally formed by a plurality of switch matrices, each of which is formed by a plurality of switch units, and each of the switch units further comprises a switch tube and a control circuit. The switching tube can be opened or closed by changing the control signal of the control circuit, so that the switching of the signal path is realized. In this embodiment, the bus switch U3 adopts two paths of inputs, that is, the second input end 501 and the third input end 502, and the first output end 202 of the BMC chip U1 is a GPIO of the BMC chip U1, which is mainly connected to the control end of the analog switch U2 and is used for outputting a corresponding control signal to select the corresponding analog switch U2 to start data communication. The second output terminal 203 of the BMC chip U1 is mainly a signal terminal such as data and address of the BMC chip U1, and the second output terminal 203 of the BMC chip U1 is connected to the second input terminal 501 of the bus switch U3 and is mainly used for sending a test instruction to perform NCSI test on the PCIe network card. The third input terminal 502 of the bus switch U3 is connected to the server motherboard, and is used for receiving the first test command issued by the server, and the output terminal of the bus switch U3 is connected to the input terminal of the analog switch U2. Two test paths are formed through the bus switch U3, one is a path for performing NCSI test on the PCIe network card by the upper computer, the other is a path for directly performing first function test on the PCIe network card by the server main board, and when the upper computer is used for performing NCSI test on the PCIe network card, the bus switch U3 is controlled to open data communication between the output end of the BMC chip U1 and the input end of the analog switch U2, and the data communication of the server main board is disconnected. When the server is used for carrying out the first function test on the PCIe network card, the control bus switch U3 cuts off the data communication of the output end of the BMC chip U1, and opens the data communication connection between the server main board and the input end of the analog switch U2. The first functional test includes, but is not limited to, an NCSI functional test, and the first functional test may be an NCSI test, or may be other functional tests, for example, a functional test such as an SR-IOV (Single Root I/O Virtualization) test. The bus switch U3 is arranged on the whole to expand the test path of the PCIe network card, so that more devices can conveniently test more functions of the PCIe network card.
Preferably, the bus switch U3 employs a SN74CB3Q3257 chip. The SN74CB3Q3257 chip is a high bandwidth FET bus switch that uses a charge pump to boost the gate voltage of the pass transistor, providing a low and flat on-state resistance (ron). The low and flat on-state resistance allows for minimal propagation delay and supports rail-to-rail switching on data input/output (I/O) ports. And also has a lower data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. The SN74CB3Q3257 chip is designed to support high-bandwidth application, an optimized interface solution is provided, and the SN74CB3Q3257 chip is used as a switch for controlling a test path, so that a test signal is more stable during testing can be effectively ensured, and the reliability of the testing is improved.
In one embodiment, the number of PCIe interfaces 401 is 10. Specifically, 10 PCIe interfaces 401 on the interface module 40 are provided, and the interface module 40 can be plugged with 10 PCIe network cards at the same time, so that the circuit connection is not too complex during design. When testing NCSI functions of 10 PCIe network cards, 10 PCIe network cards are used as a group for testing, and the testing is more convenient.
The invention also provides an NCSI testing device 100 of the PCIe network card, as shown in FIG. 3, FIG. 3 is a schematic structural diagram of the NCSI testing device 100 of the PCIe network card, the main body of the device is a board card 10, an NCSI testing circuit of the PCIe network card is integrated on the board card 10, a plurality of PCIe interfaces 401 are integrated on the board card 10, a plurality of PCIe network cards can be simultaneously spliced, and the device is also provided with corresponding interfaces for connecting a main board of an upper computer or a server, and can carry out NCSI testing on the plurality of PCIe network cards under the control of the upper computer or the server through the main board connected to the upper computer or the server. The NCSI test circuit of the PCIe network card in this embodiment may adopt any NCSI test circuit of a PCIe network card provided by the embodiment of the present invention, and since the specific structure and the working principle of the NCSI test circuit of the PCIe network card have been described in detail in the foregoing description, for brevity of the description, details are not repeated here.
The NCSI testing device of the PCIe network card in the embodiment adopts the NCSI testing circuit of the PCIe network card, so that when NCSI testing is carried out on a plurality of PCIe network cards, the PCIe network card is not required to be taken down and replaced every time, the testing is more convenient and quick, and the testing efficiency of the PCIe network card is greatly improved.
The invention further provides an NCSI testing method of the PCIe network card, refer to FIG. 4, and FIG. 4 is a flow chart of the NCSI testing method of the PCIe network card provided by the embodiment of the invention. As shown, the method includes the following steps S110-130.
And S110, if a test instruction is received, controlling the switch module to start data communication with one PCIe interface on the interface module according to the test instruction.
In specific implementation, the upper computer sends out a corresponding test instruction to the control module, wherein the test instruction can be a digital signal, the test instruction comprises an NCSI test program and a channel switch program, the control module controls data communication of a corresponding PCIe interface on the interface module according to the channel switch program after receiving the test instruction, the control module can specifically output different enabling control signals to control an enabling control end of the switch module, so that the switch module starts data communication between the corresponding PCIe interface and the control module, and the control module can establish signal connection with a PCIe network card on the PCIe interface with the data communication started.
S120, executing NCSI test to the PCIe network card on the PCIe interface according to the test instruction.
In specific implementation, after the control module starts data communication with one of the PCIe interfaces on the interface module, the control module executes an NCSI test on the PCIe network card on the PCIe interface on which the data communication is started according to an NCSI test program in a test instruction issued by the host computer, and tests an NCSI function of the PCIe network card.
And S130, returning to the step of controlling the switch module to start data communication with one PCIe interface on the interface module according to the test instruction if the test instruction is received when the NCSI test executed by the PCIe network card on the PCIe interface is finished.
In specific implementation, PCIe network cards on multiple PCIe interfaces are tested one by one, and each PCIe network card on one PCIe interface is tested, an upper computer issues a test instruction once. The control module can judge whether the NCSI test is finished by the PCIe network card on the current PCIe interface through the executing state of the test instruction, if the test instruction is in the executing state, the NCSI test executed by the PCIe network card on the current PCIe interface can be judged not to be finished, and the test is continued to be finished at the moment. When the execution of the test instruction is finished, the NCSI test executed by the PCIe network card on the current PCIe interface can be judged to be finished, and the PCIe network card on the next PCIe interface can be tested. At this time, the step S110 is returned to be executed, a test instruction of a PCIe network card on the next PCIe interface is received, the switch module is controlled to start data communication with other PCIe interfaces on the interface module according to the test instruction after the test instruction is received, and NCSI test is executed on the PCIe network card on the PCIe interface according to the test instruction. Therefore, NCSI function test of all PCIe network cards on all PCIe interfaces on the interface module is realized, and in the whole test process, the PCIe network cards do not need to be taken down and replaced one by one for test, so that the test is very convenient.
According to the NCSI test method of the PCIe network card, the test instruction of the upper computer is received, the switch module is controlled to start data communication with one PCIe interface on the interface module according to the test instruction, then the NCSI test is executed on the PCIe network card on the PCIe interface according to the test instruction, when the NCSI test executed by the PCIe network card on the PCIe interface is finished, the step of receiving the test instruction is returned, the switch module is controlled to start data communication with one PCIe interface on the interface module according to the test instruction, so that the NCSI test of a plurality of PCIe network cards is realized, the PCIe network cards are not required to be taken down one by one for replacement in the test process, and the NCSI test efficiency of the PCIe network card is effectively improved.
While the invention has been described with reference to certain preferred embodiments, it will be understood by those skilled in the art that various changes and substitutions of equivalents may be made and equivalents will be apparent to those skilled in the art without departing from the scope of the invention. Therefore, the protection scope of the invention is subject to the protection scope of the claims.

Claims (10)

1. An NCSI test circuit for a PCIe network card, comprising:
the interface module comprises a plurality of PCIe interfaces for plugging PCIe network cards;
the control module is used for being connected with the upper computer to receive the test instruction and output different switch signals;
the switch module is connected with the control module and the interface module, wherein the switch module is used for selectively starting data communication of different PCIe interfaces on the control module and the interface module according to different switch signals so that the control module can perform NCSI test on the PCIe network card on the PCIe interface according to the test instruction.
2. The NCSI testing circuit of the PCIe network card according to claim 1, wherein the control module includes a BMC chip, the BMC chip is provided with a first input end, the first input end is used for connecting with the host computer, and an output end of the BMC chip is connected with the switch module.
3. The NCSI testing circuit of the PCIe network card according to claim 2, wherein the switch module includes an analog switch, a control end and an input end of the analog switch are both connected to an output end of the BMC chip, and an output end of the analog switch is connected to the interface module.
4. The NCSI testing circuit for a PCIe network card according to claim 3, wherein the NCSI testing circuit for a PCIe network card further includes a bus switch, the bus switch is provided with a second input end and a third input end, the output end of the BMC chip includes a first output end and a second output end, the first output end of the BMC chip is connected to the control end of the analog switch, the second output end of the BMC chip is connected to the second input end of the bus switch, the output end of the bus switch is connected to the input end of the analog switch, and the third input end of the bus switch is used for connecting with a server to receive a first testing instruction issued by the server, so that the server performs a first functional test on the PCIe network card on the PCIe interface according to the first testing instruction.
5. The NCSI testing circuit of the PCIe network card of claim 2 wherein the BMC chip is AST2600.
6. The NCSI testing circuit for PCIe network card of claim 3 wherein the analog switch is TUMX1308.
7. The NCSI testing circuit for PCIe network card according to claim 4 wherein the bus switch is SN74CB3Q3257.
8. The NCSI test circuit for a PCIe network card according to claim 1 wherein the number of PCIe interfaces is 10.
9. An NCSI testing device for a PCIe network card, comprising an NCSI testing circuit for a PCIe network card according to any one of claims 1-8.
10. The NCSI test method of the PCIe network card is characterized by comprising the following steps:
if a test instruction is received, controlling the switch module to start data communication with one PCIe interface on the interface module according to the test instruction;
performing NCSI test on the PCIe network card on the PCIe interface according to the test instruction;
and returning to the step of controlling the switch module to start data communication with one PCIe interface on the interface module according to the test instruction if the test instruction is received when the NCSI test executed by the PCIe network card on the PCIe interface is finished.
CN202410049126.1A 2024-01-12 2024-01-12 NCSI test circuit, device and method for PCIe network card Pending CN117880658A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202410049126.1A CN117880658A (en) 2024-01-12 2024-01-12 NCSI test circuit, device and method for PCIe network card

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202410049126.1A CN117880658A (en) 2024-01-12 2024-01-12 NCSI test circuit, device and method for PCIe network card

Publications (1)

Publication Number Publication Date
CN117880658A true CN117880658A (en) 2024-04-12

Family

ID=90578882

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202410049126.1A Pending CN117880658A (en) 2024-01-12 2024-01-12 NCSI test circuit, device and method for PCIe network card

Country Status (1)

Country Link
CN (1) CN117880658A (en)

Similar Documents

Publication Publication Date Title
CN112463697B (en) Clock mode switching server system
CN103714036B (en) Support that batch reads I2C multiplexer and the control method of verification
CN111417034B (en) Switch and hot plug method, device and system for switch board card thereof
CN109561032B (en) Switch module reaches switch including it
CN118041451A (en) Pluggable optical module and debugging method thereof
CN107241141B (en) Drive chip, optical module switching method and PON (passive optical network) equipment
CN113434442A (en) Switch and data access method
CN116028409B (en) Adapter card, mainboard, computer, data transmission method, equipment and medium
JP2008065364A (en) Extension system, add-in card, and external device
CN112000528A (en) Method and system for detecting board card signal short circuit through CPLD
CN117097614A (en) Storage system and plug-in card working mode switching device thereof
CN117880658A (en) NCSI test circuit, device and method for PCIe network card
CN109739328B (en) Reset circuit and method of M.3SSD
CN101599050A (en) PCI-E controller core and method thereof that can be adaptive
CN216388068U (en) PCIE interface verification board and test system
CN116010326A (en) Signal control circuit and signal control method
CN115509985A (en) I/O controller of processor
CN114265731A (en) PCIE interface verification board, test system and test method
US11657014B2 (en) Signal bridging using an unpopulated processor interconnect
CN108228517A (en) I3C circuit arrangements, system and communication means
CN114253783A (en) Method, device, equipment and storage medium for SSD firmware download test
CN112947287A (en) Control method, controller and electronic equipment
CN107704403B (en) Device and method for optimizing signal transmission of main back plate
CN217718469U (en) JTAG communication circuit, board card and electronic equipment
CN115422110B (en) Port configuration method of electronic equipment and PCIE Switch chip

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination