CN117832176A - Packaging structure and packaging method of GaN chip - Google Patents

Packaging structure and packaging method of GaN chip Download PDF

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Publication number
CN117832176A
CN117832176A CN202410032806.2A CN202410032806A CN117832176A CN 117832176 A CN117832176 A CN 117832176A CN 202410032806 A CN202410032806 A CN 202410032806A CN 117832176 A CN117832176 A CN 117832176A
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layer
diamond
copper
dbc
heat dissipation
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师云龙
张星
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Huahe Jidian Xiamen Semiconductor Technology Co ltd
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Huahe Jidian Xiamen Semiconductor Technology Co ltd
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Priority to CN202410032806.2A priority Critical patent/CN117832176A/en
Publication of CN117832176A publication Critical patent/CN117832176A/en
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Abstract

The invention provides a packaging structure of a GaN chip and a packaging method thereof, wherein the packaging structure of the GaN chip comprises the following components: a GaN chip; the electrode is arranged on the upper end face of the GaN chip; the first DBC heat dissipation structure is arranged on the upper end face of the electrode; the diamond micro-channel is arranged on the upper end face of the first DBC heat dissipation structure; the diamond heat sink is arranged on the lower end face of the GaN chip, notches are further formed in two sides of the diamond heat sink, and a second DBC heat dissipation structure is arranged at the notch. The invention provides a method for combining a far junction passive cooling packaging structure and a near junction passive cooling packaging structure aiming at the problem of GaN chip heat dissipation, wherein the far junction passive cooling packaging structure is adopted at the upper end face with lower heat flux density, and the near junction passive cooling packaging structure is adopted at the lower end face with higher heat flux density, so that the problem of GaN chip heat dissipation is solved, and the service performance and service life of the GaN chip are improved.

Description

Packaging structure and packaging method of GaN chip
Technical Field
The invention relates to the technical field of material science, in particular to a packaging structure and a packaging method of a GaN chip.
Background
With the development of the high power density and the high integration of the GaN chip, the heat flow density of the GaN chip is larger and larger, and the problems of thermal burning loss of the packaging lead, thermal breakdown of the GaN chip and the like caused by low heat conductivity of the GaN material are outstanding. Therefore, gaN chip packages are required to have fast and efficient heat dissipation capability. Packaging heat dissipation structures of current needle GaN chips can be divided into 3 major categories: a far junction passive cooling packaging structure, a near junction passive cooling packaging structure and a near junction active cooling packaging structure. The traditional long-junction passive cooling packaging structure has a long heat dissipation path, and for the whole packaging body structure, 67% of thermal resistance comes from a packaging matrix outside the chip, so that the heat dissipation capacity of the packaging body structure is greatly reduced. The near junction passive cooling packaging structure does not consider the problem of heat dissipation at the upper end of the chip, and the actual heat dissipation effect of the near junction passive cooling packaging structure is not much different from that of the double-sided far junction passive cooling packaging structure. The near junction active cooling structure has better heat dissipation effect, but has higher manufacturing difficulty and higher cost, and becomes a large resistance for restricting the development of the near junction active cooling structure. At present, copper, ceramic and the like are commonly adopted as heat sink materials, and compared with diamond heat sinks with high heat conductivity, the heat sink materials are low in heat dissipation coefficient, and the requirements of the heat management of the current chip and the like can not be met gradually.
Disclosure of Invention
The invention aims to overcome the defects in the prior art and provide a packaging structure and a packaging method of a GaN chip. In order to achieve the above object, in one aspect, the present invention provides a GaN chip package structure, including:
a GaN chip;
the electrode is arranged on the upper end face of the GaN chip;
the first DBC heat dissipation structure is arranged on the upper end face of the electrode;
the diamond micro-channel is arranged on the upper end face of the first DBC heat dissipation structure;
the diamond heat sink is arranged on the lower end face of the GaN chip, notches are further formed in two sides of the diamond heat sink, and a second DBC heat dissipation structure is arranged at the notch.
In one embodiment, the electrode comprises a drain electrode, a gate electrode and a source electrode, wherein the drain electrode, the gate electrode and the source electrode are equidistantly arranged on the upper end face of the GaN chip.
In one embodiment, the first DBC heat dissipation structure comprises a ceramic layer located in an intermediate layer, a first copper-clad layer located at an upper end of the ceramic layer, and three second copper-clad layers located at a lower end of the ceramic layer, wherein a length of the first copper-clad layer is consistent with a length of the ceramic layer; the three second copper-clad layers are arranged at the lower end of the ceramic layer at intervals, the arrangement positions of the second copper-clad layers at the two sides are far away from the two ends of the ceramic layer, and the distances between the second copper-clad layers at the two sides and the second copper-clad layers in the middle are consistent.
In one embodiment, the three second copper-clad layers are respectively connected with the drain electrode, the gate electrode and the source electrode one by one through the first welding layer, and the lengths of the second copper-clad layers, the first welding layer, the drain electrode, the gate electrode and the source electrode are consistent.
In one embodiment, the diamond micro-channel is connected with the upper end face of the first DBC heat dissipation structure through a second welding layer, and the lengths of the diamond micro-channel, the second welding layer and the first copper-clad layer are identical.
In one embodiment, the two sides of the diamond heat sink are provided with notches, the second DBC heat dissipation structure is just arranged at the notch of the diamond heat sink, a groove is further formed in the middle of the diamond heat sink, a third welding layer and a Ti layer are sequentially arranged in the groove from top to bottom, the third welding layer and the Ti layer are just arranged in the groove, and the diamond heat sink is connected with the lower end face of the GaN chip through the third welding layer.
In one embodiment, the packaging structure is further filled in a gap between the second DBC heat dissipation structure and the ceramic layer, wherein a filler is disposed in the gap between the GaN chip and the ceramic layer, and the filler is made of a thermosetting or thermoplastic material.
On the other hand, the invention provides a packaging method of the GaN chip, which comprises the following steps:
silver powder and an organic solvent are mixed into silver soldering paste by adopting a silver sintering process, then the silver soldering paste is printed on three second copper-clad layers of the first DBC heat dissipation structure, the organic solvent is removed by preheating, and then the connection between the electrode and the first DBC heat dissipation structure is realized by utilizing pressurized sintering;
cutting a preliminary diamond microchannel by utilizing laser cutting, etching by utilizing ICP equipment, removing graphite generated by laser cutting, trimming the preliminary diamond microchannel, etching the preliminary diamond microchannel in hydrogen plasma generated by MPCVD or ICP equipment for 2 hours, removing surface impurities, cleaning by utilizing acetone alcohol deionized water, plating a layer of metal Ti on the surface of the preliminary diamond microchannel by utilizing PVD equipment to form a diamond microchannel, and connecting a first DBC heat dissipation structure with the diamond microchannel in a brazing mode;
electroforming a copper layer without gaps on the lower end surface and the side surface of the GaN chip by utilizing an electroforming mode; cutting the preliminary diamond heat sink into a preset shape by using a laser cutting mode, etching by using ICP equipment after cleaning, cleaning the diamond heat sink to form a diamond heat sink, sputtering a Ti layer on the upper surface of the diamond heat sink, and connecting the diamond heat sink with a GaN chip by using a brazing mode;
and arranging a second DBC heat dissipation structure at the notch of the diamond heat sink, and finally filling thermosetting or thermoplastic materials at the gap of the whole packaging structure to complete packaging.
In one embodiment, a method for preparing a first DBC heat dissipation structure includes:
preparing an AlN ceramic substrate, a first copper plate with the same length as the AlN ceramic substrate and three second copper plates with the length smaller than the length of the AlN ceramic substrate, connecting the first copper plates to the upper end face of the AlN ceramic substrate, and connecting the three second copper plates to the lower end face of the AlN ceramic substrate at intervals, wherein oxygen elements are introduced before or during the application of the AlN ceramic substrate and the first copper plates and the second copper plates, and the combination of the AlN ceramic substrate and the first copper plates and the second copper plates is realized under the temperature condition of 1065-1083 ℃ to form a first DBC heat dissipation structure with a three-layer structure.
In one embodiment, a method for preparing a second DBC heat dissipation structure includes:
preparing an AlN ceramic substrate and two copper plates with the same length as the AlN ceramic substrate, and connecting the two copper plates on two sides of the AlN ceramic substrate, wherein oxygen is introduced before or during the application of the AlN ceramic substrate and the copper plates, and the combination of the AlN ceramic substrate and the copper plates on two sides is realized at the temperature of 1065-1083 ℃ to form a second DBC heat dissipation structure with a three-layer structure.
Compared with the prior art, the invention has the advantages that:
1. the invention provides a method for combining a far junction passive cooling packaging structure and a near junction passive cooling packaging structure aiming at the problem of GaN chip heat dissipation, wherein the far junction passive cooling packaging structure is adopted at the upper end face with lower heat flux density, and the near junction passive cooling packaging structure is adopted at the lower end face with higher heat flux density, so that the problem of GaN chip heat dissipation is solved, and the service performance and service life of the GaN chip are improved. The heat conductivity of the diamond is up to 2000W/(mK), so that the heat flow generated in the working process of the chip is timely removed, the working life of the chip in high power is prolonged, and the serious thermal management problem of the GaN chip is relieved. And due to the excellent electrical insulation property of the diamond, the chip can be passivated to reduce leakage current, and the reliability of the GaN chip is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a cross-sectional view of a GaN chip package structure of the invention;
the marks in the figure: 1. a diamond microchannel; 2. a second weld layer; 3. a first copper-clad layer; 4. a ceramic layer; 5. filling; 6. a second DBC heat dissipation structure; 7. a diamond heat sink; 8. a second copper-clad layer; 9. a first weld layer; 10. an electrode; 11. a GaN chip; 12. a third weld layer; 13. and a Ti layer.
Detailed Description
In order to make the technical problems, technical schemes and beneficial effects to be solved more clear, the invention is further described in detail below with reference to the embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
Example 1
A GaN chip package structure, comprising:
a GaN chip 11; the electrode 10 comprises a drain electrode, a grid electrode and a source electrode, wherein the drain electrode, the grid electrode and the source electrode are equidistantly arranged on the upper end face of the GaN chip 11;
a first DBC heat dissipation structure, which is arranged on the upper end surface of the electrode 10; the first DBC heat dissipation structure comprises a ceramic layer 4 positioned in an intermediate layer, a first copper-clad layer 3 positioned at the upper end of the ceramic layer 4 and three second copper-clad layers 8 positioned at the lower end of the ceramic layer 4, wherein the length of the first copper-clad layer 3 is consistent with that of the ceramic layer 4; the three second copper-clad layers 8 are arranged at intervals at the lower end of the ceramic layer 4, the arrangement positions of the second copper-clad layers 8 at the two sides are far away from the two ends of the ceramic layer 4, and the distances between the second copper-clad layers 8 at the two sides and the second copper-clad layers 8 in the middle are consistent; the three second copper-clad layers 8 are respectively connected with the drain electrode, the grid electrode and the source electrode one by one through a first welding layer 9, and the lengths of the second copper-clad layers 8, the first welding layer 9, the drain electrode, the grid electrode and the source electrode are consistent;
the diamond micro-channel 1 is arranged on the upper end face of the first DBC heat dissipation structure; the diamond micro-channel 1 is connected with the upper end face of the first DBC heat dissipation structure through a second welding layer 2, and the lengths of the diamond micro-channel 1, the second welding layer 2 and the first copper-clad layer 3 are consistent;
the diamond heat sink 7 is arranged on the lower end face of the GaN chip 11, gaps are formed in two sides of the diamond heat sink 7, the second DBC heat dissipation structure 6 is just arranged at the gaps of the diamond heat sink 7, a groove is further formed in the middle of the diamond heat sink 7, and after the groove is formed, the distances between two sides of the groove and two sides of the diamond heat sink 7 are equal; a third welding layer 12 and a Ti layer 13 are sequentially arranged in the groove from top to bottom, the third welding layer 12 and the Ti layer 13 are just installed in the groove, and the diamond heat sink 7 is connected with the lower end face of the GaN chip 11 through the third welding layer 12. In addition, the upper surfaces of the second DBC heat dissipation structure 6, the third welding layer 12 and the diamond heat sink 7 are on the same horizontal plane; and the third bonding layer 12, the Ti layer 13, and the GaN chip 11 are uniform in length.
Example 2
A GaN chip package structure, comprising:
a GaN chip 11; the electrode 10 comprises a drain electrode, a grid electrode and a source electrode, wherein the drain electrode, the grid electrode and the source electrode are equidistantly arranged on the upper end face of the GaN chip 11;
a first DBC heat dissipation structure, which is arranged on the upper end surface of the electrode 10; the first DBC heat dissipation structure comprises a ceramic layer 4 positioned in an intermediate layer, a first copper-clad layer 3 positioned at the upper end of the ceramic layer 4 and three second copper-clad layers 8 positioned at the lower end of the ceramic layer 4, wherein the length of the first copper-clad layer 3 is consistent with that of the ceramic layer 4; the three second copper-clad layers 8 are arranged at intervals at the lower end of the ceramic layer 4, the arrangement positions of the second copper-clad layers 8 at the two sides are far away from the two ends of the ceramic layer 4, and the distances between the second copper-clad layers 8 at the two sides and the second copper-clad layers 8 in the middle are consistent; the three second copper-clad layers 8 are respectively connected with the drain electrode, the grid electrode and the source electrode one by one through a first welding layer 9, and the lengths of the second copper-clad layers 8, the first welding layer 9, the drain electrode, the grid electrode and the source electrode are consistent;
the diamond micro-channel 1 is arranged on the upper end face of the first DBC heat dissipation structure; the diamond micro-channel 1 is connected with the upper end face of the first DBC heat dissipation structure through a second welding layer 2, and the lengths of the diamond micro-channel 1, the second welding layer 2 and the first copper-clad layer 3 are consistent;
the diamond heat sink 7 is arranged on the lower end face of the GaN chip 11, gaps are formed in two sides of the diamond heat sink 7, the second DBC heat dissipation structure 6 is just arranged at the gaps of the diamond heat sink 7, a groove is further formed in the middle of the diamond heat sink 7, a third welding layer 12 and a Ti layer 13 are sequentially arranged in the groove from top to bottom, the third welding layer 12 and the Ti layer 13 are just arranged in the groove, and the diamond heat sink 7 is connected with the lower end face of the GaN chip 11 through the third welding layer 12;
filling is further performed at the gap of the packaging structure, wherein a filling material 5 is arranged at the gap formed between the second DBC heat dissipation structure 6 and the ceramic layer 4, and a filling material 5 is also arranged at the gap formed between the GaN chip 11 and the ceramic layer 4, and the filling material of the filling material 5 is a thermosetting or thermoplastic material.
In this embodiment, finally, the whole chip is filled, the thermosetting or thermoplastic material is injected into the cavity of the mold to cover the assembly, in this way, the functions of protecting the environment and improving the mechanical strength are achieved, and finally, the whole heat dissipation packaging structure of the GaN chip is completed, and the heat dissipation capacity of the GaN chip is improved.
Example 3
The packaging method corresponding to embodiment 1 includes:
preparing a first DBC heat dissipation structure: preparing an AlN ceramic substrate, a first copper plate with the same length as the AlN ceramic substrate and three second copper plates with the length smaller than the length of the AlN ceramic substrate, connecting the first copper plates to the upper end face of the AlN ceramic substrate, and connecting the three second copper plates to the lower end face of the AlN ceramic substrate at intervals, wherein oxygen elements are introduced before or during the application of the AlN ceramic substrate and the first copper plates and the second copper plates, and the combination of the AlN ceramic substrate and the first copper plates and the second copper plates is realized under the temperature condition of 1065-1083 ℃ to form a first DBC heat dissipation structure with a three-layer structure;
preparing a second DBC heat dissipation structure 6: preparing an AlN ceramic substrate and two copper plates with the same length as the AlN ceramic substrate, and connecting the two copper plates on two sides of the AlN ceramic substrate, wherein oxygen is introduced before or during the application of the AlN ceramic substrate and the copper plates, and the combination of the AlN ceramic substrate and the copper plates on two sides is realized at the temperature of 1065-1083 ℃ to form a second DBC heat dissipation structure 6 with a three-layer structure;
in the preparation of the first DBC heat dissipation structure and the second DBC heat dissipation structure 6, copper and oxygen form Cu-O eutectic liquid at the temperature of 1065-1083 ℃, and the eutectic liquid and the ceramic substrate are subjected to chemical reaction to generate CuAlO 2 Or CuAl 2 O 4 On the other hand, the copper foil is infiltrated to realize the combination of the ceramic substrate and the copper plate;
silver powder and an organic solvent are mixed into silver soldering paste by adopting a silver sintering process, then the silver soldering paste is printed on three second copper-clad layers 8 of the first DBC heat dissipation structure, the organic solvent is removed by preheating, and then the connection between the electrode 10 and the first DBC heat dissipation structure is realized by utilizing pressurized sintering;
cutting a preliminary diamond microchannel by utilizing laser cutting, etching by utilizing ICP equipment, removing graphite generated by laser cutting, trimming the preliminary diamond microchannel, etching the preliminary diamond microchannel in hydrogen plasma generated by MPCVD or ICP equipment for 2 hours, removing surface impurities, cleaning by utilizing acetone alcohol deionized water, plating a layer of metal Ti on the surface of the preliminary diamond microchannel by utilizing PVD equipment to form a diamond microchannel 1, and connecting a first DBC heat dissipation structure with the diamond microchannel 1 in a brazing manner to form a second welding layer 2, wherein the diamond microchannel 1 and the first DBC heat dissipation structure are connected by the second welding layer 2;
electroforming a copper layer without gaps on the lower end surface and the side surface of the GaN chip 11 by utilizing an electroforming mode; cutting the preliminary diamond heat sink into a preset shape by using a laser cutting mode, etching by using ICP equipment after cleaning, cleaning the diamond heat sink to form a diamond heat sink 7, sputtering a Ti layer 13 on the upper surface of the diamond heat sink 7, and connecting the diamond heat sink 7 with a GaN chip 11 by using a brazing mode to form a third welding layer 12, wherein the diamond heat sink 7 is connected with the GaN chip 11 by using the third welding layer 12; and a second DBC heat dissipation structure 6 is arranged at the notch of the diamond heat sink 7 to finish packaging.
Example 4
The packaging method corresponding to embodiment 2 includes:
preparing a first DBC heat dissipation structure: preparing an AlN ceramic substrate, a first copper plate with the same length as the AlN ceramic substrate and three second copper plates with the length smaller than the length of the AlN ceramic substrate, connecting the first copper plates to the upper end face of the AlN ceramic substrate, and connecting the three second copper plates to the lower end face of the AlN ceramic substrate at intervals, wherein oxygen elements are introduced before or during the application of the AlN ceramic substrate and the first copper plates and the second copper plates, and the combination of the AlN ceramic substrate and the first copper plates and the second copper plates is realized under the temperature condition of 1065-1083 ℃ to form a first DBC heat dissipation structure with a three-layer structure;
preparing a second DBC heat dissipation structure 6: preparing an AlN ceramic substrate and two copper plates with the same length as the AlN ceramic substrate, and connecting the two copper plates on two sides of the AlN ceramic substrate, wherein oxygen is introduced before or during the application of the AlN ceramic substrate and the copper plates, and the combination of the AlN ceramic substrate and the copper plates on two sides is realized at the temperature of 1065-1083 ℃ to form a second DBC heat dissipation structure 6 with a three-layer structure;
in the preparation of the first DBC heat dissipation structure and the second DBC heat dissipation structure 6, copper and oxygen form Cu-O eutectic liquid at the temperature of 1065-1083 ℃, and the eutectic liquid and the ceramic substrate are subjected to chemical reaction to generate CuAlO 2 Or CuAl 2 O 4 On the other hand, the copper foil is infiltrated to realize the combination of the ceramic substrate and the copper plate;
silver powder and an organic solvent are mixed into silver soldering paste by adopting a silver sintering process, then the silver soldering paste is printed on three second copper-clad layers 8 of the first DBC heat dissipation structure, the organic solvent is removed by preheating, and then the connection between the electrode 10 and the first DBC heat dissipation structure is realized by utilizing pressurized sintering;
cutting a preliminary diamond microchannel by utilizing laser cutting, etching by utilizing ICP equipment, removing graphite generated by laser cutting, trimming the preliminary diamond microchannel, etching the preliminary diamond microchannel in hydrogen plasma generated by MPCVD or ICP equipment for 2 hours, removing surface impurities, cleaning by utilizing acetone alcohol deionized water, plating a layer of metal Ti on the surface of the preliminary diamond microchannel by utilizing PVD equipment to form a diamond microchannel 1, and connecting a first DBC heat dissipation structure with the diamond microchannel 1 in a brazing manner to form a second welding layer 2, wherein the diamond microchannel 1 and the first DBC heat dissipation structure are connected by the second welding layer 2;
electroforming a copper layer without gaps on the lower end surface and the side surface of the GaN chip 11 by utilizing an electroforming mode; cutting the preliminary diamond heat sink into a preset shape by using a laser cutting mode, etching by using ICP equipment after cleaning, cleaning the diamond heat sink to form a diamond heat sink 7, sputtering a Ti layer 13 on the upper surface of the diamond heat sink 7, and connecting the diamond heat sink 7 with a GaN chip 11 by using a brazing mode to form a third welding layer 12, wherein the diamond heat sink 7 is connected with the GaN chip 11 by using the third welding layer 12; and a second DBC heat dissipation structure 6 is arranged at the notch of the diamond heat sink 7, and finally thermosetting or thermoplastic materials are filled in the gap of the whole packaging structure to finish packaging.
The packaging structure of the GaN chip in the present embodiment has the following advantages: firstly, through changing the traditional packaging mode of the GaN chip, the near junction passive cooling packaging structure is combined with the far junction passive cooling packaging structure, so that the overall heat dissipation capacity of the chip is improved, compared with the double-sided far junction passive cooling packaging, the packaging mode reduces the heat resistance by nearly 25%, and compared with the traditional single-sided far junction passive cooling, the junction temperature of the chip can be reduced by 100 ℃ at most. Secondly, the diamond heat sink with high heat conductivity is used for replacing the traditional heat sink material, so that the heat dissipation problem of the chip in a high-temperature state can be well solved, the service life of the chip is prolonged, and the problem of chip performance reduction caused by the heat management problem is solved. Finally, due to the excellent electrical property of the diamond, the problems of chip breakdown and the like caused by leakage current in the use process of the chip are reduced.
The foregoing description of the preferred embodiments of the invention is not intended to be limiting, but rather is intended to cover all modifications, equivalents, and alternatives falling within the spirit and principles of the invention.

Claims (10)

1. A GaN chip package structure, comprising:
a GaN chip (11);
the electrode (10) is arranged on the upper end face of the GaN chip (11);
the first DBC heat dissipation structure is arranged on the upper end face of the electrode (10);
the diamond micro-channel (1) is arranged on the upper end face of the first DBC heat dissipation structure;
the diamond heat sink (7), diamond heat sink (7) set up terminal surface under GaN chip (11), diamond heat sink (7) both sides still have the breach, breach department is provided with second DBC heat radiation structure (6).
2. The GaN chip packaging structure of claim 1, wherein said electrode (10) comprises a drain electrode, a gate electrode and a source electrode, said drain electrode, said gate electrode and said source electrode being equidistantly spaced on an upper end face of said GaN chip (11).
3. The GaN chip packaging structure according to claim 2, characterized in that the first DBC heat dissipation structure comprises a ceramic layer (4) located in an intermediate layer, a first copper-clad layer (3) located at an upper end of the ceramic layer (4), and three second copper-clad layers (8) located at a lower end of the ceramic layer (4), wherein a length of the first copper-clad layer (3) is identical to a length of the ceramic layer (4); the three second copper-clad layers (8) are arranged at intervals at the lower end of the ceramic layer (4), the arrangement positions of the second copper-clad layers (8) at the two sides are far away from the two ends of the ceramic layer (4), and the distances between the second copper-clad layers (8) at the two sides and the second copper-clad layers (8) in the middle are consistent.
4. A GaN chip packaging structure according to claim 3, characterized in that three second copper-clad layers (8) are respectively connected with drain electrodes, gate electrodes and source electrodes one by one through a first soldering layer (9), and the lengths of said second copper-clad layers (8), said first soldering layer (9), said drain electrodes, said gate electrodes and said source electrodes are identical.
5. The GaN chip packaging structure according to claim 1, wherein the diamond micro-channel (1) is connected with the upper end face of the first DBC heat dissipation structure through a second welding layer (2), and the lengths of the diamond micro-channel (1), the second welding layer (2) and the first copper-clad layer (3) are identical.
6. The packaging structure of the GaN chip according to claim 1, characterized in that the two sides of the diamond heat sink (7) are provided with notches, the second DBC heat dissipation structure (6) is just arranged at the notch of the diamond heat sink (7), a groove is further arranged in the middle of the diamond heat sink (7), a third welding layer (12) and a Ti layer (13) are sequentially arranged in the groove from top to bottom, the third welding layer (12) and the Ti layer (13) are just arranged in the groove, and the diamond heat sink (7) is connected with the lower end face of the GaN chip (11) through the third welding layer (12).
7. The GaN chip packaging structure according to claim 1, characterized in that filling is further performed at a gap of the packaging structure, wherein a filler (5) is provided at a gap formed between the second DBC heat dissipating structure (6) and the ceramic layer (4), and a filler (5) is also provided at a gap formed between the GaN chip (11) and the ceramic layer (4), and the filler (5) is a thermosetting or thermoplastic material.
8. The packaging method of the packaging structure of the GaN chip according to any one of claims 1 to 7, characterized by comprising:
silver powder and an organic solvent are mixed into silver soldering paste by adopting a silver sintering process, then the silver soldering paste is printed on three second copper-clad layers (8) of the first DBC heat dissipation structure, the organic solvent is removed by preheating, and then the connection between the electrode (10) and the first DBC heat dissipation structure is realized by utilizing pressurized sintering;
cutting a preliminary diamond microchannel by utilizing laser cutting, etching by utilizing ICP equipment, removing graphite generated by laser cutting, trimming the preliminary diamond microchannel, etching the preliminary diamond microchannel in hydrogen plasma generated by MPCVD or ICP equipment for 2 hours, removing surface impurities, cleaning by utilizing acetone alcohol deionized water, plating a layer of metal Ti on the surface of the preliminary diamond microchannel by utilizing PVD equipment to form a diamond microchannel (1), and connecting a first DBC heat dissipation structure with the diamond microchannel (1) in a brazing mode;
electroforming a copper layer without gaps on the lower end surface and the side surface of the GaN chip (11) by utilizing an electroforming mode; cutting the preliminary diamond heat sink into a preset shape by using a laser cutting mode, etching by using ICP equipment after cleaning, cleaning the diamond heat sink to form a diamond heat sink (7), sputtering a Ti layer (13) on the upper surface of the diamond heat sink, and connecting the diamond heat sink (7) with a GaN chip (11) by using a brazing mode;
and arranging a second DBC heat dissipation structure (6) at the notch of the diamond heat sink (7), and finally filling thermosetting or thermoplastic materials at the gap of the whole packaging structure to complete packaging.
9. The method of packaging of claim 8, wherein the method of fabricating the first DBC heat dissipation structure comprises:
preparing an AlN ceramic substrate, a first copper plate with the same length as the AlN ceramic substrate and three second copper plates with the length smaller than the length of the AlN ceramic substrate, connecting the first copper plates to the upper end face of the AlN ceramic substrate, and connecting the three second copper plates to the lower end face of the AlN ceramic substrate at intervals, wherein oxygen elements are introduced before or during the application of the AlN ceramic substrate and the first copper plates and the second copper plates, and the combination of the AlN ceramic substrate and the first copper plates and the second copper plates is realized under the temperature condition of 1065-1083 ℃ to form a first DBC heat dissipation structure with a three-layer structure.
10. The packaging method according to claim 8, characterized in that the method for manufacturing the second DBC heat spreading structure (6) comprises:
preparing an AlN ceramic substrate and two copper plates with the same length as the AlN ceramic substrate, and connecting the two copper plates on two sides of the AlN ceramic substrate, wherein oxygen is introduced before or during the application of the AlN ceramic substrate and the copper plates, and the combination of the AlN ceramic substrate and the copper plates on two sides is realized at the temperature of 1065-1083 ℃ to form a second DBC heat dissipation structure (6) with a three-layer structure.
CN202410032806.2A 2024-01-09 2024-01-09 Packaging structure and packaging method of GaN chip Pending CN117832176A (en)

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CN202410032806.2A CN117832176A (en) 2024-01-09 2024-01-09 Packaging structure and packaging method of GaN chip

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Application Number Priority Date Filing Date Title
CN202410032806.2A CN117832176A (en) 2024-01-09 2024-01-09 Packaging structure and packaging method of GaN chip

Publications (1)

Publication Number Publication Date
CN117832176A true CN117832176A (en) 2024-04-05

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