CN1178282C - Prepn of nitride-oxide film - Google Patents
Prepn of nitride-oxide film Download PDFInfo
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- CN1178282C CN1178282C CNB021472327A CN02147232A CN1178282C CN 1178282 C CN1178282 C CN 1178282C CN B021472327 A CNB021472327 A CN B021472327A CN 02147232 A CN02147232 A CN 02147232A CN 1178282 C CN1178282 C CN 1178282C
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- IJGRMHOSHXDMSA-UHFFFAOYSA-N nitrogen Substances N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 41
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 36
- 230000003647 oxidation Effects 0.000 claims abstract description 33
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 25
- 238000002360 preparation method Methods 0.000 claims abstract description 13
- 238000005229 chemical vapour deposition Methods 0.000 claims abstract description 6
- 238000002347 injection Methods 0.000 claims abstract description 5
- 239000007924 injection Substances 0.000 claims abstract description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 5
- 229920005591 polysilicon Polymers 0.000 claims abstract description 5
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims abstract description 5
- 239000008367 deionised water Substances 0.000 claims abstract description 4
- 229910021641 deionized water Inorganic materials 0.000 claims abstract description 4
- -1 Nitrogen ions Chemical class 0.000 claims abstract 4
- 238000002955 isolation Methods 0.000 claims abstract 3
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 claims description 32
- 238000005121 nitriding Methods 0.000 claims description 27
- 230000001590 oxidative effect Effects 0.000 claims description 24
- 238000000137 annealing Methods 0.000 claims description 7
- 229910052739 hydrogen Inorganic materials 0.000 claims description 4
- 239000012299 nitrogen atmosphere Substances 0.000 claims description 3
- 239000000243 solution Substances 0.000 claims description 3
- 238000007796 conventional method Methods 0.000 claims description 2
- 238000010792 warming Methods 0.000 claims description 2
- 229910052731 fluorine Inorganic materials 0.000 claims 3
- 239000011737 fluorine Substances 0.000 claims 3
- 239000001257 hydrogen Substances 0.000 claims 3
- 229940110728 nitrogen / oxygen Drugs 0.000 claims 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 19
- 229910052710 silicon Inorganic materials 0.000 abstract description 19
- 239000010703 silicon Substances 0.000 abstract description 19
- 238000004518 low pressure chemical vapour deposition Methods 0.000 abstract description 4
- 239000000758 substrate Substances 0.000 abstract description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 abstract 1
- 229910001868 water Inorganic materials 0.000 abstract 1
- 238000005516 engineering process Methods 0.000 description 11
- 239000007788 liquid Substances 0.000 description 9
- 238000000034 method Methods 0.000 description 9
- 230000002787 reinforcement Effects 0.000 description 9
- 229910004298 SiO 2 Inorganic materials 0.000 description 4
- MCMNRKCIXSYSNV-UHFFFAOYSA-N Zirconium dioxide Chemical compound O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 description 4
- 238000004151 rapid thermal annealing Methods 0.000 description 4
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Inorganic materials [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 4
- 238000004458 analytical method Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 3
- 238000004140 cleaning Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000035515 penetration Effects 0.000 description 3
- 230000005641 tunneling Effects 0.000 description 3
- 230000004888 barrier function Effects 0.000 description 2
- 238000002513 implantation Methods 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 238000001004 secondary ion mass spectrometry Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 229910018557 Si O Inorganic materials 0.000 description 1
- 229910007991 Si-N Inorganic materials 0.000 description 1
- 229910008051 Si-OH Inorganic materials 0.000 description 1
- 229910006294 Si—N Inorganic materials 0.000 description 1
- 229910006358 Si—OH Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 125000001449 isopropyl group Chemical group [H]C([H])([H])C([H])(*)C([H])([H])[H] 0.000 description 1
- 230000007775 late Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 238000000386 microscopy Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 238000005036 potential barrier Methods 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 238000005728 strengthening Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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Abstract
The present invention relates to a preparation method of a nitride-oxide film. Nitrogen ions are injected into a silicon substrate to be oxidized. The present invention comprises the steps that an oxidation film before injection grows on a silicon chip which completes isolation after cleaned, and then, <14>N<+> is injected into a source region; the oxidation film before the injection is rinsed; the oxidation film is soaked at room temperature by HF/IPA/H2O after cleaned, is flushed by deionized water and is dried to be immediately conveyed into a furnace; a vessel is conveyed in the furnace at the temperature of 550 DEG C under the protection of high flow rate N2, is slowly pushed, and is protected by the high flow rate N2; the oxidation film is heated to be 700 to 900 DEG C, and N2 keeps constant temperature; the oxidation film is oxidized at the atmosphere that N2 / O2 is equal to 5: 1 at the same temperature, and oxidation time is 1 to 120 minutes; the oxidation film is annealed for 15 to 60 minutes at the temperature of 700 to 900 DEG C at the atmosphere of the N2; the oxidation film is cooled to the temperature of 550 DEG C under the protection of the N2, and the vessel is slowly pulled out under the protection of the high flow rate N2; chemical vapor deposition (LPCVD) polysilicon has the temperature of 620 DEG C, the pressure of 0.2 torr, the SiH4 of 200 sccm and the Ar of 800 sccm.
Description
Technical field
The technology of the present invention belongs to microelectronics sub-micro cmos device and vlsi technology field, relate in particular to a kind of preparation method of ultra-thin nitriding and oxidizing film, also be applicable to the preparation of the nitriding and oxidizing film of the multiple thickness that needs on the chip to grow simultaneously.
Background technology
The target of current research integrated circuit basic technology is to obtain higher unit integrated level, higher circuit speed, lower unit function power consumption and unit functional cost.The main path that realizes above-mentioned target is the CMOS technology of continuous reduction (Scaling down) device and connection line size, and this is the content explained of Moore's Law just.Current state-of-the-art industrialization CMOS technology has evolved to 0.13 μ m, is 20nm plane MOS device and 18nm new construction MOS device and successfully prepare grid in the laboratory long.Though the deep-submicron CMOS technology has obtained flying to hail exhibition, obtains immense success in the manufacturing of integrated circuit, and estimate can evolve to the 100nm technology node under existing framework, the main stream of CMOS technology below the 100nm node will face great challenge.One of the most serious challenge is the characteristic of ultra-thin gate dielectric film.Studies show that, gate oxidation films is thinned to 25 when following, what conventional nitriding and oxidizing method had been not enough to stop boron penetrates and obtains low direct Tunneling electric current, and with the attenuate of film, tunnelling current exponentially rule increases; Because the nitrogen content in its film is very low, and is distributed on the interface, these all seriously cause its performance degradation.And conventional nitriding and oxidizing method is difficult to film is thinned to 20 and following.According to famous semiconductor technology evolves figure (Roadmap) prediction that world semiconductor industrial combination meeting (SIA) is formulated, when physical gate length was reduced to 45nm, the thickness requirement of thin dielectric film was the scope of 11 -16 , had only several atomic layers thick.Grid voltage is applied on the so thin medium will produce great direct Tunneling electric current, cause I thus
OffExcessive, device reliability descends or lost efficacy; Simultaneously the B penetration effect is more serious among the PMOS, causes the serious drift of threshold voltage and loses efficacy.In addition, grid exhaust quantum effect with silicon face makes that the equivalent electrical thickness of insulating barrier can be less than 0.8nm, thereby studies efficiently that ultra-thin gate dielectric becomes vital technical problem, also is stern challenge.
Summary of the invention
The reinforcement nitriding and oxidizing film that the preparation method who the purpose of this invention is to provide a kind of nitriding and oxidizing film, this method make has excellent characteristic, and the OFF leakage current of the device of making is very little.
For overcoming the problem that conventional nitriding and oxidizing gate medium can not be applied to following device of 25 and circuit, the present invention is injected into the nitrogen ion in the silicon substrate earlier, and then oxidation.The advantage of this method is: (1) has increased the nitrogen ion at SiO
2Concentration in the film; (2) make the peak concentration of nitrogen ion be positioned at SiO by routine
2The state at/Si interface is to SiO
2Surface direction moves, thereby has strengthened the ability that anti-B penetrates greatly; (3) because the injection of nitrogen ion in the silicon reduces the oxidation rate of silicon greatly, greatly improved compactness, uniformity and the repeatability of oxide-film; (4) weak bonds such as the Si-OH on the interface, Si-H, Si-O are substituted by firm Si-N key; More than all direct Tunneling leakage currents of film that all makes significantly reduce, the anti-ability that penetrates significantly improves, and has obtained the ultra-thin reinforcement nitriding and oxidizing of the 1.5nm film of high-quality.
Key step of the present invention is:
1.LOCOS (selective oxidation) isolates or STI (shallow slot) isolates;
2. clean;
3. oxidation before annotating;
4. inject
14N
+: energy 15-30Kev, dosage (1-5) * 10
14Cm
-2
5. rinse and annotate preceding oxide-film;
6. clean: clean with the conventional method in the above steps earlier, use HF/IPA (isopropyl alcohol)/H again
2Soak under the O room temperature, deionized water rinsing dries and advances stove immediately;
7. gate oxidation: big flow N
2Protect following 550 ℃ to advance boat, push away slowly, big flow N
2Protection;
Be warming up to 700-900 ℃, N
2Constant temperature;
Under the same temperature, N
2/ O
2=5: 1 ambient oxidation, oxidization time 1-120 minute;
N
2Atmosphere, 700-900 ℃ of annealing, 15-60 minute;
N
2Be cooled to 550 ℃ under the protection, again at big flow N
2Boat is pulled out in protection down slowly;
8. chemical vapor deposition (LPCVD) polysilicon: 620 ℃ of temperature, pressure 0.2 torr, SiH
4200sccm, Ar 800sccm.
Description of drawings
Fig. 1 provided nitrogen (
14N
+) inject the variation of percentage that reinforcement nitriding and oxidizing film oxidation rate that silicon reoxidizes generation reduces with the nitrogen implantation dosage.
Fig. 2 (a) has provided nitrogen and has injected the high resolution transmission electron microscope photo (HRTEM) that silicon reoxidizes the 20 reinforcement nitride film of method (be designated hereinafter simply as and strengthen nitriding) generation.
Fig. 2 (b) has provided nitrogen and has injected the high resolution transmission electron microscope photo (HRTEM) that silicon reoxidizes the 15 reinforcement nitride film of method (be designated hereinafter simply as and strengthen nitriding) generation.
Fig. 3 is the comparison of the anti-B penetration capacity of dissimilar nitriding and oxidizing gate mediums.
Fig. 4 is that new ablution and conventional ablution compare the influence of silicon face roughness: a) 3
#-1
#-HF/H
2O surface microroughness (RMS) 0.117nm; (b) 3
#-1
#-HF/IPA/H
2O dip surface microroughness (RMS) 0.053nm.
Fig. 5 for the gate dielectric film surface of strengthening the nitriding growth and with the atomic force microscope photo at the interface of Si: (a) nitriding and oxidizing grid surface, surperficial microroughness (RMS) 0.052nm; (b) peel off the nitriding and oxidizing grid, surface thick little rugosity (RMS) 0.057nm.
Fig. 6 is the I of the cmos device of channel length 42nm
D-V
DOutput characteristic: (a) NMOS; (b) PMOS.
Fig. 7 is the subthreshold value characteristic of the device of channel length 42nm: (a) NMOS; (b) PMOS.
Embodiment
Embodiment
The prescription of the cleaning fluid that the present invention adopts is:
3
#Formula of liquid: H
2SO
4: H
2O
2=5: 1 (volume ratio)
1
#Formula of liquid: NH
4OH: H
2O
2: H
2O=0.8: 1: 5 (volume ratio)
HF/IPA prescription: HF: IPA: H
2O=0.5%: 0.02%: 1
1. silicon chip cleans: 3
#Liquid removed photoresist 10 minutes, and 3
#Liquid cleaned 10 fens, and 1
#Liquid cleaned 5 minutes, H
2O/HF (20/1) floated for 15 seconds.
2. pre-oxidation: thick 150 ,, do O by 850 ℃
2, 170 minutes+N
2, annealed 30 minutes.
3. chemical vapor deposition (LPCVD) Si
3N
4: thick 1300 , 780 ℃.
4. clean: 3
#Liquid 10 minutes, 1
# Liquid 5 minutes, H
2O/HF (1/20) floated for 15 seconds.
5.Si
3N
4Annealing: 800 ℃, N
2, annealed 30 minutes.
6. photoetching active area: 9912 glue, 1.2 μ m.
7. reactive ion etching Si
3N
4: active area stays SiO
280 , power 150W, pressure 0.4 torr, CHF/SF
6/ He=7sccm/30sccm/100sccm.
8. the cleaning of removing photoresist: clean with step 1 silicon chip.
9. an oxidation: 1000 ℃, 90 fens (H
2+ O
2), 4700 .
10. wet etching Si
3N
4: H
3PO
4, 160 ℃, 1 hour.
11. remove pre-oxidation layer: H
2O: HF=10: 1, rinse active area SiO
2
12. clean: with step 4.
13. oxidation before annotating: thick 200 ,, do O by 900 ℃
2, 150 minutes+N
2Annealed 30 fens.
14. inject
14N
+: energy 20Kev, dosage 3 * 10
14Cm
2
Annotate preceding oxide-film 15. rinse: use H
2O/HF=10: 1 solution floats by 250 .
16. clean: 3
#Liquid cleaned 10 minutes, and 1
# Liquid 5 minutes, HF/ isopropyl alcohol (IPA), dipping is 5 minutes under the room temperature, and deionized water dashes 15 times, dries twice, advances stove immediately.
17. gate oxidation: thickness 15 , big flow N
2Protect following 550 ℃ to advance boat, pushed away slowly 10 minutes, prevent that natural oxide film from generating;
Big flow N
2Protection heated up N 50 minutes to 800 ℃ down
2(5L/ branch) constant temperature 10 minutes makes growth temperature stable, and improves surface state;
800 ℃ of following oxidations, N
2/ O
2=5: 1 (N
2=5L/ branch, O
2=1L/ branch), 2.5 minutes,, make more fine and close, controlled, the good reproducibility of film growth with the slow oxidation rate of slowing down;
N
2Annealing, 30 minutes, improves the distribution of interfacial state and nitrogen by 800 ℃;
N
2Protection was lowered the temperature 50 minutes to 550 ℃ down, to reduce stress;
Big flow N
2Go out boat under the protection, drew slowly 10 minutes, generate to prevent natural oxide film.
18. chemical vapor deposition (LPCVD) polysilicon: 2000 , 620 ℃ of temperature, pressure 0.2 torr, SiH
4: 200sccm, Ar:800sccm.
As seen from Figure 1, nitrogen injects sample and has reduced oxidation rate significantly, and with
14N
+Implantation dosage increases, and the oxidation late effect is obvious more.Uniformity, compactness and repeatability that the oxidation rate that slows down helps film improve.
Fig. 2 has clearly illustrated that the silicon oxynitride/silicon interface of new method formation is very smooth, smooth, and this improves the device electric property is very favourable.The reinforcement nitriding and oxidizing gate medium that studies show that 20 in the NMOS electric capacity has the low tunnelling current that manys than 21 pure zirconia gate mediums, and the tunnelling current of reinforcement oxidation grid under 1.2V and 1.5V of 15 is respectively 5.65 * 10
-2A/cm
2With 2.2 * 10
-1A/cm
2The tunnelling current of reinforcement nitriding and oxidizing gate medium that shows same 20 in the PMOS electric capacity simultaneously good than the pure silica of 21 , especially low after the match.This is because penetrating of pure zirconia sample caused low big electric leakage.Under 1.2V and 1.5V, the tunnelling leakage current that 15 strengthen the nitriding and oxidizing gate medium is respectively 1.67 * 10
-3A/cm
2With 2.57 * 10
-2A/cm
2
As seen from Figure 3, the flat band voltage (V of 2.0nm nitriding and oxidizing gate medium PMOS electric capacity
FB) very slow with rapid thermal annealing (RTA) variations in temperature, and the pure SiO of same thickness
2Flat band voltage (the V of gate medium PMOS electric capacity
FB) very serious with rapid thermal annealing temperature drift, and very fierce with the rapid thermal annealing variation of temperature, N
2The O annealing specimen takes second place, and 15 strengthen the nitriding and oxidizing sample than 21 N
2The O annealing specimen also will be got well.This shows that fully this technology has fabulous anti-B penetration capacity, and this is that except that membranous getting well, its N peak concentration is from SiO because N injection silicon reoxidizes
2/ Si interface is than N
2The O annealing specimen will more approaching surface, so the stronger potential barrier barrier effect to B is arranged.
Experiment simultaneously shows that the cleaning before the oxidation is most important to the quality of improving silicon face, and atomic force microscope (AFM) the analysis showed that, uses HF/IPA/H
2HF/H is compared in the O rinsing
2The O rinsing has much better surperficial microroughness, as shown in Figure 4.As seen from the figure, use HF/H
2The silicon face that O solution cleans is that microroughness (RMS) is 0.117nm, and uses HF/IPA/H
2The silicon face that O cleans is that roughness (RMS) is 0.053nm, and surface quality has obtained improvement at double.
For understanding that further nitrogen injects the superior reason that silicon reoxidizes method, except that sample being carried out the analysis of high-resolution transmission microscopy (HRTEM) and secondary ion mass spectroscopy (SIMS), the present invention carries out atomic force microscope (AFM) analysis to sample surfaces, analyze its surperficial microroughness, as shown in Figure 5.Show that all there is minimum microroughness (RMS) at the interface between nitriding and oxidizing gate medium surface and it and the Si, surface and interface dead smooth.
The result that the nitriding and oxidizing film of the present invention's preparation is used in nano-device:
Adopting 20 to strengthen nitriding and oxidizing gate medium channel length is the high-performance CMOS device of 42nm, under the 1.5V supply voltage, and the drive current I of NMOS and PMOS
OnBe respectively 745 μ A/ μ m and-530 μ A/ μ m, the off-state current I of corresponding N MOS and PMOS
OffBe respectively 3.5nA/ μ m and-15nA/ μ m.The sub-threshold slope of NMOS and PMOS is respectively is respectively 72mV/Dec and 82mV/Dec.Shown in Fig. 6 and 7.Above result shows that the reinforcement nitriding and oxidizing film that this method forms has excellent characteristic, makes the OFF leakage current of device very little.
Claims (7)
1. the preparation method of a nitriding and oxidizing film, key step is:
Carrying out local oxide isolation or shallow-trench isolation;
Clean;
Oxidation before annotating;
Inject
14N
+: energy 15-30Kev, dosage (1-5) * 10
14Cm
-2
Rinse and annotate preceding oxide-film;
Clean: clean with the conventional method in the above steps earlier, use the % of hydrogen fluorine ester/isopropanol=(0.2-0.7)/(0.01-0.04) soaked 1-10 minute under %/1 solution room temperature again, deionized water rinsing dries and advances stove immediately;
Gate oxidation: 400-600 ℃ is advanced boat under the big flow nitrogen protection, pushes away slowly, big flow nitrogen protection;
Be warming up to 700-900 ℃, nitrogen constant temperature;
Under the same temperature, nitrogen/oxygen=(3-7): 1 ambient oxidation, oxidization time 1-120 minute;
Nitrogen atmosphere, 700-900 ℃ of annealing, 15-60 minute;
Be cooled to 550 ℃ under the nitrogen protection, under big flow nitrogen protection, pull out boat slowly again;
Chemical vapor deposition polysilicon: 1600-2200 , 620 ℃ of temperature, pressure 0.2 torr, SiH
4200sccm, Ar 800sccm.
2, preparation method as claimed in claim 1 is characterized in that, oxide-film is 200 before annotating.
3, preparation method as claimed in claim 1 is characterized in that, described injection
14N
+Energy be 20-22Kev, dosage 3 * 10
14Cm
-2
4, preparation method as claimed in claim 1 is characterized in that, described hydrogen fluorine ester/isopropanol=0.5%/0.02%/1%.
5, as claim 1 or 4 described preparation methods, it is characterized in that, soaked 5 minutes under described hydrogen fluorine ester/isopropanol room temperature.
6, preparation method as claimed in claim 1 is characterized in that, described gate oxidation step is:
Big flow nitrogen protection pushed away boat 10 minutes for following 550 ℃;
Nitrogen protection heated up 50 minutes to 800-830 ℃ down, nitrogen constant temperature 10 minutes;
Under the same temperature, nitrogen/oxygen=5: 1 ambient oxidation, oxidization time 2.5-4.5 minute;
Nitrogen atmosphere was annealed 30 minutes for 800-830 ℃;
Nitrogen protection was lowered the temperature 50 minutes to 550 ℃ down, drew slowly to go out boat in 10 minutes under big flow nitrogen protection;
The nitriding and oxidizing film thickness is 14 -20 .
7, preparation method as claimed in claim 1 is characterized in that, described chemical vapor deposition polysilicon is 2000 .
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|---|---|---|---|
| CNB021472327A CN1178282C (en) | 2002-10-18 | 2002-10-18 | Prepn of nitride-oxide film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB021472327A CN1178282C (en) | 2002-10-18 | 2002-10-18 | Prepn of nitride-oxide film |
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|---|---|
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| CN1178282C true CN1178282C (en) | 2004-12-01 |
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ID=4751189
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102315312A (en) * | 2010-07-09 | 2012-01-11 | 国立清华大学 | Manufacturing process of silicon heterojunction solar battery |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100573482B1 (en) | 2004-06-29 | 2006-04-24 | 에스티마이크로일렉트로닉스 엔.브이. | A method for forming a poly silicon layer in semiconductor device |
| WO2006009003A1 (en) * | 2004-07-16 | 2006-01-26 | Tohoku University | Process liquid for semiconductor device, processing method, and apparatus for manufacturing semiconductor |
| CN100399523C (en) * | 2005-09-22 | 2008-07-02 | 中国科学院微电子研究所 | Method for preparing ultrathin silicon nitride/silicon dioxide laminated gate medium |
| CN102280375B (en) * | 2010-06-08 | 2013-10-16 | 中国科学院微电子研究所 | Manufacturing method of laminated metal gate structure in gate first process |
| CN103320855B (en) * | 2013-05-27 | 2016-08-10 | 上海华虹宏力半导体制造有限公司 | Polysilicon thin layer deposition |
| CN105655246A (en) * | 2016-01-04 | 2016-06-08 | 株洲南车时代电气股份有限公司 | Manufacturing method of groove-type IGBT grid electrode |
| CN112201578A (en) * | 2020-09-21 | 2021-01-08 | 上海华力集成电路制造有限公司 | Method for improving thickness uniformity of gate oxide film |
| CN113451115A (en) * | 2021-06-30 | 2021-09-28 | 安徽华晟新能源科技有限公司 | Cleaning method of solar cell |
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2002
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102315312A (en) * | 2010-07-09 | 2012-01-11 | 国立清华大学 | Manufacturing process of silicon heterojunction solar battery |
| CN102315312B (en) * | 2010-07-09 | 2013-11-13 | 国立清华大学 | Manufacturing process of silicon heterojunction solar battery |
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|---|---|
| CN1404113A (en) | 2003-03-19 |
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