CN117805580A - Chip comparison test device and method - Google Patents
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Abstract
The invention provides a chip comparison test device and a method, which belong to the technical field of chip test, wherein the device comprises: the upper computer unit is used for sending a test instruction to the lower computer unit; the lower computer unit is used for responding to the test instruction and sending a test signal to the replaceable module through the connector unit; the connector unit is used for plug connection between the lower computer unit and the replaceable module; the replaceable module is connected with the lower computer unit through the connector unit and is connected with the oscilloscope unit, the replaceable module is a unit where a tested chip is located, and the tested chip comprises a tested main chip and a tested substitute chip; the oscilloscope unit is used for acquiring a test waveform corresponding to the tested chip and sending the test waveform to the upper computer unit; the upper computer unit is also used for carrying out contrast analysis on the test waveforms and outputting a contrast analysis result. The invention can improve the test efficiency of the alternative chip, shorten the test period and reduce the test cost.
Description
Technical Field
The invention relates to the technical field of chip testing, in particular to a chip comparison testing device and method.
Background
In order to ensure the normal supply of electronic equipment such as a switch and a server after the volume production, the electronic chips, structural members and the like used in the electronic equipment are usually required to be subjected to chip replacement matching and testing in a design stage, so that when the main chip has the problems of supply and the like, the main chip is timely switched into the chip replacement to ensure the normal supply of the electronic equipment.
At present, a test verification mode of replacing chip board cards is generally adopted, namely, replaceable chips in all board cards of equipment are replaced by replacing chips to carry out printed circuit board assembly (Printed Circuit Board Assembly, PCBA) production during factory production, and verification such as signal test is carried out after the PCBA production is completed, so that the production cost of the PCBA is increased, and the test period of the replacing chips is prolonged.
Therefore, a simple and effective chip comparison test method is needed to meet the requirement of rapid test and verification of the alternative chip.
Disclosure of Invention
The invention provides a chip comparison testing device and method, which are used for solving the defect of testing and verifying a substitute chip in the prior art.
In a first aspect, the present invention provides a chip comparison test apparatus, comprising:
an upper computer unit, a lower computer unit, a connector unit, a replaceable module, an oscilloscope unit and a power supply unit, wherein,
The upper computer unit is respectively connected with the lower computer unit and the oscilloscope unit and is used for sending a test instruction to the lower computer unit;
the lower computer unit is respectively connected with the upper computer unit and the connector unit and is used for receiving the test instruction, and responding to the test instruction, a test signal is sent to the replaceable module through the connector unit;
the connector unit is respectively connected with the lower computer unit and the replaceable module and is used for plug connection between the lower computer unit and the replaceable module;
the replaceable module is connected with the lower computer unit through a connector unit, is also connected with the oscilloscope unit and is a unit where a tested chip is located, wherein the tested chip comprises a tested main chip and a tested substitute chip;
the oscilloscope unit is used for acquiring a test waveform corresponding to the tested chip and sending the test waveform to the upper computer unit; the upper computer unit is also used for acquiring a test waveform output by the oscilloscope unit, carrying out comparative analysis on the test waveform and outputting comparative analysis results of the tested main chip and the tested substitute chip;
The power supply unit is respectively connected with the lower computer unit and the replaceable module and is used for supplying power to the lower computer unit and the replaceable module.
According to the chip comparison testing device provided by the invention, the replaceable module comprises at least one type of socket, the socket is used for fixing the tested chip, and in the same replaceable module, the types of the sockets corresponding to the tested main chip and the tested substitute chip are the same.
According to the chip comparison testing device provided by the invention, the upper computer unit comprises: an input module, a control module and a data analysis module,
the input module is used for acquiring an operation instruction determined by an operator based on the type of the chip to be tested;
the control module is used for converting the operation instruction into a corresponding test instruction and a waveform acquisition instruction, the test instruction is sent to the lower computer unit through a serial interface, and the waveform acquisition instruction is sent to the oscilloscope unit through a network interface;
the control module is also used for acquiring test data from the lower computer unit through the serial interface and acquiring test waveforms from the oscilloscope unit through a network interface;
The data analysis module is used for carrying out comparison analysis on the test waveforms and outputting comparison analysis results.
According to the chip comparison testing device provided by the invention, the testing instruction is used for indicating to perform signal testing and/or functional testing.
According to the chip comparison testing device provided by the invention, under the condition that the testing instruction is used for indicating to perform signal testing, the upper computer unit is further used for receiving a signal testing judgment standard, and the lower computer unit is further used for configuring part of general input/output pins of the lower computer unit as I/O output ports;
the upper computer unit is also used for acquiring the test waveform output by the oscilloscope unit, carrying out contrast analysis on the test waveform, and outputting a contrast analysis result of the tested main chip and the tested substitute chip, and the method comprises the following steps:
the upper computer unit acquires a test waveform of a main chip to be tested and a test waveform of a substitute chip to be tested;
the upper computer unit determines a test waveform difference value between the tested main chip and the tested substitute chip;
the upper computer unit compares the test waveform difference value of the tested main chip and the tested substitute chip with the signal test judgment standard to obtain a comparison analysis result of the tested main chip and the tested substitute chip;
And the upper computer unit outputs the comparison analysis result.
According to the chip comparison test device provided by the invention, under the condition that the test instruction is used for indicating to perform functional test,
the lower computer unit is also used for configuring part of general input/output pins of the lower computer unit as data or clock signal output ports, performing data interaction with the tested chip through the data or clock signal output ports, recording test data of the tested main chip and the tested substitute chip, and sending the test data to the upper computer unit;
the upper computer unit is used for inquiring the test data of the tested main chip and the tested substitute chip sent by the lower computer unit in real time, performing comparison analysis based on the test data of the tested main chip and the tested substitute chip, and outputting the functional test comparison analysis results of the tested main chip and the tested substitute chip.
According to the chip comparison test device provided by the invention, under the condition that the test instruction is used for indicating to perform signal test and function test,
the lower computer unit is also used for configuring part of general input/output pins of the lower computer unit as data or clock signal output ports, performing data interaction with the tested chip through the data or clock signal output ports, recording test data of the tested main chip and the tested substitute chip, and sending the test data to the upper computer unit;
The oscilloscope unit is also used for acquiring a test waveform in the process of carrying out data interaction between the lower computer unit and the tested chip;
the upper computer unit is used for inquiring the test data of the tested main chip and the tested substitute chip sent by the lower computer unit in real time, performing comparison analysis based on the test data of the tested main chip and the tested substitute chip, and outputting a functional test comparison analysis result of the tested main chip and the tested substitute chip;
the upper computer unit is also used for analyzing the test waveforms in the process of data interaction between the lower computer unit and the tested chip and outputting the signal test results of the tested main chip and the tested substitute chip.
According to the chip comparison testing device provided by the invention, the power supply unit comprises a plurality of voltage regulating units, and the lower computer unit is also used for carrying out voltage bias testing on the tested chip by regulating the output of different voltage regulating units.
In a second aspect, the present invention further provides a chip comparison test method, which is based on the chip comparison test device according to the first aspect, and includes:
The upper computer unit sends a test instruction to the lower computer unit;
the lower computer unit receives the test instruction, and responds to the test instruction, and sends a test signal to a tested chip in the replaceable module through the connector unit;
the oscilloscope unit acquires a test waveform corresponding to the tested chip and sends the test waveform to the upper computer unit;
and the upper computer unit performs comparison analysis on the test waveform and outputs a comparison analysis result.
In a third aspect, the present invention also provides a non-transitory computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the chip comparison test method according to the second aspect.
The invention also provides an electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the chip comparison test method according to the second aspect when executing the program.
The invention also provides a computer program product comprising a computer program which when executed by a processor implements the chip comparison test method according to the second aspect.
According to the chip comparison testing device and method provided by the invention, the upper computer unit sends the testing instruction to the lower computer unit; sending a test signal to a replaceable module through a lower computer unit, wherein the replaceable module comprises a tested main chip and a tested substitute chip; the replaceable module and the connector unit are connected with the lower computer unit in a pluggable manner, the oscilloscope unit is used for acquiring a test waveform corresponding to the tested chip, the test waveform is sent to the upper computer unit, the upper computer unit is used for carrying out contrast analysis on the test waveform, outputting a contrast analysis result, and being capable of realizing contrast tests on the tested main chip and the tested alternative chip, being applicable to different packaging and different types of chip contrast tests, having wide application range, being capable of automatically grabbing the test waveform, automatically comparing test data, saving test time, avoiding the problem of misjudgment/missed judgment caused by manual inspection, and being capable of automatically realizing functional test, pressure test and test result judgment of the main alternative chip, improving test efficiency of the alternative chip and effectively reducing test cost and test period.
Drawings
In order to more clearly illustrate the invention or the technical solutions of the prior art, the following description will briefly explain the drawings used in the embodiments or the description of the prior art, and it is obvious that the drawings in the following description are some embodiments of the invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a chip comparison test apparatus according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of connection relationships between components in a chip comparison test device under a signal test scenario according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of connection relationships between components in a chip comparison test device under a functional test scenario according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of connection relationships between components in a chip comparison test device under the scenes of signal test and functional test according to an embodiment of the present invention;
FIG. 5 is a schematic flow chart of a chip comparison test method according to an embodiment of the present invention;
FIG. 6 is a second flow chart of a chip comparison test method according to an embodiment of the invention;
fig. 7 is a schematic diagram of an entity structure of an electronic device according to an embodiment of the present invention;
reference numerals:
101: an upper computer unit; 102: a lower computer unit; 103: a connector unit;
104: a replaceable module; 105: an oscilloscope unit; 106: and a power supply unit.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is apparent that the described embodiments are some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Fig. 1 is a schematic structural diagram of a chip comparison testing device according to an embodiment of the present invention. As shown in fig. 1, the chip comparison test apparatus includes: an upper computer unit 101, a lower computer unit 102, a connector unit 103, a replaceable module 104, an oscilloscope unit 105, and a power supply unit 106, wherein,
the upper computer unit 101 is respectively connected with the lower computer unit 102 and the oscilloscope unit 105, and is used for sending a test instruction to the lower computer unit 102;
optionally, the upper computer unit 101 sends a test instruction to the lower computer unit 102 through a serial interface. For example, the upper computer unit 101 transmits a test instruction to the lower computer unit 102 through a universal asynchronous receiver Transmitter (Universal Asynchronous Receiver/Transmitter, UART).
Optionally, the test instructions are for instructing a signal test and/or a functional test to be performed. Optionally, the test instruction further carries test parameters, such as signal frequency, read-write register, read-write data, read-write times, duty cycle, and the like.
Signal testing is primarily concerned with the quality of signals in circuitry. A signal is said to be complete if it can be transmitted undistorted from the source to the sink within a specified time. The main objective of such a test is to ensure the fidelity of the signal during transmission. Specifically, the signal test may include a plurality of steps such as a waveform test, a signal transmission speed test, a clock signal test, a loss signal test, a reflection test, and the like. Among them, waveform testing is the most basic method, usually performed using an oscilloscope, and mainly tests the amplitude, glitch, edge, etc. of waveforms. And analyzing whether indexes such as rising time, high and low levels, rising edge, falling edge, frequency, duty ratio and the like meet requirements or not through testing the characteristics of the waveform.
Functional testing is a systematic inspection of various functional indicators of a chip, with the goal of verifying whether the parameters, indicators, and functions of the chip meet design requirements. Functional testing typically requires two steps to be completed: firstly, connecting pins of a chip to be tested with a functional module of a lower computer; and secondly, applying an input signal to the tested chip through the lower computer, and detecting an output signal of the tested chip to judge whether the functions and performances of the tested chip meet the design requirements.
The upper computer unit can instruct the lower computer unit to perform signal test on the tested chip, instruct the lower computer unit to perform functional test on the tested chip, and instruct the lower computer unit to perform signal test and functional test on the tested chip.
Optionally, the content of the test performed on the chip to be tested is determined according to the type of the chip to be tested.
For example, if the chip to be tested is a switch-type chip, a signal test is performed on the chip to be tested.
If the tested chip is a functional chip, the tested chip is subjected to functional test, or the tested chip is subjected to signal test and functional test.
The switching chip herein refers to a chip that plays a role in conversion, distribution, detection, and other power management of power in an electronic device system.
Functional chips refer to chips of specific functions, and in computers, there are a variety of functional chips including, but not limited to, computing chips, memory chips, and sensing chips. A computing chip such as CPU, GPU, FPGA, MCU or the like is used as the computational analysis. Memory chips, such as DRAM, SDRAM, ROM, NAND, FLASH, are mainly used for data storage. A sense die, such as a microphone, camera, etc., is used to receive and process signals from the external environment.
Optionally, the specific content of the test on the tested chip can be determined according to the type of the tested chip and the on-chip resource and application requirement of the tested chip. Here, the on-chip resources include storage resources, system resources, on-chip and off-chip resources, and the like. The application requirements are determined according to the application scene of the chip to be tested.
In the actual application process, the upper computer unit 101 further sends a waveform acquisition instruction to the oscilloscope unit 105, so that the oscilloscope unit starts to acquire the test waveform corresponding to the tested chip.
Specifically, the upper computer unit 101 transmits a waveform acquisition instruction to the oscilloscope unit 105 through the network interface. For example, the upper computer unit 101 transmits a waveform acquisition instruction to the oscilloscope unit 105 through the ethernet interface (Ethernet Interface, ETH).
The lower computer unit 102 is respectively connected with the upper computer unit 101 and the connector unit 103, and is used for receiving the test instruction, and responding to the test instruction, sending a test signal to the replaceable module 104 through the connector unit 103;
in the actual application process, the lower computer unit 102 receives the test instruction, and analyzes the test instruction to obtain the content of testing the tested chip.
If the test instruction indicates to perform signal test, the lower computer unit performs signal test on the tested chip.
If the test instruction indicates to perform functional test, the lower computer unit performs functional test on the tested chip.
If the test instruction indicates to perform signal test and function test, the lower computer unit performs signal test and function test on the tested chip.
The lower computer unit 102 sends a test signal to the replaceable module 104 through the connector unit 103 to perform signal testing and/or functional testing on the tested chip.
Specifically, the lower computer unit 102 may be any CPLD control chip that meets the requirements, such as LCMXO3LF-4300C-5BG256I. The lower computer unit is used for executing the test instruction from the upper computer unit and can also be used for transmitting the test result to the upper computer unit through the serial interface.
The connector unit 103 is respectively connected with the lower computer unit 102 and the replaceable module 104 and is used for plug connection between the lower computer unit 102 and the replaceable module 104;
the connector unit may be any type of board-end connector that meets the requirements.
The replaceable module 104 is connected with the lower computer unit 102 through a connector unit 103, the replaceable module 104 is also connected with the oscilloscope unit 105, and the replaceable module 104 is a unit where a tested chip is located, wherein the tested chip comprises a tested main chip and a tested substitute chip;
the replaceable module is a unit where the tested chip is located, and the replaceable unit is also a circuit board with sockets of different types. It should be noted that, by replacing the replaceable module, chip testing of different packages can be realized.
The socket types of two tested chips in the same replaceable module are the same, the same replaceable module comprises two tested chips, one is a tested main chip, and the other is a tested standby chip.
The type of chip socket under test may vary from module to module, such as SOP-8, SOP-16, TSSOP-8, TSSOP-16, etc. different IC package type sockets. Thus realizing the chip test of different packages.
The tested chip in the replaceable module can be not only an IO input/output type chip and an I2C interface chip, but also other interface type chips, such as an SPI interface chip, an LPC interface chip and the like. The functional test flow of other bus type interface chips is the same as the functional test flow of the I2C interface except for the IO input/output type chip.
The oscilloscope unit 105 is configured to obtain a test waveform corresponding to the tested chip, and send the test waveform to the upper computer unit 101;
specifically, the oscilloscope unit 105 may be any type of digital oscilloscope with network protocol functionality, such as an MXR054A oscilloscope.
The upper computer unit 101 is further configured to obtain a test waveform output by the oscilloscope unit 105, perform a comparative analysis on the test waveform, and output a comparative analysis result of the tested main chip and the tested substitute chip.
The power supply unit 106 is connected to the lower computer unit 102 and the replaceable module 104, respectively, and is used for supplying power to the lower computer unit 102 and the replaceable module 104.
In particular, the power supply unit may be any DC/DC voltage regulating chip supporting regulation of the output voltage.
According to the chip comparison testing device provided by the invention, the upper computer unit sends the testing instruction to the lower computer unit; sending a test signal to a replaceable module through a lower computer unit, wherein the replaceable module comprises a tested main chip and a tested substitute chip; the replaceable module and the connector unit are connected with the lower computer unit in a pluggable manner, the oscilloscope unit is used for acquiring a test waveform corresponding to the tested chip, the test waveform is sent to the upper computer unit, the upper computer unit is used for carrying out contrast analysis on the test waveform, outputting a contrast analysis result, and being capable of realizing contrast tests on the tested main chip and the tested alternative chip, being applicable to different packaging and different types of chip contrast tests, having wide application range, being capable of automatically grabbing the test waveform, automatically comparing test data, saving test time, avoiding the problem of misjudgment/missed judgment caused by manual inspection, and being capable of automatically realizing functional test, pressure test and test result judgment of the main alternative chip, improving test efficiency of the alternative chip and effectively reducing test cost and test period.
In some embodiments, the replaceable module 104 includes at least one type of socket, where the socket is used to fix the tested chip, and in the same replaceable module, the types of sockets corresponding to the tested main chip and the tested replaceable chip are the same.
It can be understood that, in order to realize the comparison test of the tested main chip and the tested standby chip, the tested main chip and the tested standby chip are inserted into the sockets of the same type to form a replaceable module. The oscilloscope unit obtains the test waveform corresponding to the tested chip in the replaceable module, sends the test waveform to the upper computer unit, carries out contrast analysis on the test waveform through the upper computer unit, and outputs a contrast analysis result, so that the contrast test of the tested main chip and the tested substituted chip can be realized, the test efficiency of the substituted chip is improved, the test period is shortened, and the test cost is reduced.
In some embodiments, the upper computer unit includes: an input module, a control module and a data analysis module,
the input module is used for acquiring an operation instruction determined by an operator based on the type of the chip to be tested;
The control module is used for converting the operation instruction into a corresponding test instruction and a waveform acquisition instruction, the test instruction is sent to the lower computer unit through a serial interface, and the waveform acquisition instruction is sent to the oscilloscope unit through a network interface;
the control module is also used for acquiring test data from the lower computer unit through the serial interface and acquiring test waveforms from the oscilloscope unit through a network interface;
the data analysis module is used for carrying out comparison analysis on the test waveforms and outputting comparison analysis results.
Optionally, the input module is used for acquiring an operation instruction determined by an operator based on the type of the chip to be tested.
For example, if the chip to be tested is a switch-type chip, the operation instruction is to perform signal test on the chip to be tested.
If the tested chip is a functional chip, the operation instruction is to perform functional test on the tested chip, or perform signal test and functional test on the tested chip.
The input module is used for acquiring an operation instruction determined by an operator based on the type of the chip to be tested and the on-chip resource and application requirement of the chip to be tested.
The control module is used for converting the operation instruction into a corresponding test instruction and a waveform acquisition instruction, the test instruction is sent to the lower computer unit through the serial interface so that the lower computer unit corresponds to the test instruction and performs corresponding test on the chip to be tested, and the waveform acquisition instruction is sent to the oscilloscope unit through the network interface so that the oscilloscope unit starts to acquire the test waveform corresponding to the chip to be tested.
The data analysis module is used for carrying out comparative analysis on the test waveforms and outputting comparative analysis results of the tested main chip and the tested substitute chip.
According to the chip comparison testing device provided by the invention, the upper computer unit acquires the operation instruction determined by the operator based on the type of the chip to be tested, converts the operation instruction into the corresponding testing instruction and waveform acquisition instruction, respectively transmits the corresponding testing instruction and waveform acquisition instruction to the lower computer unit and the oscilloscope unit, acquires the testing data from the lower computer unit, acquires the testing waveform from the oscilloscope unit, performs comparison analysis on the testing waveform, and outputs the comparison analysis result, so that the comparison test of the tested main chip and the tested substituted chip can be realized, the testing efficiency of the substituted chip is improved, the testing period is shortened, and the testing cost is reduced.
In some embodiments, in a case where the test instruction is used to instruct signal testing, the upper computer unit is further used to receive a signal testing decision criterion, and the lower computer unit is further used to configure a part of general purpose input output pins of the lower computer unit as I/O output ports;
the upper computer unit is also used for acquiring the test waveform output by the oscilloscope unit, carrying out contrast analysis on the test waveform, and outputting a contrast analysis result of the tested main chip and the tested substitute chip, and the method comprises the following steps:
The upper computer unit acquires a test waveform of a main chip to be tested and a test waveform of a substitute chip to be tested;
the upper computer unit determines a test waveform difference value between the tested main chip and the tested substitute chip;
the upper computer unit compares the test waveform difference value of the tested main chip and the tested substitute chip with the signal test judgment standard to obtain a comparison analysis result of the tested main chip and the tested substitute chip;
and the upper computer unit outputs the comparison analysis result.
Fig. 2 is a schematic diagram of connection relationships between components in a chip comparison test device under a signal test scenario according to an embodiment of the present invention.
As shown in fig. 2, the lower computer unit 102 configures a portion of the general purpose input output pins GPIOA, B, E, F of the lower computer unit as I/O output ports OUT1, OUT2, OUT3, OUT4, respectively.
The input end of the replaceable module 104 is connected with the I/O output port of the lower computer unit 102 through the connector unit 103, the output end of the replaceable module 104 is connected with the oscilloscope unit 105, and the oscilloscope unit 105 obtains the output signal waveform of the tested chip.
The upper computer unit 101 also receives signal test decision criteria including rise time differences, level differences, etc.
Further, the upper computer unit obtains a test waveform of the tested main chip and a test waveform of the tested substitute chip, determines a test waveform difference value of the tested main chip and the tested substitute chip, compares the test waveform difference value of the tested main chip and the tested substitute chip with the signal test judgment standard, and obtains a comparison analysis result of the tested main chip and the tested substitute chip.
The comparison analysis result is that the tested alternative chip passes the test if the test waveform difference value is within a preset threshold range of the signal test judgment standard. If the difference value of the test waveform is not within the preset threshold range of the signal test judgment standard, the comparison analysis result is that the test of the tested substituted chip fails.
In the chip comparison testing device provided by the invention, the lower computer unit configures part of the general input/output pins as the I/O output ports under the signal testing scene, the upper computer unit receives the signal testing judgment standard, and the test waveform difference value of the tested main chip and the tested substituted chip is compared with the signal testing judgment standard, so that the comparison test of the tested main chip and the tested substituted chip can be realized, the testing efficiency of the substituted chip is improved, the testing period is shortened and the testing cost is reduced.
In some embodiments, where the test instruction is to instruct performance of a functional test,
the lower computer unit is also used for configuring part of general input/output pins of the lower computer unit as data or clock signal output ports, performing data interaction with the tested chip through the data or clock signal output ports, recording test data of the tested main chip and the tested substitute chip, and sending the test data to the upper computer unit;
the upper computer unit is used for inquiring the test data of the tested main chip and the tested substitute chip sent by the lower computer unit in real time, performing comparison analysis based on the test data of the tested main chip and the tested substitute chip, and outputting the functional test comparison analysis results of the tested main chip and the tested substitute chip.
Fig. 3 is a schematic diagram of connection relationships between components in a chip comparison test device under a functional test scenario according to an embodiment of the present invention.
As shown in fig. 3, the lower computer unit 102 configures the partial general purpose input output pins GPIO a, B, E, F of the lower computer unit as data or clock signal output ports SDA1, SCL1, SDA2, SCL2, respectively.
The input end of the replaceable module 104 is connected with the data or clock signal output port of the lower computer unit 102 through the connector unit 103.
It should be noted that, in the functional test scenario, the oscilloscope unit may not be used. The lower computer unit 102 is further configured to perform data interaction with a chip to be tested through the data or clock signal output port, record test data of the main chip to be tested and the substitute chip to be tested, and send the test data to the upper computer unit;
the upper computer unit is used for inquiring the test data of the tested main chip and the tested substitute chip sent by the lower computer unit in real time, performing comparison analysis based on the test data of the tested main chip and the tested substitute chip, and outputting the functional test comparison analysis results of the tested main chip and the tested substitute chip.
According to the chip comparison testing device provided by the invention, under a functional testing scene, the lower computer unit configures part of the general input/output pins as the data or clock signal output ports, the lower computer unit performs data interaction with the tested chip through the data or clock signal output ports, records the testing data of the tested main chip and the tested substitute chip, and sends the testing data to the upper computer unit, so that the comparison test of the tested main chip and the tested substitute chip can be realized, the testing efficiency of the substitute chip is improved, the testing period is shortened, and the testing cost is reduced.
In some embodiments, where the test instructions are used to instruct signal testing and functional testing,
the lower computer unit is also used for configuring part of general input/output pins of the lower computer unit as data or clock signal output ports, performing data interaction with the tested chip through the data or clock signal output ports, recording test data of the tested main chip and the tested substitute chip, and sending the test data to the upper computer unit;
the oscilloscope unit is also used for acquiring a test waveform in the process of carrying out data interaction between the lower computer unit and the tested chip;
the upper computer unit is used for inquiring the test data of the tested main chip and the tested substitute chip sent by the lower computer unit in real time, performing comparison analysis based on the test data of the tested main chip and the tested substitute chip, and outputting a functional test comparison analysis result of the tested main chip and the tested substitute chip;
the upper computer unit is also used for analyzing the test waveforms in the process of data interaction between the lower computer unit and the tested chip and outputting the signal test results of the tested main chip and the tested substitute chip.
Fig. 4 is a schematic diagram of connection relationships between components in a chip comparison test device under the scenarios of signal test and functional test according to an embodiment of the present invention.
As shown in fig. 4, the lower computer unit 102 configures the partial general purpose input output pins GPIO a, B, E, F of the lower computer unit as data or clock signal output ports SDA1, SCL1, SDA2, SCL2, respectively.
The input end of the replaceable module 104 is connected with the data or clock signal output port of the lower computer unit 102 through the connector unit 103.
The oscilloscope unit 105 is connected with the data or clock signal output port and is used for collecting test waveforms in the process of data interaction between the lower computer unit and the tested chip.
The lower computer unit 102 performs data interaction with the tested chip through the data or clock signal output port, records the test data of the tested main chip and the tested substitute chip, and sends the test data to the upper computer unit;
the upper computer unit is used for inquiring the test data of the tested main chip and the tested substitute chip sent by the lower computer unit in real time, performing comparison analysis based on the test data of the tested main chip and the tested substitute chip, and outputting the functional test comparison analysis results of the tested main chip and the tested substitute chip. The upper computer unit is also used for analyzing the test waveforms in the process of data interaction between the lower computer unit and the tested chip and outputting the signal test results of the tested main chip and the tested substitute chip.
In the chip comparison test device provided by the invention, under the scene of signal test and functional test, the lower computer unit configures part of general input/output pins as data or clock signal output ports, the lower computer unit performs data interaction with the tested chip through the data or clock signal output ports, records the test data of the tested main chip and the tested substitute chip, sends the test data to the upper computer unit, the oscilloscope unit is connected with the data or clock signal output ports, collects test waveforms in the process of data interaction between the lower computer unit and the tested chip, the upper computer unit queries the test data of the tested main chip and the tested substitute chip sent by the lower computer unit in real time, performs comparison analysis on the test data to obtain a functional test comparison analysis result, and the upper computer unit also performs analysis on the test waveforms in the process of data interaction between the lower computer unit and the tested chip to obtain a signal test result.
In some embodiments, the power supply unit includes a plurality of voltage adjustment units, and the lower computer unit is further configured to perform a voltage bias test on the tested chip by adjusting outputs of different voltage adjustment units.
It can be understood that the power supply unit can be any DC/DC voltage regulating chip supporting I2C regulating output voltage, and can be divided into a plurality of voltage regulating units which are respectively used for supplying power to the lower computer unit and the replaceable module, and the output of the different voltage regulating units is independently modified for the independent bias test of the voltage of the tested chip in the lower computer unit and the replaceable module, so that the stability of the working state of the tested chip under the condition of abnormal voltage is judged, and the voltage pressure test of the tested chip is realized. The method can realize the comparison test of the tested main chip and the tested substitute chip, improve the test efficiency of the substitute chip, shorten the test period and reduce the test cost.
Fig. 5 is a flow chart of a chip comparison test method according to an embodiment of the invention, and as shown in fig. 5, the chip comparison test method includes:
step 500, the upper computer unit sends a test instruction to the lower computer unit;
step 501, a lower computer unit receives the test instruction, and responds to the test instruction, and sends a test signal to a tested chip in the replaceable module through a connector unit;
Step 502, an oscilloscope unit acquires a test waveform corresponding to the tested chip, and sends the test waveform to the upper computer unit;
and 503, the upper computer unit performs comparative analysis on the test waveform and outputs a comparative analysis result.
For an understanding of the chip comparison test method provided in the embodiment of the present invention, reference may be made to the description in the foregoing chip comparison test apparatus, and no further description is given here.
FIG. 6 is a second flowchart of a chip comparison test method according to an embodiment of the invention. Fig. 6 illustrates an I2C interface chip as an example of a chip under test, which does not limit the present invention. The functional test flow of other bus type interface chips is the same as the functional test flow of the I2C interface.
A chip comparison test method takes a chip A1/A2 to be tested (pin 1/2 input pin, pin 5/6 output pin) and a chip B1/B2 to be tested (pin 1/2 is I2C pin) as examples, as shown in FIG. 6, and comprises the following steps:
(1) Selecting a corresponding replaceable module according to the type of the chip to be tested, powering up and starting after the installation is completed, and entering the step (2);
(2) If so, entering the step (3), otherwise, entering the step (5);
(3) Setting a voltage value to be pulled to, sending the voltage value to be regulated to a lower computer unit through an upper computer unit, and entering the step (4);
(4) The lower computer unit modifies the output voltage value of the voltage regulator of the power supply unit through an I2C interface (I2C 0), and the step (5) is entered;
(5) Selecting test content according to the type of the chip to be tested, and if signal test (chip to be tested A1/A2) is required, entering step (6); if the functional test (the tested chip B1/B2) is needed, the step (12) is carried out;
(6) Configuring signal testing and judging standards including rising time difference values, high-low level difference values and the like through an upper computer unit, and entering a step (7);
(7) The lower computer unit GPIOA/B/E/F is configured as an I/O output port, and the step (8) is entered;
(8) The upper computer unit sends a test instruction comprising signal frequency, duty ratio and the like to the lower computer unit, and simultaneously sends a waveform grabbing instruction to the oscilloscope unit so that the oscilloscope unit starts test waveform grabbing, and the step (9) is performed;
(9) The lower computer unit GPIOA/B/E/F outputs a test signal to the pin 1/2 of the tested chip according to the test instruction, and the step (10) is entered;
(10) The oscillograph unit grabs the waveform output by the pin 5/6 of the chip to be tested, and transmits the test result to the upper computer unit, and the step (11) is entered;
(11) The upper computer unit compares the test waveform data difference value of the tested chip with the test standard set in the step (6), judges the test Pass/Fail, and enters the step (16);
(12) The upper computer unit selects the type of the test interface as I2C, the lower computer unit configures GPIOA/B/E/F as I2C SDA/SCL (data/clock) signals respectively, and the step (13) is entered;
(13) The upper computer unit issues a test instruction to the lower computer unit, wherein the test instruction comprises I2C frequency, a read-write register, read-write data, read-write times and the like, and the step (14) is performed;
(14) The lower computer unit performs I2C data interaction with the tested chip through GPIOA/B/E/F (I2C), synchronously records the test result and enters step (15);
(15) The upper computer unit can query the current test result in real time through the serial interface, wherein the current test result comprises the tested times, the test success times, the test failure times and the like, and the step (16) is performed;
(16) Whether the process is finished or not, if yes, entering a step (17); otherwise, returning to the step (2);
(17) And (5) ending.
The chip comparison test method provided by the embodiment of the invention can be used for comparison tests of chips with different packages and different types, has a wide application range, can automatically grasp test waveforms and automatically compare test data, saves test time, simultaneously avoids the problem of false judgment/missed judgment of manual inspection, can automatically realize functional test, pressure test and test result judgment of a main alternative chip, and effectively reduces test cost and test period.
It should be noted that each embodiment of the present application may be freely combined, permuted, or executed separately, and does not need to rely on or rely on a fixed execution sequence.
Fig. 7 illustrates a physical schematic diagram of an electronic device, as shown in fig. 7, which may include: processor 710, communication interface (Communications Interface) 720, memory 730, and communication bus 740, wherein processor 710, communication interface 720, memory 730 communicate with each other via communication bus 740. Processor 710 may invoke logic instructions in memory 730 to perform a chip scale test method comprising: the upper computer unit sends a test instruction to the lower computer unit; the lower computer unit receives the test instruction, and responds to the test instruction, and sends a test signal to a tested chip in the replaceable module through the connector unit; the oscilloscope unit acquires a test waveform corresponding to the tested chip and sends the test waveform to the upper computer unit; and the upper computer unit performs comparison analysis on the test waveform and outputs a comparison analysis result.
Further, the logic instructions in the memory 730 described above may be implemented in the form of software functional units and may be stored in a computer readable storage medium when sold or used as a stand alone product. Based on this understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a personal computer, a server, a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
In another aspect, the present invention also provides a computer program product, the computer program product including a computer program, the computer program being storable on a non-transitory computer readable storage medium, the computer program, when executed by a processor, being capable of executing the chip comparison test method provided by the above methods, the method comprising: the upper computer unit sends a test instruction to the lower computer unit; the lower computer unit receives the test instruction, and responds to the test instruction, and sends a test signal to a tested chip in the replaceable module through the connector unit; the oscilloscope unit acquires a test waveform corresponding to the tested chip and sends the test waveform to the upper computer unit; and the upper computer unit performs comparison analysis on the test waveform and outputs a comparison analysis result.
In yet another aspect, the present invention also provides a non-transitory computer readable storage medium having stored thereon a computer program which, when executed by a processor, is implemented to perform the chip comparison test method provided by the above methods, the method comprising: the upper computer unit sends a test instruction to the lower computer unit; the lower computer unit receives the test instruction, and responds to the test instruction, and sends a test signal to a tested chip in the replaceable module through the connector unit; the oscilloscope unit acquires a test waveform corresponding to the tested chip and sends the test waveform to the upper computer unit; and the upper computer unit performs comparison analysis on the test waveform and outputs a comparison analysis result.
The apparatus embodiments described above are merely illustrative, wherein the elements illustrated as separate elements may or may not be physically separate, and the elements shown as elements may or may not be physical elements, may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art will understand and implement the present invention without undue burden.
From the above description of the embodiments, it will be apparent to those skilled in the art that the embodiments may be implemented by means of software plus necessary general hardware platforms, or of course may be implemented by means of hardware. Based on this understanding, the foregoing technical solution may be embodied essentially or in a part contributing to the prior art in the form of a software product, which may be stored in a computer readable storage medium, such as ROM/RAM, a magnetic disk, an optical disk, etc., including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method described in the respective embodiments or some parts of the embodiments.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims (10)
1. A chip comparison test apparatus, comprising: an upper computer unit, a lower computer unit, a connector unit, a replaceable module, an oscilloscope unit and a power supply unit, wherein,
the upper computer unit is respectively connected with the lower computer unit and the oscilloscope unit and is used for sending a test instruction to the lower computer unit;
the lower computer unit is respectively connected with the upper computer unit and the connector unit and is used for receiving the test instruction, and responding to the test instruction, a test signal is sent to the replaceable module through the connector unit;
the connector unit is respectively connected with the lower computer unit and the replaceable module and is used for plug connection between the lower computer unit and the replaceable module;
The replaceable module is connected with the lower computer unit through a connector unit, is also connected with the oscilloscope unit and is a unit where a tested chip is located, wherein the tested chip comprises a tested main chip and a tested substitute chip;
the oscilloscope unit is used for acquiring a test waveform corresponding to the tested chip and sending the test waveform to the upper computer unit; the upper computer unit is also used for acquiring a test waveform output by the oscilloscope unit, carrying out comparative analysis on the test waveform and outputting comparative analysis results of the tested main chip and the tested substitute chip;
the power supply unit is respectively connected with the lower computer unit and the replaceable module and is used for supplying power to the lower computer unit and the replaceable module.
2. The device of claim 1, wherein the replaceable module includes at least one type of socket for holding the chip under test, and the type of socket corresponding to the main chip under test and the substitute chip under test are the same in the same replaceable module.
3. The chip comparison test apparatus according to claim 1, wherein the upper computer unit comprises: an input module, a control module and a data analysis module,
The input module is used for acquiring an operation instruction determined by an operator based on the type of the chip to be tested;
the control module is used for converting the operation instruction into a corresponding test instruction and a waveform acquisition instruction, the test instruction is sent to the lower computer unit through a serial interface, and the waveform acquisition instruction is sent to the oscilloscope unit through a network interface;
the control module is also used for acquiring test data from the lower computer unit through the serial interface and acquiring test waveforms from the oscilloscope unit through a network interface;
the data analysis module is used for carrying out comparison analysis on the test waveforms and outputting comparison analysis results.
4. A chip comparison test apparatus according to claim 3, wherein the test instructions are for instructing signal testing and/or functional testing.
5. The chip comparison test apparatus according to claim 4, wherein, in the case where the test instruction is used to instruct signal testing, the upper computer unit is further used to receive a signal test decision criterion, and the lower computer unit is further used to configure a part of general purpose input output pins of the lower computer unit as I/O output ports;
The upper computer unit is also used for acquiring the test waveform output by the oscilloscope unit, carrying out contrast analysis on the test waveform, and outputting a contrast analysis result of the tested main chip and the tested substitute chip, and the method comprises the following steps:
the upper computer unit acquires a test waveform of a main chip to be tested and a test waveform of a substitute chip to be tested;
the upper computer unit determines a test waveform difference value between the tested main chip and the tested substitute chip;
the upper computer unit compares the test waveform difference value of the tested main chip and the tested substitute chip with the signal test judgment standard to obtain a comparison analysis result of the tested main chip and the tested substitute chip;
and the upper computer unit outputs the comparison analysis result.
6. The chip comparison test apparatus according to claim 4, wherein, in the case where the test instruction is for instructing performance of a functional test,
the lower computer unit is also used for configuring part of general input/output pins of the lower computer unit as data or clock signal output ports, performing data interaction with the tested chip through the data or clock signal output ports, recording test data of the tested main chip and the tested substitute chip, and sending the test data to the upper computer unit;
The upper computer unit is used for inquiring the test data of the tested main chip and the tested substitute chip sent by the lower computer unit in real time, performing comparison analysis based on the test data of the tested main chip and the tested substitute chip, and outputting the functional test comparison analysis results of the tested main chip and the tested substitute chip.
7. The chip comparison test apparatus according to claim 4, wherein, in the case where the test instruction is for instructing signal test and functional test,
the lower computer unit is also used for configuring part of general input/output pins of the lower computer unit as data or clock signal output ports, performing data interaction with the tested chip through the data or clock signal output ports, recording test data of the tested main chip and the tested substitute chip, and sending the test data to the upper computer unit;
the oscilloscope unit is also used for acquiring a test waveform in the process of carrying out data interaction between the lower computer unit and the tested chip;
the upper computer unit is used for inquiring the test data of the tested main chip and the tested substitute chip sent by the lower computer unit in real time, performing comparison analysis based on the test data of the tested main chip and the tested substitute chip, and outputting a functional test comparison analysis result of the tested main chip and the tested substitute chip;
The upper computer unit is also used for analyzing the test waveforms in the process of data interaction between the lower computer unit and the tested chip and outputting the signal test results of the tested main chip and the tested substitute chip.
8. The chip comparison test device according to claim 6 or 7, wherein the power supply unit comprises a plurality of voltage adjusting units, and the lower computer unit is further used for performing voltage bias test on the tested chip by adjusting the output of different voltage adjusting units.
9. A chip comparison test method based on the chip comparison test apparatus according to any one of claims 1 to 8, comprising:
the upper computer unit sends a test instruction to the lower computer unit;
the lower computer unit receives the test instruction, and responds to the test instruction, and sends a test signal to a tested chip in the replaceable module through the connector unit;
the oscilloscope unit acquires a test waveform corresponding to the tested chip and sends the test waveform to the upper computer unit;
and the upper computer unit performs comparison analysis on the test waveform and outputs a comparison analysis result.
10. A non-transitory computer readable storage medium having stored thereon a computer program, which when executed by a processor implements the chip comparison test method of claim 9.
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