CN106649001B - CPCI bus backboard test system - Google Patents
CPCI bus backboard test system Download PDFInfo
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- CN106649001B CN106649001B CN201510725377.8A CN201510725377A CN106649001B CN 106649001 B CN106649001 B CN 106649001B CN 201510725377 A CN201510725377 A CN 201510725377A CN 106649001 B CN106649001 B CN 106649001B
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Abstract
The invention provides a CPCI bus backboard testing system, which comprises a power supply module, a CPCI excitation signal control unit, a CPCI excitation signal generation unit and an analysis unit, wherein the CPCI excitation signal control unit is used for controlling the CPCI excitation signal generation unit to generate a control signal; the CPCI excitation signal control unit is connected with the CPCI excitation signal generation unit, controls and selects the type of the CPCI bus excitation signal, generates a corresponding CPCI test control signal and sends the CPCI test control signal to the CPCI excitation signal generation unit; the CPCI excitation signal generating unit is connected with the analyzing unit, processes the received CPCI test control signal to generate a standard CPCI test signal, and then sends the standard CPCI test signal to the analyzing unit; the analysis unit is used for analyzing the received standard CPCI test signal and generating an analysis result. The CPCI bus backboard testing system provided by the invention replaces the fussy single-point signal test, and shortens the CPCI bus function verification period.
Description
Technical Field
The invention relates to the field of test systems, in particular to a compact peripheral component interconnect standard CPCI bus backboard test system.
Background
A Compact Peripheral Component Interconnect (CPCI) bus is a high-performance Industrial Computer bus standard developed by the international association of Industrial Computer manufacturers (PCI Industrial Computer manufacturers' group, PICMG) in 1994. The CPCI bus is based on the PCI electrical specification of the interconnection standard of the peripheral components, the problem that bus technologies such as VME and the like are not compatible with the PCI bus is solved, and the technologies such as x86 architecture based on a personal computer (PC for short), hard disk storage and the like can be used in the industrial field.
Because the number of CPCI bus signals is large, the conventional CPCI bus test method adopts instrument equipment to electrically test a single signal, and the CPCI bus function verification period is long.
Disclosure of Invention
The invention provides a CPCI bus backboard testing system which is used for solving the problems that the existing single-point signal testing is complicated and the CPCI bus function verification period is long.
The invention provides a compact peripheral component interconnect standard CPCI bus backboard test system, which comprises: the device comprises a power supply module, a CPCI excitation signal control unit, a CPCI excitation signal generation unit and an analysis unit;
wherein the power supply module is connected with the CPCI excitation signal control unit and the CPCI excitation signal generation unit; the CPCI excitation signal control unit is connected with the CPCI excitation signal generation unit and is used for controlling and selecting the type of a CPCI bus excitation signal, generating a corresponding CPCI test control signal and sending the generated CPCI test control signal to the CPCI excitation signal generation unit; the CPCI excitation signal generating unit is connected with the analyzing unit and is used for processing the received CPCI test control signal to generate a standard CPCI test signal and sending the generated standard CPCI test signal to the analyzing unit; the analysis unit is used for analyzing the received standard CPCI test signal and generating an analysis result.
Optionally, the CPCI bus backplane test system further includes: and the display unit is connected with the analysis unit and used for receiving the analysis result of the analysis unit for displaying.
Optionally, the CPCI excitation signal control unit further includes: the CPCI test control circuit comprises a CPCI excitation signal selection circuit and a CPCI excitation signal generation circuit, wherein the excitation signal selection circuit is used for selecting the type of a CPCI bus excitation signal, and the excitation signal generation circuit is used for generating a corresponding CPCI test control signal according to the type of the CPCI bus excitation signal.
Optionally, the CPCI excitation signal generation unit includes a CPU module and a CPCI bus connector, where the CPU module is configured to process the received CPCI test control signal generated by the CPCI excitation signal control unit and generate a standard CPCI test signal; the CPCI bus connector is configured to send the generated standard CPCI test signal to the analysis unit.
Optionally, the analysis unit includes a CPCI bus connection circuit, a CPCI signal analysis circuit, and a video transmission standard VGA bus connection circuit; the CPCI bus connecting circuit is used for receiving the standard CPCI test signal generated by the CPCI excitation signal generating unit; the CPCI signal analysis circuit is used for analyzing and processing the standard CPCI test signal, generating an analysis result and sending the analysis result to the display unit through the VGA bus connecting circuit.
Optionally, the power module includes a power conversion circuit, and the power conversion circuit is configured to convert a 5V dc voltage input into a 3.3V dc voltage and a 1.0V dc voltage output, and provide a 3.3V voltage and/or a 1.0V voltage for the CPCI excitation signal control unit and the CPCI excitation signal generation unit, respectively.
Optionally, the CPCI test control signal includes: the CPCI power supply test signal, the CPCI configuration access test signal, the CPCI memory access test signal and the CPCI interrupt test signal.
The CPCI bus backboard testing system comprises a power supply module, a CPCI excitation signal control unit, a CPCI excitation signal generation unit and an analysis unit; the CPCI excitation signal control unit is connected with the CPCI excitation signal generation unit, controls and selects the type of the CPCI bus excitation signal and generates a corresponding CPCI test control signal, and then sends the generated CPCI test control signal to the CPCI excitation signal generation unit; the CPCI excitation signal generating unit is connected with the analyzing unit, processes the received CPCI test control signal to generate a standard CPCI test signal, and sends the generated standard CPCI test signal to the analyzing unit; the analysis unit is used for analyzing the received standard CPCI test signal and generating an analysis result. The CPCI bus backboard testing system provided by the invention replaces the fussy single-point signal test, and shortens the CPCI bus function verification period.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a block diagram of a first embodiment of a backplane testing system provided by the present invention;
FIG. 2 is a block diagram of a second embodiment of a backplane testing system provided by the present invention;
fig. 3 is a block diagram of a CPCI excitation signal control unit;
fig. 4 is a block diagram of a CPCI excitation signal generating unit;
FIG. 5 is a block diagram of an analysis unit;
FIG. 6 is a circuit diagram of the power module 5V DC to 3.3V DC voltage conversion;
fig. 7 is a circuit diagram of the conversion of 5V dc voltage to 3.3V dc voltage of the power module.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The invention is suitable for testing the CPCI bus, needs the PCI3.0 protocol in the process of testing and verifying the CPCI bus, tests the address bus, the data bus, the power supply signal, the interrupt control signal and other bus management signals of the bus, generates a standard PCI protocol signal by the excitation equipment, sends the standard PCI protocol signal to the CPCI backboard to be tested, receives the CPCI bus signal at the receiving end for analysis, accurately analyzes and judges the correctness of the physical channel of the backboard, gives a corresponding test analysis report, and is convenient for a tester to accurately analyze and locate faults.
FIG. 1 is a block diagram of a first embodiment of a backplane testing system provided by the present invention; as shown in fig. 1, the backplane test system comprises: a power module 10, a CPCI excitation signal control unit 20, a CPCI excitation signal generation unit 30, and an analysis unit 40;
wherein the power module 10 is connected with the CPCI excitation signal control unit 20 and the CPCI excitation signal generation unit 30; the CPCI excitation signal control unit 20 is connected to the CPCI excitation signal generation unit 30, and the CPCI excitation signal control unit 20 is configured to control and select a CPCI bus excitation signal type and generate a corresponding CPCI test control signal, and send the generated CPCI test control signal to the CPCI excitation signal generation unit 30; the CPCI excitation signal generating unit 30 is connected to the analyzing unit 40, and the CPCI excitation signal generating unit 30 is configured to process the received CPCI test control signal to generate a standard CPCI test signal and send the generated standard CPCI test signal to the analyzing unit 40; the analysis unit 40 is configured to analyze the received standard CPCI test signal and generate an analysis result.
Specifically, the power module 10 is responsible for providing power to the CPCI excitation signal control unit 20 and the CPCI excitation signal generation unit 30, and can provide 3.3V and 1.0V power, specifically selected according to actual needs; the CPCI excitation signal control unit 20 is powered by the power module 10 and is responsible for selecting the type of the CPCI bus excitation signal, the type of the CPCI bus excitation signal includes a CPCI power supply test, a CPCI configuration access test, a CPCI memory access test and a CPCI interrupt signal test, and generates a CPCI test control signal, and the generated CPCI test control signal is sent to the CPCI excitation signal generation unit 30; the CPCI excitation signal generating unit 30 receives a CPCI test control signal output by a preceding stage, the CPCI test control signal is processed to generate a standard CPCI power supply test signal, a CPCI configuration access test signal, a CPCI memory access test signal and a CPCI interrupt test signal respectively, and the standard CPCI test signal is sent to the analyzing unit 40, the analyzing unit 40 is used for receiving the standard CPCI test signal generated by the CPCI excitation signal generating unit 30, performing signal analysis according to a standard PCI protocol, analyzing the CPCI power supply test, the CPCI configuration access test, the CPCI memory access test and the CPCI interrupt test signal respectively, and giving out an accurate signal analysis result and a fault list.
The CPCI bus backboard testing system comprises a power supply module, a CPCI excitation signal control unit, a CPCI excitation signal generation unit and an analysis unit; the CPCI excitation signal control unit is connected with the CPCI excitation signal generation unit, controls and selects the type of the CPCI bus excitation signal and generates a corresponding CPCI test control signal, and then sends the generated CPCI test control signal to the CPCI excitation signal generation unit; the CPCI excitation signal generating unit is connected with the analyzing unit, processes the received CPCI test control signal to generate a standard CPCI test signal, and sends the generated standard CPCI test signal to the analyzing unit; the analysis unit is used for analyzing the received standard CPCI test signal and generating an analysis result. The CPCI bus backboard testing system of the embodiment replaces a complex single-point signal test, and shortens the CPCI bus function verification period.
Fig. 2 is a block diagram of a second embodiment of the backplane test system provided by the present invention, and as shown in fig. 2, on the basis of the first embodiment, the CPCI bus backplane test system provided by the embodiment of the present invention further includes: and the display unit 50 is connected with the analysis unit 40 and is used for receiving the analysis result of the analysis unit 40 for displaying.
Specifically, the display unit 50 includes a display circuit for receiving and displaying the analysis report generated by the analysis unit 40, and the display unit 50 is used as a terminal device of the test system, and sends the result data of the analysis unit to the display circuit by receiving the result data, so as to display the test report and the fault point list.
Fig. 3 is a block diagram of a CPCI excitation signal control unit, and as shown in fig. 3, the CPCI excitation signal control unit 20 further includes: the CPCI test control circuit comprises a CPCI excitation signal selection circuit 21 and a CPCI excitation signal generation circuit 22, wherein the excitation signal selection circuit 21 is used for selecting the type of a CPCI bus excitation signal, and the excitation signal generation circuit 22 is used for generating a corresponding CPCI test control signal according to the type of the CPCI bus excitation signal.
Specifically, the excitation signal control unit 20 of the present embodiment is powered by the power module 3.3V, the excitation signal control unit 20 is composed of an excitation signal selection circuit 21 and an excitation signal generation circuit 22, the excitation signal selection circuit 21 is responsible for selecting a CPCI bus excitation signal type, the excitation signal generation circuit 22 generates a corresponding CPCI test control signal according to the selected CPCI bus excitation signal type, and sends the generated CPCI test control signal to the CPCI excitation signal generation unit; optionally, the CPCI test control signal is composed of a CPCI power supply test signal, a CPCI configuration access test, a CPCI memory access test, and a CPCI interrupt signal test.
Fig. 4 is a block diagram of a CPCI excitation signal generation unit, as shown in fig. 4, the CPCI excitation signal generation unit includes a CPU module for processing the received CPCI test control signal generated by the CPCI excitation signal control unit and generating a standard CPCI test signal, and a CPCI bus connector; the CPCI bus connector is configured to send the generated standard CPCI test signal to the analysis unit.
Specifically, the CPCI excitation signal generation unit 30 is responsible for generating test signals of each test case, and is composed of a CPU module 31 and a CPCI bus connector 32, the CPCI excitation signal generation unit 30 receives CPCI test control signals output by a preceding stage, the CPCI test control signals are processed by the CPU module 31 to generate standard CPCI test signals, and the standard CPCI test signals include: the CPCI bus connector 32 sends the generated standard CPCI test signal to the analysis unit 40.
Fig. 5 is a block diagram of an analyzing unit, and as shown in fig. 5, the analyzing unit 40 includes a CPCI bus connection circuit 41, a CPCI signal analyzing circuit 42, and a video transmission standard VGA bus connection circuit 43; the CPCI bus connection circuit 41 is configured to receive the standard CPCI test signal generated by the CPCI excitation signal generation unit; the CPCI signal analyzing circuit 42 is configured to analyze and process the standard CPCI test signal, generate an analysis result, and send the analysis result to the display unit through the VGA bus connecting circuit 43.
Specifically, the analyzing unit 40 is composed of a CPCI bus connecting circuit 41, a CPCI signal analyzing circuit 42, and a VGA bus connecting circuit 43, the CPCI bus connecting circuit 41 is configured to receive the standard CPCI test signal generated by the CPCI excitation signal generating unit 30, the CPCI signal analyzing circuit 42 performs signal analysis according to the standard PCI protocol, and optionally, the standard CPCI test signal used for analysis includes: the standard CPCI power supply test, the standard CPCI configuration access test, the standard CPCI memory access test, and the standard CPCI interrupt test signal, and the analysis result is sent to the display unit through the VGA bus connection circuit 43.
FIG. 6 is a circuit diagram of the power module 5V DC to 3.3V DC voltage conversion; FIG. 7 is a circuit diagram of the power module 5V DC to 3.3V DC voltage conversion; as shown in fig. 6 and 7, the power module 10 includes a power conversion circuit, which is configured to convert a 5V dc voltage input into 3.3V and 1.0V dc voltage outputs, and provide 3.3V and/or 1.0V voltages for the CPCI excitation signal control unit and the CPCI excitation signal generation unit, respectively.
Specifically, the power module 10 is a DC/DC linear conversion power supply, converts a 5V DC input into 3.3V and 1.0V DC outputs, removes noise of the switching power supply through a filter circuit composed of a plurality of filter capacitors, resistive loads, and inductors (L13 and L2), reduces interference to the CPCI excitation signal control unit 20 and the CPCI excitation signal generation unit 30, and sends the converted voltage to the CPCI excitation signal control unit 20 and the CPCI excitation signal generation unit 30. The CPCI excitation signal control unit 20 may be supplied with 3.3V and 1.0V dc voltages, or only with 3.3V dc voltages, or only with 1.0V dc voltages, as required; also, the CPCI excitation signal generating unit 30 may be supplied with 3.3V and 1.0V dc voltages, or only with 3.3V dc voltages, or only with 1.0V dc voltages.
Those of ordinary skill in the art will understand that: all or a portion of the steps of implementing the above-described method embodiments may be performed by hardware associated with program instructions. The program may be stored in a computer-readable storage medium. When executed, the program performs steps comprising the method embodiments described above; and the aforementioned storage medium includes: various media that can store program codes, such as ROM, RAM, magnetic or optical disks.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (4)
1. A compact peripheral component interconnect standard CPCI bus backplane test system, comprising: the device comprises a power supply module, a CPCI excitation signal control unit, a CPCI excitation signal generation unit and an analysis unit;
the power supply module is respectively connected with the CPCI excitation signal control unit and the CPCI excitation signal generation unit; the CPCI excitation signal control unit is connected with the CPCI excitation signal generation unit and is used for controlling and selecting the type of a CPCI bus excitation signal, generating a corresponding CPCI test control signal and sending the generated CPCI test control signal to the CPCI excitation signal generation unit; the CPCI excitation signal generating unit is connected with the analyzing unit and is used for processing the received CPCI test control signal to generate a standard CPCI test signal and sending the generated standard CPCI test signal to the analyzing unit; the analysis unit is used for analyzing the received standard CPCI test signal and generating an analysis result;
further comprising: the display unit is connected with the analysis unit and used for receiving the analysis result of the analysis unit for displaying;
the CPCI excitation signal generation unit comprises a CPU module and a CPCI bus connector, wherein the CPU module is used for processing the received CPCI test control signal generated by the CPCI excitation signal control unit and generating a standard CPCI test signal; the CPCI bus connector is used for sending the generated standard CPCI test signal to the analysis unit;
the analysis unit comprises a CPCI bus connection circuit, a CPCI signal analysis circuit and a video transmission standard VGA bus connection circuit; the CPCI bus connecting circuit is used for receiving the standard CPCI test signal generated by the CPCI excitation signal generating unit; the CPCI signal analysis circuit is used for analyzing and processing the standard CPCI test signal, generating an analysis result and sending the analysis result to the display unit through the VGA bus connecting circuit.
2. The system of claim 1, wherein the CPCI excitation signal control unit comprises: the CPCI test control circuit comprises a CPCI excitation signal selection circuit and a CPCI excitation signal generation circuit, wherein the CPCI excitation signal selection circuit is used for selecting the type of a CPCI bus excitation signal, and the CPCI excitation signal generation circuit is used for generating a corresponding CPCI test control signal according to the type of the CPCI bus excitation signal.
3. The system of claim 1, wherein the power module comprises a power conversion circuit for converting a 5V dc voltage input to 3.3V and 1.0V dc voltage outputs for providing 3.3V and/or 1.0V dc voltages to the CPCI excitation signal control unit and the CPCI excitation signal generation unit, respectively.
4. The system of claim 3, wherein the CPCI test control signal comprises:
the CPCI power supply test signal, the CPCI configuration access test signal, the CPCI memory access test signal and the CPCI interrupt test signal.
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| CN201510725377.8A CN106649001B (en) | 2015-10-29 | 2015-10-29 | CPCI bus backboard test system |
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| CN201510725377.8A CN106649001B (en) | 2015-10-29 | 2015-10-29 | CPCI bus backboard test system |
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| CN106649001A CN106649001A (en) | 2017-05-10 |
| CN106649001B true CN106649001B (en) | 2020-04-28 |
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| CN101937222B (en) * | 2010-08-17 | 2012-04-25 | 北京交大资产经营有限公司 | Board level testing system |
| CN203054186U (en) * | 2013-01-31 | 2013-07-10 | 武汉华中数控股份有限公司 | Universal board testing device |
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Inventor after: Shi Xiaolei Inventor after: Yan Ning Inventor after: Zhang Libin Inventor after: Yan Dong Inventor after: Lv Yanwen Inventor before: Shi Xiaolei Inventor before: Du Zhenhuan Inventor before: Zhang Libin Inventor before: Liu Chenxi |
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