CN111459730A

CN111459730A - PCH (physical channel) end parameter adjusting method and system under Whitley platform

Info

Publication number: CN111459730A
Application number: CN202010170669.0A
Authority: CN
Inventors: 吴坤阳
Original assignee: Suzhou Inspur Intelligent Technology Co Ltd
Current assignee: Suzhou Inspur Intelligent Technology Co Ltd
Priority date: 2020-03-12
Filing date: 2020-03-12
Publication date: 2020-07-28

Abstract

The application discloses a method and a system for adjusting PCH end parameters under a Whitley platform, wherein the method comprises the following steps: building a host test environment; establishing connection between a host and a server to be tested by modifying the configuration of a BIOS in the server to be tested; acquiring a target value to be modified; inquiring the register address of the register to be modified according to the acquired command; the target value is written to the register address. The system comprises: the device comprises a test environment building module, a connecting module, a target value obtaining module, an addressing module and a writing module. Through the method and the device, the test time can be greatly saved, and the parameter adjustment efficiency of the PCH terminal is improved.

Description

PCH (physical channel) end parameter adjusting method and system under Whitley platform

Technical Field

The application relates to the technical field of signal testing, in particular to a method and a system for adjusting parameters of a PCH (physical channel) terminal under a Whitley platform.

Background

In the X86 server architecture, a PCH (Platform Controller Hub, integrated south bridge of Intel corporation) plays a crucial role in the motherboard chipset. The PCH includes many other high-speed I/O interfaces in addition to the high-speed signal interface for communicating with the CPU. To ensure the server operates normally, integrity tests need to be performed on the high-speed information.

The most critical in the signal integrity test is the signal eye diagram margin test at the receiving end of the PCH chip. The test needs to use a test Tool IOMT (IO Margin Tool), and to ensure the integrity of the link signal, the parameters of the PCH chip side need to be adjusted.

The method for adjusting parameters of a PCH chip end mainly comprises the steps of modifying a configuration register of a high-speed I/O interface of the PCH chip end by modifying a BIOS (Basic input output System) code, so as to adjust the parameters of the PCH chip end, concretely, firstly modifying a BIOS source code under an L inux System or a Shell System, secondly shutting down a server, burning the modified source code into a BIOS EEPROM (Electrically erasable programmable Read-Only Memory), secondly starting the server and checking whether burning is successful, and finally, testing the signal eye diagram allowance under the Windows System after burning is successful.

However, in the current method for adjusting parameters of the PCH chip side, the server needs to be respectively powered off, powered on, and burned, so the operation is complicated, and the operation is performed under different systems. Therefore, the conventional method for adjusting parameters of the PCH chip side is complicated in steps, consumes more time, and has low parameter adjustment efficiency.

Disclosure of Invention

The application provides a method and a system for adjusting parameters of a PCH (channel-channel) end under a Whitley platform, which are used for solving the problems that in the prior art, the method for adjusting the parameters of the PCH chip end is complex in operation, more in time consumption and lower in parameter adjusting efficiency.

In order to solve the technical problem, the embodiment of the application discloses the following technical scheme:

a PCH end parameter adjusting method under a Whitley platform is applied to a signal eye diagram residue testing system, and the signal eye diagram residue testing system comprises the following steps: the system comprises a host and a server to be tested, wherein the host is used for testing the signal eye diagram allowance of the server to be tested, and a PCH end is arranged on the server to be tested, and the method comprises the following steps:

building a host test environment;

establishing connection between a host and a server to be tested by modifying the configuration of a BIOS in the server to be tested;

acquiring a target value to be modified;

inquiring the register address of the register to be modified according to the acquired command;

writing the target value to the register address.

Optionally, before writing the target value to the register address, the method further includes:

reading a value in the register address;

judging whether the high-speed interface of the parameter to be adjusted is in a normal working state or not according to the value in the register address;

if yes, executing the next step;

if not, an error report is sent.

Optionally, the building a host test environment includes:

installing an Intel Test environment PVT (Process Verification Test) on a host computer;

installing a Cscript tool on a host, wherein the Cscript tool is used for reading and writing parameters of a register at a PCH end;

and installing a Python command library on the host, wherein the Python command library is used for connecting the host and the server to be tested.

Optionally, the establishing the connection between the host and the server to be tested by modifying the configuration of the BIOS in the server to be tested includes:

establishing connection between the host and a PCH end register in the server to be tested according to the acquired command;

and establishing the connection between the host and PCH end HSIO (High Speed input/output interface) interface equipment in the server to be tested according to the acquired command.

Optionally, querying a register address of a register to be modified according to the obtained command includes:

inquiring the high-speed interface type of the register to be modified according to the acquired command;

inquiring a link to be modified under the high-speed interface type;

selecting a port type of a register to be modified under the link, wherein the port type comprises: a receiving end or a transmitting end;

and querying the DWORD (Double word, which is a type of key value) of the register to be modified under the port type.

A PCH end parameter adjustment system under Whitley platform, the system comprising:

the test environment building module is used for building a host test environment, and the host is used for testing the signal eye diagram allowance of the server to be tested;

the connecting module is used for modifying the configuration of a BIOS in a server to be tested and establishing the connection between a host and the server to be tested, and the PCH end is arranged on the server to be tested;

the target value acquisition module is used for acquiring a target value to be modified;

the addressing module is used for inquiring the register address of the register to be modified according to the acquired command;

a write module to write the target value to the register address.

Optionally, the system further includes: and the checking module is used for confirming whether the high-speed interface of the parameter to be adjusted is in a normal working state.

Optionally, the verification module includes:

a register value reading unit for reading a value in the register address;

and the judging unit is used for judging whether the high-speed interface of the parameter to be adjusted is in a normal working state or not according to the value in the register address, if so, executing the next step, and if not, sending an error report.

Optionally, the test environment building module includes:

the PVT building unit is used for installing an Intel test environment PVT on the host;

the device comprises a Cscript tool mounting unit, a host computer and a data processing unit, wherein the Cscript tool mounting unit is used for mounting a Cscript tool on the host computer, and the Cscript tool is used for reading and writing PCH end register parameters;

the Python command library installation unit is used for installing a Python command library on a host, and the Python command library is used for connecting the host and a server to be tested.

Optionally, the addressing module comprises:

the high-speed interface type query unit is used for querying the high-speed interface type of the register to be modified according to the acquired command;

the link query unit is used for querying a link to be modified under the high-speed interface type;

a port type selection unit, configured to select, under the link, a port type of a register to be modified, where the port type includes: a receiving end or a transmitting end;

and the DWORD query unit is used for querying the DWORD of the register to be modified under the port type.

The technical scheme provided by the embodiment of the application can have the following beneficial effects:

the method is applied to a signal eye diagram allowance test system, firstly, a host test environment is set up, and secondly, the connection between a host and a server to be tested is established by modifying the configuration of a Basic Input Output System (BIOS) in the server to be tested; then obtaining a target value to be modified; inquiring the register address of the register to be modified according to the acquired command; and finally writing the target value into the register address. According to the embodiment, the Intel test environment PVT is built in the host, the Cscript tool can be directly installed under the Windows system of the host, and the PCH end HSIO configuration register is modified by the Cscript tool, so that the reading, writing and register checking are realized, the server does not need to be restarted, the burning and other operations are not needed, the test time is saved, and the PCH end parameter adjustment efficiency is improved. And after the PCH end parameter in the server to be tested is modified by adopting the method in the embodiment, the IOMT can be directly used for carrying out the signal eye diagram allowance test, and the operation is very convenient.

In addition, in the embodiment, when the register address of the register to be modified is queried, the hierarchical screening mode is adopted for querying, so that the querying efficiency and accuracy can be improved, and the efficiency of parameter debugging of the PCH terminal is improved.

The present application further provides a PCH terminal parameter adjusting system under the Whitley platform, which mainly includes: the device comprises a test environment building module, a connecting module, a target value obtaining module, an addressing module and a writing module. The method has the advantages that the Cscript tool can be directly installed under the Windows system of the host through the Intel test environment PVT built by the test environment building module, so that the PCH end HSIO configuration register is modified by the Cscript tool, and reading, writing and checking of the register are realized. The whole process does not need to restart the server, does not need operations such as burning and the like, can optimize a test flow, greatly saves test time, and improves parameter adjustment efficiency of the PCH terminal. Moreover, after the method in the embodiment is adopted to modify the parameters of the PCH end in the server to be tested, the IOMT can be directly used for testing the signal eye diagram allowance, and the operation is very convenient.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and together with the description, serve to explain the principles of the application.

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.

Fig. 1 is a schematic flow chart illustrating a method for adjusting parameters of a PCH terminal of a Whitley platform according to an embodiment of the present disclosure;

FIG. 2 is a schematic diagram illustrating a path for querying a register address of a register to be modified by using a hierarchical screening method according to an embodiment of the present application;

fig. 3 is a schematic structural diagram of a system for adjusting parameters of a PCH port of a Whitley platform according to an embodiment of the present disclosure.

Detailed Description

In order to make those skilled in the art better understand the technical solutions in the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

For a better understanding of the present application, embodiments of the present application are explained in detail below with reference to the accompanying drawings.

Referring to fig. 1, fig. 1 is a schematic flow chart illustrating a method for adjusting parameters of a PCH terminal of a Whitley platform according to an embodiment of the present disclosure. As shown in fig. 1, the method for adjusting parameters of the PCH terminal in the Whitley platform in this embodiment mainly includes the following steps:

s1: and (5) building a host test environment.

The method is applied to a signal eye diagram allowance test system, and the signal eye diagram allowance test system generally comprises a Host and a server to be tested, wherein the Host is Host, the server to be tested is server, the Host is used for carrying out signal eye diagram allowance test on the server to be tested, and a PCH end is arranged on the server to be tested.

When a Host Test environment is established, an XDP (extensible Debug Port, in this embodiment, a Debug simulator tool is used to connect the USB interface of the Host and the XDP interface of the server to be tested, where the XDP interface of the server to be tested is also a JTAG (Joint Test Action Group) interface of the server to be tested. Of course, the Host and the USB3.0 interface of the Server may also be connected through a DCI line, and a PCH DCI function needs to be turned on in the servermos. And simultaneously, switching on an Alternating Current (AC) power supply of the Server to be tested, entering a BIOS modification interface to carry out related BIOS option configuration so that the Host can normally read the state of each chip of the Server to be tested, and enabling the Server to be tested to enter a Halt state to respond to a Cscript tool interrupt command.

Specifically, step S1 includes the following processes:

s11: and installing an Intel test environment PVT on the host computer.

Through the establishment of the test environment, the Cscript tool can be directly installed under the Windows system of the host, so that the PCH end HSIO configuration register is modified by using the Cscript tool without modifying the BIOS source code, and the parameter adjustment efficiency can be greatly improved.

S12: and installing a Cscript tool on the host, wherein the Cscript tool is used for reading and writing PCH end register parameters.

S13: and installing a Python command library on the host, wherein the Python command library is used for connecting the host and the server to be tested.

With continued reference to fig. 1, after the host test environment is built, step S2 is executed: and establishing the connection between the host and the server to be tested by modifying the configuration of the BIOS in the server to be tested.

In this embodiment, the host computer csccript tool is used to establish the connection between the host computer and the server to be tested, and specifically, the step S2 includes the following steps:

s21: and establishing the connection between the host and the PCH end register in the server to be tested according to the acquired command.

S22: and establishing the connection between the host and the HSIO interface equipment at the PCH end in the server to be tested according to the acquired command.

According to the above steps S21 and S22, the modification of the BIOS configuration in the server under test in the practical application can be implemented as follows:

1) and after the server to be tested is started, pressing a Del key to enter a BIOS configuration interface.

2) The IIO Configuration → IIO DFX Configuration → Enable EV DFX option is modified to Enable, so that the host can access the Server PCH chip side registers.

3) PCH Configuration → PCH DFX Configuration → derived P2SB device option is modified to Enable so that the PCH side HSIO interface device can be scanned by the host.

4) Save the BIOS settings and exit.

S3: a target value to be modified is obtained.

S4: and inquiring the register address of the register to be modified according to the acquired command.

In this embodiment, the register address of the modified register is queried in a hierarchical screening manner. Specifically, the method can be classified into four levels of screening, and step S4 includes the following steps:

s41: and inquiring the high-speed interface type of the register to be modified according to the acquired command.

S42: and inquiring the link to be modified under the high-speed interface type.

S43: under the link, selecting a port type of a register to be modified, wherein the port type comprises: a receiving end or a transmitting end.

S44: the DWORD of the register to be modified is queried under the port type.

Through the steps S41-S44, the present embodiment can edit the external table, and query and modify the register address of the register in four levels, so that the register addresses under different links can be quickly, efficiently and accurately identified in the same interface, and the efficiency and accuracy of adjusting parameters of the PCH terminal are improved.

In this embodiment, a path diagram of a register address of a register to be modified is queried in a hierarchical screening manner, which may be shown in fig. 2. according to fig. 2, a high-speed interface type to be tested is firstly screened, namely, Uplink/DMI/SATA/USB/PCIe, a link to be modified is secondly screened (USB: L ANE 0-10; PCIe: L ANE 1-20; SATA: L ANE 0-7; SATA: L ANE 0-5; DMI: L ANE 0-3; Uplink: L ANE0-15), then, a port type to be modified is selected as a receiving end or a transmitting end, and finally, a DWORD to be modified is screened (Tx:5,6,8, 9; Rx:7,20,21,25,40, 41).

In addition, since DWORD7 and DWORD25 are only for PCIe and Uplink in FIG. 2, this path return value is null at external screening. And DWORD40 and DWORD41 only aim at Uplink, and the path return values of all the other end points are null except for Uplink at the starting point during screening. The return value is null, indicating that the current interface does not have the DWORD.

With continued reference to fig. 1, after querying the register address of the register to be modified, step S8 is executed: the target value is written to the register address.

Further, before step S8, the method may further include the following steps:

s5: the value in the register address is read.

S6: and judging whether the high-speed interface of the parameter to be adjusted is in a normal working state or not according to the value in the register address.

If the high-speed interface of the parameter to be adjusted is in the normal working state, executing the next step, namely step S8; if the high-speed interface to be parameter-adjusted is not in the normal operation state, that is, in the abnormal operation state, step S7 is executed: an error report is sent.

As known from the above steps S5-S7, the present embodiment can read the values of the corresponding registers by means of mem commands, and then return the values to an external table for easy visual viewing and access. And reading the stored value in the address register by using a command to judge whether the interface works normally at present, and if the read value is abnormal, feeding back an error report.

The method for judging whether the interface works normally at present takes PCH c620a SATA as an example, CT L E is from 0dB to 12dB, 0.8dB is 16 steps in total, the value stored in a register is 0-15, the value exceeds the value and the interface works abnormally.

Through the above steps S5-S7, the high-speed interface state can be verified before the target value is written into the register address, thereby improving the accuracy of parameter adjustment.

In summary, in this embodiment, the PCH terminal HSIO configuration register is modified by using the csccript script tool, and after the csccript tool script is installed in the host Windows system, the ITP is used to access the JTAG interface on the motherboard, so as to establish a connection and directly modify the PCH terminal HSIO register by using a command, so that the PCH terminal parameter adjustment efficiency is high. Moreover, after the parameter adjusting method is adopted, the IOMT can be directly used for carrying out a Margin test, and the method is convenient and quick.

Example two

Referring to fig. 3 based on the embodiments shown in fig. 1 and fig. 2, fig. 3 is a schematic structural diagram of a system for adjusting parameters of a PCH terminal of a Whitley platform according to an embodiment of the present disclosure. As shown in fig. 3, the system for adjusting parameters of the PCH terminal of the Whitley platform in this embodiment mainly includes: the device comprises a test environment building module, a connecting module, a target value obtaining module, an addressing module and a writing module.

The testing environment building module is used for building a host testing environment, and the host is used for testing the signal eye pattern allowance of the server to be tested. The connecting module is used for modifying the configuration of the BIOS in the server to be tested and establishing the connection between the host and the server to be tested, and the PCH end is arranged on the server to be tested. And the target value acquisition module is used for acquiring the target value to be modified. And the addressing module is used for inquiring the register address of the register to be modified according to the acquired command. And the writing module is used for writing the target value into the register address.

Furthermore, the system also comprises a checking module used for confirming whether the high-speed interface of the parameter to be adjusted is in a normal working state. Specifically, the verification module includes: a register value reading unit and a judging unit. The register value reading unit is used for reading the value in the register address. And the judging unit is used for judging whether the high-speed interface of the parameter to be adjusted is in a normal working state or not according to the value in the register address, if so, executing the next step, and if not, sending an error report.

The test environment building module comprises: the device comprises a PVT building unit, a Cscript tool installation unit and a Python command library installation unit. The PVT building unit is used for installing the Intel test environment PVT on the host. And the Cscript tool mounting unit is used for mounting a Cscript tool on the host, and the Cscript tool is used for reading and writing the PCH end register parameters. The Python command library installation unit is used for installing a Python command library on the host, and the Python command library is used for connecting the host and the server to be tested.

The addressing module comprises: a high speed interface type query unit, a link query unit, a port type selection unit and a DWORD query unit. The high-speed interface type query unit is used for querying the high-speed interface type of the register to be modified according to the acquired command. And the link query unit is used for querying the link to be modified under the high-speed interface type. A port type selection unit, configured to select, under a link, a port type of a register to be modified, where the port type includes: a receiving end or a transmitting end. And the DWORD query unit is used for querying the DWORD of the register to be modified under the port type.

The connection module includes: a first connecting unit and a second connecting unit. The first connection unit is used for establishing the connection between the host and the PCH end register in the server to be tested according to the acquired command. And the second connecting unit is used for establishing the connection between the host and the HSIO interface equipment at the PCH end in the server to be tested according to the acquired command.

The working principle and the working method of the PCH end parameter adjustment system in the Whitley platform in this embodiment have already been explained in detail in the embodiments shown in fig. 1 and fig. 2, and are not described herein again.

The above description is merely exemplary of the present application and is presented to enable those skilled in the art to understand and practice the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A PCH end parameter adjusting method under a Whitley platform is applied to a signal eye diagram residue testing system, and the signal eye diagram residue testing system comprises the following steps: the device comprises a host and a server to be tested, wherein the host is used for testing the signal eye diagram allowance of the server to be tested, and a PCH end is arranged on the server to be tested, and the device is characterized in that the method comprises the following steps:

building a host test environment;

acquiring a target value to be modified;

writing the target value to the register address.

2. The method for adjusting PCH side parameters of Whitley platform according to claim 1, wherein before writing the target value into the register address, the method further comprises:

reading a value in the register address;

if yes, executing the next step;

if not, an error report is sent.

3. The method for adjusting parameters of the PCH terminal of the Whitley platform according to claim 1, wherein the building of the host test environment comprises:

installing an Intel test environment PVT on a host;

4. The method for adjusting parameters of the PCH terminal of the Whitley platform according to claim 1, wherein the establishing of the connection between the host and the server under test by modifying the configuration of the BIOS in the server under test comprises:

and establishing the connection between the host and the HSIO interface equipment at the PCH end in the server to be tested according to the acquired command.

5. The method for adjusting parameters of a PCH terminal in a Whitley platform according to any one of claims 1 to 4, wherein said querying the register address of the register to be modified according to the obtained command comprises:

inquiring a link to be modified under the high-speed interface type;

the DWORD of the register to be modified is queried under the port type.

6. A PCH end parameter adjusting system under a Whitley platform is characterized by comprising:

a write module to write the target value to the register address.

7. The system for adjusting parameters of the PCH end of a Whitley platform according to claim 6, wherein the system further comprises: and the checking module is used for confirming whether the high-speed interface of the parameter to be adjusted is in a normal working state.

8. The system for adjusting PCH end parameters of a Whitley platform according to claim 7, wherein the checking module comprises:

a register value reading unit for reading a value in the register address;

9. The system for adjusting parameters of a PCH terminal of a Whitley platform according to claim 6, wherein the test environment building module comprises:

10. The system for adjusting PCH end parameters of a Whitley platform according to any of claims 6-9, wherein the addressing module comprises: