CN117727782B - Epitaxial structure of high electron mobility transistor and preparation method thereof - Google Patents

Epitaxial structure of high electron mobility transistor and preparation method thereof Download PDF

Info

Publication number
CN117727782B
CN117727782B CN202410160463.8A CN202410160463A CN117727782B CN 117727782 B CN117727782 B CN 117727782B CN 202410160463 A CN202410160463 A CN 202410160463A CN 117727782 B CN117727782 B CN 117727782B
Authority
CN
China
Prior art keywords
layer
sub
doped nitride
doped
depositing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202410160463.8A
Other languages
Chinese (zh)
Other versions
CN117727782A (en
Inventor
侯合林
谢志文
张铭信
陈铭胜
文国昇
金从龙
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jiangxi Zhao Chi Semiconductor Co Ltd
Original Assignee
Jiangxi Zhao Chi Semiconductor Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jiangxi Zhao Chi Semiconductor Co Ltd filed Critical Jiangxi Zhao Chi Semiconductor Co Ltd
Priority to CN202410160463.8A priority Critical patent/CN117727782B/en
Publication of CN117727782A publication Critical patent/CN117727782A/en
Application granted granted Critical
Publication of CN117727782B publication Critical patent/CN117727782B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Junction Field-Effect Transistors (AREA)

Abstract

The invention relates to the technical field of laser diodes and discloses an epitaxial structure of a high-electron-mobility transistor and a preparation method thereof. By implementing the method, the dislocation density can be reduced, the crystal quality of the prepared epitaxial film is improved, the blocking capability of electrons on a channel layer is enhanced, the leakage current of a buffer layer is reduced, the mobility of two-dimensional electron gas is improved, the current collapse effect is inhibited, the breakdown resistance of the device is improved, and the performance of the device is improved.

Description

Epitaxial structure of high electron mobility transistor and preparation method thereof
Technical Field
The invention relates to the technical field of transistors, in particular to an epitaxial structure of a high electron mobility transistor and a preparation method thereof.
Background
The epitaxial GaN film is deposited on the Si substrate, and the crystal quality of the epitaxial GaN film directly deposited on the substrate is very poor and even cracks easily occur due to lattice mismatch and thermal mismatch between the epitaxial GaN film and the Si substrate, so that a thicker AlN buffer layer or AlGaN buffer layer needs to be deposited, and the problems of crystal quality and easy cracking of the GaN film are improved.
But AlN and AlGaN buffer layers still have a high degree of lattice mismatch, and thus, even if AlN and AlGaN are used as the buffer layers, the finally grown GaN film has a high dislocation density. In addition, electrons of the channel layer are easy to leak to the buffer layer, so that leakage current of the buffer layer is increased, breakdown voltage of the device is reduced, and mobility of the electrons is reduced.
Disclosure of Invention
The invention aims to solve the technical problems of providing an epitaxial structure of a high electron mobility transistor and a preparation method thereof, which are used for reducing dislocation density, improving crystal quality of the epitaxial structure, enhancing blocking capability of electrons of a channel layer and inhibiting current collapse effect.
In order to solve the technical problem, a first aspect of the present invention provides an epitaxial structure of a high electron mobility transistor, including a substrate, a buffer layer, a barrier layer, a channel layer, an AlN insertion layer, a barrier layer, and a cap layer sequentially stacked on the substrate, where the barrier layer includes an element doped nitride layer and a two-dimensional graphene layer, the element doped nitride layer is an alternating stacked structure, and the element doped nitride layer includes Mg doped nitride sublayers and C doped nitride sublayers that are alternately arranged;
the doping concentration of Mg in the Mg-doped nitride sub-layer is 1 multiplied by 10 16atmos/cm3~1×1020atmos/cm3; the thickness of the Mg doped nitride sub-layer is 100 nm-250 nm;
The doping concentration of C in the C-doped nitride sub-layer is 1 multiplied by 10 16atmos/cm3~1×1020atmos/cm3, and the thickness of the C-doped nitride sub-layer is 150 nm-350 nm.
As an improvement of the above scheme, the number of alternating cycles of the alternating laminated structure is 2-20.
As an improvement of the above scheme, the nitride of the Mg doped nitride sub-layer is selected from any one or more of InGaN, gaN, inAlGaN; the nitride in the C-doped nitride sub-layer is selected from any one or more of AlGaN, BGaN, scGaN, BAlGaN, scAlGaN.
As an improvement of the above scheme, the forbidden bandwidth of the Mg doped nitride sub-layer is smaller than that of the C doped nitride sub-layer.
As an improvement of the scheme, the Mg-doped nitride sub-layer is an Mg-doped InGaN sub-layer, and the In component of the Mg-doped InGaN sub-layer is 0.05-0.3;
The C-doped nitride sub-layer is a C-doped ScAlGaN sub-layer, the Sc component of the C-doped ScAlGaN sub-layer is 0.01-0.2, and the Al component of the C-doped ScAlGaN sub-layer is 0.01-0.3.
As an improvement of the above scheme, the Sc component in the C-doped ScAlGaN sub-layer increases and decreases, and the Al component increases and decreases.
As an improvement of the scheme, the thickness of the two-dimensional graphene layer is 2 nm-20 nm.
As an improvement of the scheme, the growth temperature of the Mg-doped nitride sub-layer is 800-1200 ℃, and the reaction pressure is 100-200 torr;
The growth temperature of the C-doped nitride sub-layer is 750-1000 ℃, and the reaction pressure is 50-150 torr;
The growth temperature of the two-dimensional graphene layer is 600-800 ℃, the reaction pressure is 0.5-1 torr, the radio frequency power is 20-50W, the growth atmosphere is CH 4、H2 and Ar, the inflow rate of CH 4 is 0.8-1.6 slm, the inflow rate of H 2 is 1-2 slm, and the inflow rate of Ar is 1-4 slm.
Accordingly, a second aspect of the present invention provides a method for preparing an epitaxial structure of a high electron mobility transistor, including:
S01, providing a substrate;
s02, depositing a buffer layer on the substrate;
s03, depositing a barrier layer on the buffer layer;
The barrier layer comprises an element doped nitride layer and a two-dimensional graphene layer, the element doped nitride layer is of an alternating lamination structure, and the element doped nitride layer comprises Mg doped nitride sublayers and C doped nitride sublayers which are alternately arranged;
The growth temperature of the Mg-doped nitride sub-layer is 800-1200 ℃, and the reaction pressure is 100-200 torr; the growth temperature of the C-doped nitride sub-layer is 750-1000 ℃, and the reaction pressure is 50-150 torr; the growth temperature of the two-dimensional graphene layer is 600-800 ℃, the reaction pressure is 0.5-1 torr, the radio frequency power is 20-50W, the growth atmosphere is CH 4、H2 and Ar, the access flow of CH 4 is 0.8-1.6 slm, the access flow of H 2 is 1-2 slm, and the access flow of Ar is 1-4 slm;
s04, depositing a channel layer on the barrier layer;
S05, depositing an AlN inserting layer on the channel layer;
s06, depositing a barrier layer on the AlN inserting layer;
S07, depositing a cap layer on the barrier layer.
The implementation of the invention has the following beneficial effects:
According to the invention, the barrier layer between the buffer layer and the channel layer comprises the element doped nitride layer and the two-dimensional graphene layer, the element doped nitride layer is of an alternate lamination structure, and the doped elements are Mg and/or C, so that the crystal quality of the prepared epitaxial film can be improved, the dislocation density can be reduced, the breakdown resistance of the device can be improved, and the performance of the device can be improved. Meanwhile, the blocking capability of electrons on the channel layer can be enhanced, the leakage current of the buffer layer is reduced, the mobility of the two-dimensional electron gas is improved, and the current collapse effect is inhibited.
Drawings
Fig. 1: the invention discloses a schematic diagram of an epitaxial structure of a high electron mobility transistor.
Description of the drawings:
1-a substrate; 2-a buffer layer; a 3-barrier layer; 31-an element doped nitride layer; 311-Mg doped nitride sublayers; a 312-C doped nitride sub-layer; 32-a two-dimensional graphene layer; 4-a channel layer; a 5-AlN insertion layer; a 6-barrier layer; 7-cap layer.
Detailed Description
The present invention will be described in further detail with reference to the following examples, in order to make the objects, technical solutions and advantages of the present invention more apparent.
In order to solve the above-mentioned problems, referring to fig. 1, the present invention provides an epitaxial structure of a high electron mobility transistor, comprising a substrate 1, a buffer layer 2, a barrier layer 3, a channel layer 4, an AlN insertion layer 5, a barrier layer 6, and a cap layer 7 sequentially stacked on the substrate 1, wherein the barrier layer 3 comprises an element doped nitride layer 31 and a two-dimensional graphene layer 32, the element doped nitride layer is an alternating stacked structure, and the element doped nitride layer 31 comprises Mg doped nitride sublayers 311 and C doped nitride sublayers 312 alternately arranged.
According to the invention, the blocking capability of electrons in the channel layer 4 can be enhanced by arranging the blocking layer 3 between the buffer layer 2 and the channel layer 4, the leakage current of the buffer layer 2 can be reduced, the mobility of two-dimensional electron gas can be improved, the current collapse effect can be restrained, the blocking layer 3 comprises the element doped nitride layer 31 and the two-dimensional graphene layer 32, the element doped nitride layer 31 is of an alternate laminated structure, the doped elements are Mg and/or C, the dislocation density can be reduced, the extension of growth dislocation can be blocked, the crystal quality of the prepared epitaxial film can be improved, the breakdown resistance of the device can be improved, the performance of the device can be improved, on one hand, the two-dimensional material characteristic of the two-dimensional graphene layer 32 can isolate the doped elements from diffusing to the channel layer 4 to a certain extent, the reduction of the two-dimensional electron gas concentration in the channel layer 4 can be avoided, on the other hand, the dislocation of the buffer layer 2 and the element doped nitride layer 31 extending can be blocked, the prepared crystal quality can be improved, and the reliability of the device can be improved.
Preferably, the number of alternating cycles is 2-20, and exemplary are 2, 4, 6,8, 10, 12, 14, 16, 18, 20, but not limited thereto.
Preferably, the band gap of the Mg doped nitride sub-layer 311 is smaller than that of the C doped nitride sub-layer 312, so as to improve the blocking capability of the blocking layer 3 to electrons of the channel layer 4.
Preferably, the nitride of the Mg doped nitride sub-layer 311 is selected from any one or more of InGaN, gaN, inAlGaN; more preferably InGaN, the In component is 0.05-0.3. The Mg doped InGaN sublayer has a lower potential well, which on the one hand reduces the migration rate of electrons penetrating the C doped nitride sublayer 312, and on the other hand accommodates and complexes with electrons penetrating the C doped nitride sublayer 312, further reducing the leakage current of the buffer layer 2 and reducing the current collapse effect.
Further, the thickness of the Mg doped nitride sub-layer 311 is 100nm to 250nm, and exemplary examples thereof are 100nm, 125nm, 150nm, 175nm, 200nm, 225nm, and 250nm, but not limited thereto, and the Mg doped nitride sub-layer 311 has a Mg doping concentration of 1×10 16atmos/cm3~1×1020atmos/cm3, and exemplary examples thereof are 1×1016atmos/cm3、5×1016atmos/cm3、1×1017atmos/cm3、5×1017atmos/cm3、1×1018atmos/cm3、5×1018atmos/cm3、1×1019atmos/cm3、5×1019atmos/cm3、1×1020atmos/cm3,, but not limited thereto.
Preferably, the nitride in the C-doped nitride sub-layer 312 is selected from any one or more of AlGaN, BGaN, scGaN, BAlGaN, scAlGaN; more preferably ScAlGaN, the Sc component is 0.01-0.2, and the Al component is 0.01-0.3. The C doping can introduce a deep level trap for capturing electrons, so that leakage current is reduced, and breakdown resistance of the device is improved.
Further, the Sc component in the C-doped ScAlGaN sub-layer increases and then decreases, and the Al component increases and then decreases. The structural design that Sc component and Al component in the C-doped ScAlGaN sub-layer are firstly increased and then decreased can reduce lattice mismatch with Mg-doped InGaN.
Further, the thickness of the C-doped nitride sub-layer 312 is 150nm to 350nm, and exemplary thicknesses are 150nm, 175nm, 200nm, 225nm, 250nm, 275nm, 300nm, 325nm, 350nm, but not limited thereto. The doping concentration of C in the C-doped nitride sub-layer 312 is 1 x 10 16atmos/cm3~1×1020atmos/cm3, and is exemplified by, but not limited to 1×1016atmos/cm3、5×1016atmos/cm3、1×1017atmos/cm3、5×1017atmos/cm3、1×1018atmos/cm3、5×1018atmos/cm3、1×1019atmos/cm3、5×1019atmos/cm3、1×1020atmos/cm3,.
Preferably, the thickness of the two-dimensional graphene layer 32 is 2nm to 20nm, and exemplary is 2nm, 4nm, 6nm, 8nm, 10nm, 12nm, 14nm, 16nm, 18nm, 20nm, but not limited thereto.
Correspondingly, the invention also provides a preparation method of the epitaxial structure of the high electron mobility transistor, which comprises the following steps:
S01, providing a substrate 1;
S02, sequentially depositing a buffer layer 2, a barrier layer 3, a channel layer 4, an AlN inserting layer 5, a barrier layer 6 and a cap layer 7 on the substrate 1,
The barrier layer 3 includes an element doped nitride layer 31 and a two-dimensional graphene layer 32, the element doped nitride layer is in an alternating stacked structure, and the element doped nitride layer 31 includes Mg doped nitride sublayers 311 and C doped nitride sublayers 312 that are alternately arranged.
Specifically, the preparation method comprises the following steps:
S01, providing a substrate 1;
Preferably, the substrate 1 includes, but is not limited to, a silicon substrate, a sapphire substrate, a silicon carbide substrate, a GaN substrate.
S02, depositing a buffer layer 2 on the substrate 1;
Preferably, the buffer layer 2 includes but is not limited to an AlN layer, an AlGaN layer, and a GaN layer, and the thickness of the buffer layer 2 may be 1.8 μm to 3 μm.
Further, the reaction temperature of the buffer layer 2 may be 750 ℃ to 1050 ℃, and the reaction pressure may be 80torr to 180torr.
S03, depositing a barrier layer 3 on the buffer layer 2;
preferably, the growth temperature of the Mg doped nitride sub-layer 311 is 800 ℃ to 1200 ℃, and exemplary is 800 ℃, 850 ℃, 900 ℃, 950 ℃, 1000 ℃, 1050 ℃, 1100 ℃, 1150 ℃, 1200 ℃, but not limited thereto; the growth pressure is 100-200 torr, and exemplary are 100torr, 120torr, 140torr, 160torr, 180torr, 200torr, but not limited thereto.
Preferably, the growth temperature of the C-doped nitride sub-layer 312 is 750 ℃ to 1000 ℃, and is exemplified by 750 ℃, 800 ℃, 850 ℃, 900 ℃, 950 ℃, 1000 ℃, but not limited thereto; the growth pressure is 50-150 torr, and exemplary are 50torr, 75torr, 100torr, 125torr, 150torr, but not limited thereto.
Preferably, the growth temperature of the graphene is 600 ℃ to 800 ℃, and is exemplified by 600 ℃, 650 ℃, 700 ℃, 750 ℃, 800 ℃, but not limited thereto; the growth pressure is 0.5to 1torr, and exemplary are, but not limited to, 0.5torr, 0.6torr, 0.7torr, 0.8torr, 0.9torr, 1 torr; the radio frequency power is 20W to 50W, and exemplary is 20W, 25W, 30W, 35W, 40W, 45W, 50W, but not limited thereto.
Further, the growth atmosphere of the two-dimensional graphene layer 32 is CH 4、H2 and Ar, and the flow rate of the CH 4 is 0.8slm to 1.6slm, which is exemplified by but not limited to 0.8slm, 0.9slm, 1slm, 1.1slm, 1.2slm, 1.3slm, 1.4slm, 1.5slm, 1.6 slm; the flow rate of the H 2 is 1 slm-2 slm, and is exemplified by but not limited to 1slm, 1.2slm, 1.4slm, 1.6slm, 1.8slm, and 2 slm; the flow rate of Ar is 1 slm-4 slm, and is exemplified by but not limited to 1slm, 1.5slm, 2slm, 2.5slm, 3slm, 3.5slm, 4 slm.
S04, depositing a channel layer 4 on the barrier layer 3;
Preferably, the channel layer 4 includes, but is not limited to, an InGaN channel layer, a GaN channel layer. The thickness of the channel layer 4 may be 50nm to 300nm.
Further, the growth temperature of the channel layer 4 may be 650-950 ℃, and the growth pressure may be 50-200 torr.
S05, depositing an AlN inserting layer 5 on the channel layer 4
Preferably, the thickness of the AlN insert layer 5 is 2nm to 5nm.
Further, the growth temperature of the AlN inserting layer 5 is 650-1000 ℃, and the growth pressure can be 50-150 torr.
S06, depositing a barrier layer 6 on the AlN insert layer 5
Preferably, the barrier layer 6 is an AlGaN layer, and the thickness of the barrier layer 6 may be 10nm to 40nm.
Further, the growth temperature of the barrier layer 6 may be 900 ℃ to 1200 ℃, and the growth pressure may be 100torr to 250torr.
S07 depositing a cap layer 7 on the barrier layer 6
Preferably, the cap layer 7 is a GaN cap layer, and the thickness of the cap layer 7 may be 10nm to 50nm.
Further, the growth temperature of the cap layer 7 may be 750 ℃ to 1100 ℃, and the growth pressure may be 150torr to 250torr.
In the present invention, the N source may be NH 3, the Al source may be trimethylaluminum (TMAl), the Ga source may be trimethylgallium (TMGa) or triethylgallium (TEGa), the indium source may be trimethylindium (TMIn), the Mg source may be magnesium-cyclopentadienyl (CP 2 Mg), the C source may be methane (CH 4), and the Sc source may be trimethylscandium (TMSc).
The invention is further illustrated by the following examples:
Example 1
The embodiment provides an epitaxial structure of a high electron mobility transistor, which comprises a substrate 1, wherein a buffer layer 2, a barrier layer 3, a channel layer 4, an AlN inserting layer 5, a barrier layer 6 and a cap layer 7 are sequentially stacked on the substrate 1, the barrier layer 3 comprises an element doped nitride layer 31 and a two-dimensional graphene layer 32, the element doped nitride layer 31 is an alternately arranged Mg doped InGaN sublayer and a C doped ScAlGaN sublayer, and the number of cycles is 4.
The doping concentration of magnesium In the Mg-doped InGaN sub-layer is 4.5X10 18atmos/cm3, the In component is 0.15, and the thickness is 150nm. The doping concentration of C in the C-doped ScAlGaN sub-layer is 5.3X10 19atmos/cm3, the Sc component is 0.1, the Al component is 0.15, and the thickness is 260nm. The thickness of the two-dimensional graphene layer 32 is 5nm.
The preparation method comprises the following steps:
S01, providing a silicon substrate;
S02, depositing an AlGaN buffer layer on the silicon substrate;
The specific deposition process is as follows: al, ga and N sources are introduced into the reaction cavity, the temperature of the reaction cavity is kept to be 900 ℃, the cavity pressure is kept to be 120torr, and an AlGaN buffer layer is grown, and the thickness is 2.2 mu m.
S03, depositing a blocking layer on the AlGaN buffer layer;
The specific deposition process is as follows: introducing In, ga, N sources and Mg sources into the reaction cavity, keeping the temperature of the reaction cavity at 1000 ℃ and the cavity pressure at 150torr, and growing a magnesium doped InGaN sublayer with the thickness of 150nm; then, introducing an N source, a Ga source, an Al source, an Sc source and a C source into the reaction cavity, keeping the temperature of the reaction cavity at 875 ℃ and the cavity pressure at 100torr, growing a C-doped ScAlGaN sublayer with the thickness of 260nm, and repeating the steps for 4 times; finally, the epitaxial wafer on which the element doped nitride layer 31 is deposited is placed in a PECVD reaction chamber, the temperature of the reaction chamber is kept at 700 ℃, the pressure of the chamber is 0.75torr, the radio frequency power is 35W, CH 4 (the flow rate of the gas is 1.2 slm), H 2 (the flow rate of the gas is 1.5 slm) and Ar (the flow rate of the gas is 2.5 slm), and a two-dimensional graphene layer 32 is grown, and the thickness of the two-dimensional graphene layer is 5nm.
S04, depositing a GaN channel layer on the barrier layer;
The specific deposition process is as follows: and introducing an N source and a Ga source into the reaction cavity, keeping the temperature of the reaction cavity at 800 ℃ and the cavity pressure at 125torr, and growing a GaN channel layer with the thickness of 180nm.
S05, depositing an AlN inserting layer on the GaN channel layer
The specific deposition process is as follows: and introducing an N source and an Al source into the reaction cavity, keeping the temperature of the reaction cavity at 850 ℃ and the cavity pressure at 125torr, and growing an AlN insert layer with the thickness of 2.5nm.
S06, depositing AlGaN barrier layer on AlN inserting layer
The specific deposition process is as follows: and introducing an N source, a Ga source and an Al source into the reaction cavity, keeping the temperature of the reaction cavity at 1050 ℃ and the cavity pressure at 175torr, and growing an AlGaN barrier layer with the thickness of 22nm.
S07, depositing a GaN cap layer on the AlGaN barrier layer
The specific deposition process is as follows: and introducing an N source and a Ga source into the reaction cavity, keeping the temperature of the reaction cavity at 900 ℃ and the cavity pressure at 200torr, and growing a GaN cap layer with the thickness of 30nm.
Example 2
The present embodiment provides an epitaxial structure of a high electron mobility transistor, which is substantially the same as embodiment 1 except that:
In the C-doped ScAlGaN sub-layer, the Sc component increases from 0.05 to 0.15 and then decreases to 0.05, and the al component increases from 0.05 to 0.25 and then decreases to 0.05 in the growth direction.
Example 3
The present embodiment provides an epitaxial structure of a high electron mobility transistor, which is substantially the same as embodiment 1 except that:
the element doped nitride layer 31 is an InGaN sublayer and a C doped ScAlGaN sublayer alternately arranged.
Example 4
The present embodiment provides an epitaxial structure of a high electron mobility transistor, which is substantially the same as embodiment 1 except that:
the element doped nitride layer 31 is an alternately arranged Mg doped InGaN sub-layer and ScAlGaN sub-layers.
Comparative example 1
This comparative example provides an epitaxial structure of a high electron mobility transistor, which is substantially the same as that of example 1, except that:
the element doped nitride layer 31 is a C doped ScAlGaN sub-layer.
Comparative example 2
This comparative example provides an epitaxial structure of a high electron mobility transistor, which is substantially the same as that of example 1, except that:
the element doped nitride layer 31 is a Mg doped InGaN sublayer.
Comparative example 3
This comparative example provides an epitaxial structure of a high electron mobility transistor, which is substantially the same as that of example 1, except that:
the barrier layer 3 is an element doped nitride layer 31.
Comparative example 4
This comparative example provides an epitaxial structure of a high electron mobility transistor, which is substantially the same as that of example 1, except that:
Comprises a substrate 1, a buffer layer 2, a channel layer 4, an AlN insert layer 5, a barrier layer 6 and a cap layer 7 which are sequentially stacked on the substrate 1.
Performance test:
The epitaxial structures obtained in examples 1-4 and comparative examples 1-4 were subsequently processed to produce HEMT devices in which the dislocation density of the devices and the buffer layer leakage current were tested, and the test results are shown in table 1 below.
TABLE 1 test results for examples 1-4 and comparative examples 1-4
According to the experimental data, the element doped nitride layer is of an alternate laminated structure, the doped elements are Mg and/or C, and the element doped nitride layer and the two-dimensional graphene layer are cooperated, so that the dislocation density can be reduced, the crystal quality of the prepared epitaxial film is improved, the breakdown resistance of the device is improved, the performance of the device is improved, the blocking capability of electrons of the channel layer can be enhanced, the leakage current of the buffer layer is reduced, the mobility of two-dimensional electron gas is improved, the current collapse effect is inhibited, the element doped nitride layer is further set to be of a laminated structure of the Mg doped nitride sub-layer and the C doped nitride sub-layer, the component proportion is controlled, the crystal quality of the transistor can be further improved, and the leakage current of the buffer layer is reduced.
The above disclosure is only a preferred embodiment of the present invention, and it is needless to say that the scope of the invention is not limited thereto, and therefore, the equivalent changes according to the claims of the present invention still fall within the scope of the present invention.

Claims (6)

1. The epitaxial structure of the high electron mobility transistor is characterized by comprising a substrate, wherein a buffer layer, a barrier layer, a channel layer, an AlN inserting layer, a barrier layer and a cap layer are sequentially stacked on the substrate, the barrier layer comprises an element doped nitride layer and a two-dimensional graphene layer which are sequentially stacked on the buffer layer, the element doped nitride layer is of an alternating stacked structure, and the element doped nitride layer comprises an Mg doped nitride sub-layer and a C doped nitride sub-layer which are alternately arranged;
the Mg-doped nitride sub-layer is an Mg-doped InGaN sub-layer, and the In component of the Mg-doped InGaN sub-layer is 0.05-0.3;
the doping concentration of Mg in the Mg-doped nitride sub-layer is 1 multiplied by 10 16atmos/cm3~1×1020atmos/cm3; the thickness of the Mg doped nitride sub-layer is 100 nm-250 nm;
The doping concentration of C in the C-doped nitride sub-layer is 1 multiplied by 10 16atmos/cm3~1×1020atmos/cm3, and the thickness of the C-doped nitride sub-layer is 150 nm-350 nm;
the C-doped nitride sub-layer is a C-doped ScAlGaN sub-layer, the Sc component of the C-doped ScAlGaN sub-layer is 0.01-0.2, and the Al component of the C-doped ScAlGaN sub-layer is 0.01-0.3;
The Sc component in the C-doped ScAlGaN sub-layer is increased and then decreased, and the Al component is increased and then decreased.
2. The epitaxial structure of claim 1, wherein the alternating number of cycles of the alternating stacked structure is 2-20.
3. The epitaxial structure of claim 1 wherein said Mg doped nitride sub-layer has a smaller forbidden bandwidth than said C doped nitride sub-layer.
4. The epitaxial structure of the high electron mobility transistor of claim 1, wherein the thickness of the two-dimensional graphene layer is 2nm to 20nm.
5. The epitaxial structure of the high electron mobility transistor of claim 1, wherein the Mg doped nitride sub-layer has a growth temperature of 800 ℃ to 1200 ℃ and a reaction pressure of 100torr to 200torr;
The growth temperature of the C-doped nitride sub-layer is 750-1000 ℃, and the reaction pressure is 50-150 torr;
The growth temperature of the two-dimensional graphene layer is 600-800 ℃, the reaction pressure is 0.5-1 torr, the radio frequency power is 20-50W, the growth atmosphere is CH 4、H2 and Ar, the access flow of CH 4 is 0.8-1.6 slm, the access flow of H 2 is 1-2 slm, and the access flow of Ar is 1-4 slm.
6. A method of fabricating an epitaxial structure of a high electron mobility transistor according to any one of claims 1 to 5, comprising:
S01, providing a substrate;
s02, depositing a buffer layer on the substrate;
s03, depositing a barrier layer on the buffer layer;
The barrier layer comprises an element doped nitride layer and a two-dimensional graphene layer, the element doped nitride layer is of an alternating lamination structure, and the element doped nitride layer comprises Mg doped nitride sublayers and C doped nitride sublayers which are alternately arranged;
The growth temperature of the Mg-doped nitride sub-layer is 800-1200 ℃, and the reaction pressure is 100-200 torr; the growth temperature of the C-doped nitride sub-layer is 750-1000 ℃, and the reaction pressure is 50-150 torr; the growth temperature of the two-dimensional graphene layer is 600-800 ℃, the reaction pressure is 0.5-1 torr, the radio frequency power is 20-50W, the growth atmosphere is CH 4、H2 and Ar, the access flow of CH 4 is 0.8-1.6 slm, the access flow of H 2 is 1-2 slm, and the access flow of Ar is 1-4 slm;
s04, depositing a channel layer on the barrier layer;
S05, depositing an AlN inserting layer on the channel layer;
s06, depositing a barrier layer on the AlN inserting layer;
S07, depositing a cap layer on the barrier layer.
CN202410160463.8A 2024-02-05 2024-02-05 Epitaxial structure of high electron mobility transistor and preparation method thereof Active CN117727782B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202410160463.8A CN117727782B (en) 2024-02-05 2024-02-05 Epitaxial structure of high electron mobility transistor and preparation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202410160463.8A CN117727782B (en) 2024-02-05 2024-02-05 Epitaxial structure of high electron mobility transistor and preparation method thereof

Publications (2)

Publication Number Publication Date
CN117727782A CN117727782A (en) 2024-03-19
CN117727782B true CN117727782B (en) 2024-05-14

Family

ID=90207218

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202410160463.8A Active CN117727782B (en) 2024-02-05 2024-02-05 Epitaxial structure of high electron mobility transistor and preparation method thereof

Country Status (1)

Country Link
CN (1) CN117727782B (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010171032A (en) * 2009-01-20 2010-08-05 New Japan Radio Co Ltd Substrate for forming nitride semiconductor device and nitride semiconductor device
CN112687738A (en) * 2020-12-24 2021-04-20 晶能光电(江西)有限公司 N-polar AlGaN/GaN HEMT device and growth method thereof
CN114725261A (en) * 2022-03-01 2022-07-08 华灿光电(浙江)有限公司 Ultraviolet light-emitting diode epitaxial wafer with electron transport layer and preparation method thereof

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9006791B2 (en) * 2013-03-15 2015-04-14 The Government Of The United States Of America, As Represented By The Secretary Of The Navy III-nitride P-channel field effect transistor with hole carriers in the channel

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010171032A (en) * 2009-01-20 2010-08-05 New Japan Radio Co Ltd Substrate for forming nitride semiconductor device and nitride semiconductor device
CN112687738A (en) * 2020-12-24 2021-04-20 晶能光电(江西)有限公司 N-polar AlGaN/GaN HEMT device and growth method thereof
CN114725261A (en) * 2022-03-01 2022-07-08 华灿光电(浙江)有限公司 Ultraviolet light-emitting diode epitaxial wafer with electron transport layer and preparation method thereof

Also Published As

Publication number Publication date
CN117727782A (en) 2024-03-19

Similar Documents

Publication Publication Date Title
CN112701160B (en) Gallium nitride-based high-electron-mobility transistor epitaxial wafer and preparation method thereof
JP2004515909A (en) Indium gallium nitride channel high electron mobility transistor and method of manufacturing the transistor
JP2016515299A (en) III-N semiconductor device grown on a silicon substrate with a rare earth oxide gate dielectric
JP2008072029A (en) Manufacturing method of semiconductor epitaxial crystal substrate
CN109786520A (en) A kind of LED epitaxial slice and its manufacturing method
CN116314278B (en) High electron mobility transistor epitaxial structure, preparation method and HEMT device
CN115347096B (en) GaN-based light-emitting diode epitaxial wafer and preparation method thereof
JP2023543022A (en) Nitride epitaxial structures and semiconductor devices
WO2023231566A1 (en) Semiconductor epitaxial structure and preparation method therefor, and semiconductor device
CN116960173B (en) High electron mobility transistor epitaxial structure, preparation method and HEMT device
CN116565003A (en) Epitaxial wafer, preparation method thereof and high-electron-mobility transistor
JP2019534583A (en) High breakdown voltage gallium nitride high electron mobility transistor and method for forming the same
CN108281514B (en) Preparation method of light-emitting diode epitaxial wafer
CN112510087A (en) P-type gate enhanced GaN-based HEMT device and preparation method thereof
CN115295693A (en) Light emitting diode epitaxial wafer and preparation method thereof
CN108231556B (en) Method for manufacturing III-V nitride semiconductor epitaxial wafer
CN107658374B (en) Epitaxial wafer of light emitting diode and preparation method thereof
CN117727782B (en) Epitaxial structure of high electron mobility transistor and preparation method thereof
CN116741822A (en) High electron mobility transistor epitaxial structure, preparation method and HEMT device
JP4051311B2 (en) Nitride semiconductor crystal growth method
CN114914296B (en) Epitaxial wafer, preparation method of epitaxial wafer and high-electron-mobility transistor
CN116230821A (en) Light-emitting diode epitaxial wafer and preparation method thereof
JP2004289005A (en) Epitaxial substrate, semiconductor device, and high electron mobility transistor
JP3987360B2 (en) Epitaxial substrate, epitaxial substrate for electronic device, and electronic device
KR20070053103A (en) Semiconductor device and method of fabricating the same

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant