CN117727699B - Reinforcing structure and reinforcing method for improving warping of organic packaging substrate - Google Patents
Reinforcing structure and reinforcing method for improving warping of organic packaging substrate Download PDFInfo
- Publication number
- CN117727699B CN117727699B CN202410173502.8A CN202410173502A CN117727699B CN 117727699 B CN117727699 B CN 117727699B CN 202410173502 A CN202410173502 A CN 202410173502A CN 117727699 B CN117727699 B CN 117727699B
- Authority
- CN
- China
- Prior art keywords
- substrate
- circuit board
- reinforcing
- functional area
- area
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 195
- 230000003014 reinforcing effect Effects 0.000 title claims abstract description 56
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 40
- 238000000034 method Methods 0.000 title claims abstract description 25
- 238000010438 heat treatment Methods 0.000 claims abstract description 24
- 238000003466 welding Methods 0.000 claims abstract description 4
- 238000005520 cutting process Methods 0.000 claims description 18
- 239000000463 material Substances 0.000 claims description 13
- 238000005476 soldering Methods 0.000 claims description 10
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 5
- 239000010949 copper Substances 0.000 claims description 5
- 229910052802 copper Inorganic materials 0.000 claims description 5
- 238000007711 solidification Methods 0.000 claims description 4
- 230000008023 solidification Effects 0.000 claims description 4
- 238000004100 electronic packaging Methods 0.000 abstract description 2
- 239000010410 layer Substances 0.000 description 10
- 230000002787 reinforcement Effects 0.000 description 9
- 238000004519 manufacturing process Methods 0.000 description 8
- 238000004088 simulation Methods 0.000 description 7
- 229910000679 solder Inorganic materials 0.000 description 7
- 239000011368 organic material Substances 0.000 description 6
- 238000012797 qualification Methods 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 239000012792 core layer Substances 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 239000004696 Poly ether ether ketone Substances 0.000 description 1
- 239000004734 Polyphenylene sulfide Substances 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- JUPQTSLXMOCDHR-UHFFFAOYSA-N benzene-1,4-diol;bis(4-fluorophenyl)methanone Chemical compound OC1=CC=C(O)C=C1.C1=CC(F)=CC=C1C(=O)C1=CC=C(F)C=C1 JUPQTSLXMOCDHR-UHFFFAOYSA-N 0.000 description 1
- -1 carbide cabinets Substances 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 229910002804 graphite Inorganic materials 0.000 description 1
- 239000010439 graphite Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 229920002530 polyetherether ketone Polymers 0.000 description 1
- 229920000069 polyphenylene sulfide Polymers 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- XUGSDIOYQBRKGF-UHFFFAOYSA-N silicon;hydrochloride Chemical compound [Si].Cl XUGSDIOYQBRKGF-UHFFFAOYSA-N 0.000 description 1
- 229920002379 silicone rubber Polymers 0.000 description 1
- 239000004945 silicone rubber Substances 0.000 description 1
- 229920001169 thermoplastic Polymers 0.000 description 1
- 239000004416 thermosoftening plastic Substances 0.000 description 1
- MTPVUVINMAGMJL-UHFFFAOYSA-N trimethyl(1,1,2,2,2-pentafluoroethyl)silane Chemical compound C[Si](C)(C)C(F)(F)C(F)(F)F MTPVUVINMAGMJL-UHFFFAOYSA-N 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Wire Bonding (AREA)
Abstract
The invention relates to the technical field of electronic packaging, in particular to a reinforcing structure and a reinforcing method for improving the warpage of an organic packaging substrate, which are applied to reducing the warpage of the substrate after heating, wherein the substrate is provided with a substrate functional area for welding chips, the reinforcing structure comprises a substrate extending area extending outwards along the substrate functional area and a reinforcing circuit board provided with a window, the substrate extending area is fixedly arranged on the reinforcing circuit board, and the substrate functional area is positioned at the top of the window.
Description
Technical Field
The invention relates to the technical field of electronic packaging, in particular to a reinforcing structure and a reinforcing method for improving warping of an organic packaging substrate.
Background
With the rapid development of integrated circuit technology, the integration level of chips is higher and higher, the number of input and output pins, via holes and the like is rapidly increased, and the signal rate is also faster and faster, and the FR-4 material is used as a traditional packaging substrate dielectric material, and can have larger loss on the transmission of high-speed signals when being used in a high-frequency high-speed substrate due to the influence of material parameters such as dielectric constant and the like, so that signal integrity and other problems are caused, and the problems can be better improved by using an organic material as a dielectric material.
Compared with FR-4 materials, the organic materials have the defects that thermal mismatch is easier to occur in the high-temperature heating process such as reflow soldering of the substrate, lead-free solder is advocated to be used at present, SAC305 is commonly used, the highest temperature is usually required to be set to be more than 217 ℃, the thermal mismatch is aggravated by the higher temperature during soldering, the problem of warping is easier to occur in the high-temperature heating process of the substrate made of the organic materials, the problem of cracking, breaking and the like of the micro-bumps between the chip and the substrate can be caused, the reliability of the subsequent use is seriously affected, and therefore, the research on how to inhibit the warping of the packaging substrate is important.
Disclosure of Invention
Aiming at the problems, the invention provides a reinforcing structure and a reinforcing method for improving the warpage of an organic packaging substrate, which can reduce the warpage of the packaging substrate in the reflow soldering process, ensure the production quality, improve the reliability of subsequent use, and solve the problems of large deformation, low product qualification rate and the like of the substrate after reflow soldering.
In order to solve the problems in the prior art, the invention provides a reinforcing structure for improving the warpage of an organic packaging substrate, which is applied to reducing the warpage of the substrate after heating, wherein the substrate is provided with a substrate functional area for welding chips, the reinforcing structure comprises a substrate extending area extending outwards along the substrate functional area and a reinforcing circuit board provided with a window, the substrate extending area is fixedly arranged on the reinforcing circuit board, and the substrate functional area is positioned at the top of the window.
Preferably, the area size of the window matches the size of the functional area of the substrate.
Preferably, the substrate extension area is adhered to the reinforced circuit board through the heat conducting film, and the window completely exposes the bottom of the substrate functional area.
Preferably, the top rectangular array of the substrate functional area is provided with micro bump pads, and the chip is connected with the substrate functional area through the micro bump and the micro bump pads.
Preferably, underfill for wrapping the micro-bumps is also filled between the chip and the substrate functional area.
Preferably, the wiring layer of the substrate extension region is free of copper wiring.
Preferably, the bottom rectangular array of the substrate functional area has BGA ball-mounting pads.
Preferably, the reinforcement circuit board is made of a high temperature resistant material.
Preferably, the rectangular array of windows is on the reinforced circuit board, and each window is correspondingly adhered with a substrate.
The invention also relates to a reinforcing method for improving the warpage of the organic packaging substrate, which is applied to a reinforcing structure for improving the warpage of the organic packaging substrate, and comprises the following steps:
Adhering a substrate with a substrate extension area to a reinforced circuit board with a window, so that the substrate functional area is opposite to the window of the reinforced circuit board;
step two, the substrate adhered with the reinforced circuit board is subjected to reflow soldering, underfilling solidification and ball-planting high-temperature heating process;
And thirdly, cutting the whole packaging structure after all high-temperature heating processes are completed, cutting according to four dividing lines between the functional area and the extension area of the packaging substrate, and reserving the functional area of the packaging substrate after cutting is completed.
Compared with the prior art, the application has the beneficial effects that:
The invention can reduce the warp of the substrate after the high-temperature heating process through the reinforcing structure, is beneficial to reducing the problems of bump disconnection and the like caused by the warp of the packaging substrate, improves the reliability and the qualification rate of the product, and has good economic benefit and social benefit.
Drawings
Fig. 1 is a perspective view of a reinforcing structure for improving warpage of an organic package substrate.
Fig. 2 is an exploded perspective view of a reinforcing structure for improving warpage of an organic package substrate at a first viewing angle.
Fig. 3 is an exploded perspective view of a reinforcing structure for improving warpage of an organic package substrate at a second viewing angle.
Fig. 4 is an elevation view of a reinforcing structure to improve warpage of an organic package substrate.
Fig. 5 is a schematic diagram of cutting a reinforcing structure for improving warpage of an organic package substrate.
Fig. 6 is a schematic diagram of a reinforcing structure for improving warpage of an organic package substrate after the ball mounting process is completed.
Fig. 7 is a perspective view of a reinforcing structure for improving warpage of an organic package substrate at the time of mass production.
Fig. 8 is an exploded perspective view of a reinforcing structure for improving warpage of an organic package substrate at the time of mass production.
Fig. 9 is an exploded perspective view of a reinforcement structure for improving warpage of an organic package substrate at a first viewing angle during a high temperature process.
Fig. 10 is an exploded perspective view of a reinforcement structure for improving warpage of an organic package substrate at a second viewing angle during a high temperature process.
Fig. 11 is a cloud image of finite element simulation deformation results of a package substrate with a reinforcing structure.
Fig. 12 is a cloud image of finite element simulation deformation results of a package substrate without a reinforcing structure.
The reference numerals in the figures are: 1. a chip; 2. a substrate functional region; 22. a micro bump pad; 23. BGA ball-mounting bonding pad; 24. a micro bump; 25. BGA solder balls; 3. a substrate extension region; 4. reinforcing the circuit board; 41. a window; 5. cutting lines; 6. and (5) underfill.
Detailed Description
The invention will be further described in detail with reference to the drawings and the detailed description below, in order to further understand the features and technical means of the invention and the specific objects and functions achieved.
As shown in fig. 1, 2 and 3, the present application provides:
A reinforcing structure for improving the warpage of an organic package substrate is applied to reducing the warpage of the substrate after heating, the substrate is provided with a substrate functional area 2 for welding a chip 1, the reinforcing structure comprises a substrate extending area 3 extending outwards along the substrate functional area 2 and a reinforcing circuit board 4 provided with a window 41, the substrate extending area 3 is fixedly arranged on the reinforcing circuit board 4, and the substrate functional area 2 is positioned at the top of the window 41.
The package substrate is designed. Firstly, when designing the package substrate, the substrate is divided into a substrate functional area 2 and a substrate extension area 3, wherein the substrate functional area 2 maintains the normal operation of the chip 1, and the substrate extension area 3 expands the area of the package substrate.
The bottom of the package substrate is designed to strengthen the circuit board 4. The FR-4 material is used for manufacturing the reinforced circuit board 4, the reinforced circuit board is adhered to the bottom of the extension area 3 of the packaging substrate, the middle of the circuit board is hollowed out, the size of the hollowed-out area is matched with the size of the functional area 2 of the substrate, and the window can expose the functional area of the packaging substrate. And then adhering the heat conducting film to the bottom of the substrate extension area 3, and adhering the hollowed-out reinforced circuit board 4 to the heat conducting film according to the corresponding position, wherein the hollowed-out area of the reinforced circuit board 4 which is required to be adhered to the corresponding position can be completely exposed out of the bottom of the substrate functional area 2.
And (3) carrying out high-temperature heating processes such as reflow soldering, underfilling solidification, ball placement and the like on the packaging structure bonded with the bottom reinforced circuit board 4. After the reinforced circuit board 4 is adhered to the bottom of the packaging substrate, the micro-bumps 24 for connecting the chip 1 and the substrate are placed on the bonding pads above the functional area 2 of the substrate, then the chip 1 is placed on the micro-bumps 24 according to the corresponding positions, and finally the object with the micro-bumps 24 and the chip 1 placed is placed in a reflow oven for reflow soldering. After the connection between the chip 1 and the substrate is completed, the underfill 6 is filled between the chip 1 and the substrate, the micro bumps 24 are wrapped, and then the whole structure is heated, wherein the heating temperature and the heating time are determined according to the material manual of the underfill 6. Then, the BGA solder balls 25 are placed on the bottom of the substrate functional region 2, and then the package structure is placed in a reflow oven for reflow soldering, and the BGA solder balls 25 are implanted on the pads on the bottom of the substrate functional region 2.
After all high-temperature heating processes are completed, the whole packaging structure is cut, four dividing lines between the functional area 2 and the extension area of the packaging substrate are cut, the functional area of the lower packaging substrate is reserved after the cutting is completed, and the reserved packaging substrate can normally work after processes such as chip loading, underfill 6 water and ball placement are completed.
The substrate after the circuit board 4 is bonded and reinforced is cut, fig. 5 shows the cutting position and the structure remained after the cutting is completed, the cutting is performed according to the dotted line position in fig. 5, the cutting position is performed along the edge of the functional area of the substrate, finally, the functional area 2 of the substrate remains for the substrate, the functional area can maintain the normal operation of the chip 1 and the substrate, and the structure after the cutting is completed is shown in fig. 6, and the chip 1, the micro-bump 24, the functional area 2 of the substrate and the BGA solder ball 25 are respectively from top to bottom.
The embodiment can reduce the warpage of the substrate after the high-temperature heating process through the reinforcing structure, is beneficial to reducing the problems of bump disconnection and the like caused by the warpage of the packaging substrate, improves the reliability and the qualification rate of the product, and has good economic benefit and social benefit.
When the deformation of the packaging substrate in the process is studied, the finite element method can be used for simulating the deformation of the packaging substrate, so that the deformation condition of the packaging substrate under different processes can be predicted. For this purpose, finite element modeling and simulation were performed according to the substrate structure of the adhesive reinforcement circuit board 4 shown in fig. 1, and the simulation was started after setting a temperature load of 220 ℃. The simulation result is shown in fig. 11, which shows the deformation condition of the functional area 2 of the package substrate after the high-temperature heating process, and it can be seen that the maximum deformation of the functional area 2 of the package substrate is 9.10um after the high-temperature heating at 220 ℃.
As shown in fig. 12, the deformation of the conventional package substrate without the reinforcing structure in the process is simulated by using the finite element method, and the maximum deformation of the package substrate functional region 2 without reinforcement reaches 122.32um under the same temperature load and other boundary conditions. By comparing simulation results of the two structures through a finite element simulation method, the reinforcement structure provided by the invention can effectively reduce the warpage of the organic packaging substrate in the production process flow, and improve the qualification rate of products and the reliability of subsequent use.
As shown in fig. 3, the area size of the window 41 matches the size of the substrate functional area 2.
The window 41 is matched with the size of the substrate functional area 2, and when cutting, the window 41 can be cut along the edge of the window 41, and meanwhile, the substrate functional area 2 can be positioned, so that the BGA solder balls 25 can be conveniently welded.
The length and width of the reinforced circuit board 4 are larger than the size of the packaging substrate, the length and width of the reinforced circuit board 4 are larger than 1.4 times of the corresponding length and width of the packaging substrate, for example, when the packaging substrate is a cube with the side length of 50mm and the thickness of 1.3mm, the side length of the reinforced circuit board 4 is at least 70mm, and the middle of the circuit board needs to be hollowed, so that the hollowed reinforced circuit board 4 is adhered to the bottom of the substrate extension area 3, and then the ball planting area at the bottom of the substrate functional area 2 can be exposed, thereby facilitating the subsequent ball planting process. After the hollowing process of the reinforcing circuit board 4 is completed, it is bonded to the bottom of the extension region of the substrate.
As shown in fig. 4, the substrate extension region 3 is adhered to the reinforced circuit board 4 by a heat conductive film, and the window 41 completely exposes the bottom of the substrate functional region 2.
Fig. 1 and 4 show the structure after the package substrate with the reinforcing structure is subjected to the upper-chip reflow and the ball mounting, from top to bottom, the chip 1, the micro bumps 24 connecting the chip 1 and the substrate, the substrate and the reinforcing circuit board 4.
As shown in fig. 9 and 10, the top rectangular array of the substrate functional area 2 has micro bump pads 22, and the chip 1 is connected to the substrate functional area 2 through micro bumps 24 and the micro bump pads 22.
By bonding the micro bumps 24 on the micro bump pads 22, the chip 1 and the substrate functional area 2 can be stably connected.
As shown in fig. 4 and 5, an underfill 6 is further filled between the chip 1 and the substrate functional area 2 to encapsulate the micro bumps 24.
The gap between the chip 1 and the substrate functional area 2 can be effectively filled by the underfill 6, and the breakage of the welded micro-bumps 24 caused by the stress of the chip 1 is avoided.
As shown in fig. 4, the wiring layer of the substrate extension 3 has no copper wiring.
Fig. 4 shows a designed package substrate, in which the substrate is divided into a substrate functional area 2 and a substrate extension area 3 when the package substrate is designed, wherein the substrate functional area 2 is an area capable of maintaining the normal operation of the chip 1, the wiring layer of the substrate functional area 2 is formed by combining copper and organic materials in the package substrate, the organic materials used in the high-speed package substrate need to have the characteristics of low dielectric constant, low loss factor and the like, the purpose of using the materials is to reduce the transmission loss of high-speed signals in the package substrate, thereby improving the signal transmission quality, and the other layers of the substrate functional area 2 are respectively a dielectric layer, a Core layer and a solder resist layer; the main difference between the substrate extension region 3 and the substrate functional region 2 is that the wiring layer is made of a material, copper wiring is not performed in the wiring layer of the substrate extension region 3, and the substrate is filled with an organic material of a dielectric layer, so that the substrate can normally work even if the extension region is lost, and the dielectric layer and the Core layer of the extension region are consistent with the functional region. The middle area above the substrate functional area 2 is a bonding pad for connecting the chip 1 and the micro-bump 24 of the substrate, and the BGA ball-implanting area is below the substrate functional area 2.
As shown in fig. 4, the bottom rectangular array of the substrate functional area 2 has BGA ball-mounted pads 23.
The BGA balls 25 can be soldered to the bottom of the functional region of the substrate through the BGA ball-mounting pads 23. After the bonding of the bottom reinforcing circuit board 4 is completed, the reinforced integral structure is baked (the integral structure after the bonding of the reinforcing circuit board 4 is baked, the reinforcing circuit board 4 is bonded at the bottom of the package substrate before all subsequent high-temperature heating processes are completed), after the baking is completed, the package substrate is subjected to high-temperature heating processes such as chip loading reflow and Ball Grid Array (BGA) ball placement, and before all high-temperature heating processes are completed, the bottom reinforcing circuit board 4 is bonded below an extension region of the package substrate. Fig. 4 shows a structure of the substrate after bonding the reinforced circuit board 4, after performing the upper-chip reflow process and the ball mounting process.
The reinforcement circuit board 4 is made of a high temperature resistant material.
High temperature resistant materials include, but are not limited to, epoxy plates, ceramics, polyphenylene sulfide, titanium carbide, graphite, tungsten, carbide cabinets, PEEK (a semi-crystalline thermoplastic), silicon nitride, aluminum oxide, silicone rubber, a silicon hydrochloric acid material, a high temperature resistant coating material.
As shown in fig. 7 and 8, the windows 41 are rectangular and arrayed on the reinforced circuit board 4, and each window 41 is correspondingly adhered with a substrate.
The method can also be used for batch processing production, fig. 7 and 8 show schematic diagrams of reinforced circuit boards 4 produced in batch, a large reinforced circuit board 4 is taken first, then the circuit board is subjected to the same hollowing treatment to form rectangular array windows 41, the hollowed windows 41 just can expose functional areas at the bottoms of the substrates, then each single packaging substrate is bonded on the reinforced circuit board 4 at the positions corresponding to the gaps respectively, and then high-temperature heating processes such as upper piece reflow and the like are carried out.
Then, dicing is performed along the edge of the window 41, so that the functional area 2 of each substrate is maintained, and thus mass production is completed by using the structure, and the production efficiency can be improved.
A reinforcement method for improving the warpage of an organic packaging substrate is applied to a reinforcement structure for improving the warpage of the organic packaging substrate, and comprises the following steps:
Adhering the substrate with the substrate extension area 3 to the reinforced circuit board 4 with the window 41, so that the substrate functional area 2 is opposite to the window 41 of the reinforced circuit board 4;
step two, the substrate adhered with the reinforced circuit board 4 is subjected to reflow soldering, underfilling solidification and ball-planting high-temperature heating process;
And thirdly, cutting the whole packaging structure after all high-temperature heating processes are completed, cutting according to four boundaries between the packaging substrate functional area 2 and the extension area, and reserving the packaging substrate functional area 2 after cutting is completed. The foregoing examples merely illustrate one or more embodiments of the invention, which are described in greater detail and are not to be construed as limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of the invention should be assessed as that of the appended claims.
Claims (9)
1. The reinforcing structure is used for reducing the warpage of the substrate after heating and is characterized in that the substrate is provided with a substrate functional area for welding chips, the reinforcing structure comprises a substrate extending area and a reinforcing circuit board, the substrate extending area extends outwards along the substrate functional area, the reinforcing circuit board is provided with a window, the substrate extending area is fixedly arranged on the reinforcing circuit board, and the substrate functional area is positioned at the top of the window;
the bottom rectangular array of the substrate functional area is provided with BGA ball-embedded bonding pads.
2. The structure of claim 1, wherein the window has a region size matching the size of the functional area of the substrate.
3. The structure of claim 1, wherein the substrate extension is adhered to the reinforced circuit board by a heat conductive film, and the window is completely exposed from the bottom of the functional area of the substrate.
4. The structure of claim 1, wherein the rectangular array of micro bump pads on top of the functional area of the substrate, the die being connected to the functional area of the substrate by micro bumps and micro bump pads.
5. The reinforcing structure for improving warpage of an organic package substrate according to claim 4, wherein underfill encapsulating the micro bumps is further filled between the chip and the functional region of the substrate.
6. The reinforcing structure for improving warpage of an organic package substrate as set forth in claim 1, wherein the wiring layer of the substrate extension is free of copper wiring.
7. The reinforcing structure for improving warpage of an organic package substrate as set forth in claim 1, wherein the reinforcing circuit board is made of a high-temperature resistant material.
8. The structure of claim 1, wherein the rectangular array of windows is on the reinforced circuit board, each window corresponding to a substrate to which it is attached.
9. A reinforcing method for improving warpage of an organic package substrate, applied to a reinforcing structure for improving warpage of an organic package substrate as set forth in any one of claims 1 to 8, characterized in that the reinforcing method comprises the steps of:
Adhering a substrate with a substrate extension area to a reinforced circuit board with a window, so that the substrate functional area is opposite to the window of the reinforced circuit board;
step two, the substrate adhered with the reinforced circuit board is subjected to reflow soldering, underfilling solidification and ball-planting high-temperature heating process;
And thirdly, cutting the whole packaging structure after all high-temperature heating processes are completed, cutting according to four dividing lines between the functional area and the extension area of the packaging substrate, and reserving the functional area of the packaging substrate after cutting is completed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202410173502.8A CN117727699B (en) | 2024-02-07 | 2024-02-07 | Reinforcing structure and reinforcing method for improving warping of organic packaging substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202410173502.8A CN117727699B (en) | 2024-02-07 | 2024-02-07 | Reinforcing structure and reinforcing method for improving warping of organic packaging substrate |
Publications (2)
Publication Number | Publication Date |
---|---|
CN117727699A CN117727699A (en) | 2024-03-19 |
CN117727699B true CN117727699B (en) | 2024-04-30 |
Family
ID=90201996
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202410173502.8A Active CN117727699B (en) | 2024-02-07 | 2024-02-07 | Reinforcing structure and reinforcing method for improving warping of organic packaging substrate |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN117727699B (en) |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1719589A (en) * | 2004-07-07 | 2006-01-11 | 日月光半导体制造股份有限公司 | Packaging structure of preventing warp and mfg. method thereof |
CN101112134A (en) * | 2005-02-02 | 2008-01-23 | 富士通株式会社 | Packaging installation module |
CN102163590A (en) * | 2011-03-09 | 2011-08-24 | 中国科学院上海微系统与信息技术研究所 | Three-dimensional multi-chip encapsulation module based on buried substrate and method |
CN202434509U (en) * | 2012-01-18 | 2012-09-12 | 刘胜 | Stackable semiconductor chip packaging structure |
CN217933791U (en) * | 2022-08-19 | 2022-11-29 | 盛合晶微半导体(江阴)有限公司 | Chip packaging structure |
CN116258036A (en) * | 2022-12-19 | 2023-06-13 | 上海美维科技有限公司 | Method for predicting and improving warpage of FCBGA package substrate |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6861750B2 (en) * | 2002-02-01 | 2005-03-01 | Broadcom Corporation | Ball grid array package with multiple interposers |
US7692313B2 (en) * | 2008-03-04 | 2010-04-06 | Powertech Technology Inc. | Substrate and semiconductor package for lessening warpage |
-
2024
- 2024-02-07 CN CN202410173502.8A patent/CN117727699B/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1719589A (en) * | 2004-07-07 | 2006-01-11 | 日月光半导体制造股份有限公司 | Packaging structure of preventing warp and mfg. method thereof |
CN101112134A (en) * | 2005-02-02 | 2008-01-23 | 富士通株式会社 | Packaging installation module |
CN102163590A (en) * | 2011-03-09 | 2011-08-24 | 中国科学院上海微系统与信息技术研究所 | Three-dimensional multi-chip encapsulation module based on buried substrate and method |
CN202434509U (en) * | 2012-01-18 | 2012-09-12 | 刘胜 | Stackable semiconductor chip packaging structure |
CN217933791U (en) * | 2022-08-19 | 2022-11-29 | 盛合晶微半导体(江阴)有限公司 | Chip packaging structure |
CN116258036A (en) * | 2022-12-19 | 2023-06-13 | 上海美维科技有限公司 | Method for predicting and improving warpage of FCBGA package substrate |
Also Published As
Publication number | Publication date |
---|---|
CN117727699A (en) | 2024-03-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100967344B1 (en) | Method for manufacturing flip chip packaging substrate | |
US7247523B1 (en) | Two-sided wafer escape package | |
US7446398B2 (en) | Bump pattern design for flip chip semiconductor package | |
US6258627B1 (en) | Underfill preform interposer for joining chip to substrate | |
JP2004335641A (en) | Method of manufacturing substrate having built-in semiconductor element | |
JPH0945805A (en) | Wiring board, semiconductor device, method for removing the semiconductor device from wiring board, and manufacture of semiconductor device | |
JPH0982884A (en) | Multi-chip module and manufacture thereof | |
JP6064705B2 (en) | Semiconductor device manufacturing method and semiconductor mounting substrate | |
US8337735B2 (en) | Solder mold plates used in packaging process and method of manufacturing solder mold plates | |
JP2001015650A (en) | Ball grid array package and its manufacture | |
US20200211946A1 (en) | Interconnect board, semiconductor package, and method of fabricating interconnect board | |
US7663254B2 (en) | Semiconductor apparatus and method of manufacturing the same | |
KR100504635B1 (en) | A controlled collapse chip connection (c4) integrated circuit package that has a filler which seals an underfill material | |
US9281269B2 (en) | Integrated circuit package and method of manufacture | |
US9425174B1 (en) | Integrated circuit package with solderless interconnection structure | |
US6331446B1 (en) | Process for underfilling a controlled collapse chip connection (C4) integrated circuit package with an underfill material that is heated to a partial gel state | |
US7545028B2 (en) | Solder ball assembly for a semiconductor device and method of fabricating same | |
CN117727699B (en) | Reinforcing structure and reinforcing method for improving warping of organic packaging substrate | |
TWI450349B (en) | Method for detecting the under-fill void in flip chip bga | |
WO2020147084A1 (en) | Chip packaging structure and electronic device | |
US20030202332A1 (en) | Second level packaging interconnection method with improved thermal and reliability performance | |
US7601612B1 (en) | Method for forming solder joints for a flip chip assembly | |
WO2000052751A1 (en) | A process line for underfilling a controlled collapse chip connection (c4) integrated circuit package | |
US20160351522A1 (en) | Package-on-package device and cavity formation by solder removal for package interconnection | |
US11508669B2 (en) | Method and apparatus for improved circuit structure thermal reliability on printed circuit board materials |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |