CN117639502A - Average current sampling circuit and method - Google Patents

Abstract

The invention provides an average current sampling circuit and method, which are applied to a switching converter, wherein the circuit comprises: the device comprises a real-time sampling circuit, an average point detection circuit and a first sample hold circuit. The real-time sampling circuit collects current flowing through the main switching tube or the follow current switching tube and generates a current sampling signal. The average point detection circuit generates a current analog signal according to the switch control signal, wherein the rising time of the current analog signal is the same as the conduction time of the main switch tube or the follow current switch tube, and generates a first narrow pulse signal when the current analog signal reaches one half amplitude of the current analog signal. The first sample-and-hold circuit samples and holds at a midpoint of the amplitude of the current sample signal according to the first narrow pulse signal to produce an average current signal, wherein the average current signal characterizes an average value of the current sample signal. The invention directly samples the midpoint of the maximum amplitude of the current sampling signal, so that the average current sampling precision is higher.

Description

Average current sampling circuit and method

Technical Field

The invention relates to the technical field of switching converters, in particular to an average current sampling circuit and an average current sampling method.

Background

Switching converters are widely used in a variety of industrial and consumer electronic devices. In a switching converter, the switching elements of the switching converter can be controlled to be turned on and off by different control methods, so that the input voltage received by the switching converter is converted into a suitable output voltage.

In some applications of switching converters, it is often necessary to collect the average current of the circuit to further control the circuit. In the prior art, an average current is generated by filtering a sampling current, but the accuracy of the filtering sampling mode is not high. Or the valley value and the peak value of the current are sampled, and the average value of the current is calculated according to the valley value and the peak value, but the valley value and the peak value of the current are switching points of a switching device, so that disturbance is large near the sampling point, and the sampled value is inaccurate.

Disclosure of Invention

The invention aims to at least solve the technical problems that the sampling precision is not high and the accurate average current is difficult to obtain in the prior art.

Therefore, the invention provides an average current sampling circuit which is applied to a switching converter, wherein the switching converter comprises a main switching tube, a follow current switching tube and a switching control signal, the switching control signal is used for controlling the on and off time of the main switching tube and the follow current switching tube, and the average current sampling circuit can sample the average value of the current flowing through the main switching tube or the follow current switching tube. Specifically, the average current sampling circuit includes: the device comprises a real-time sampling circuit, an average point detection circuit and a first sample hold circuit.

The real-time sampling circuit collects current flowing through the main switching tube or the follow current switching tube and generates a current sampling signal; the current sampling signal records real-time change information of the current flowing through the main switch tube or the freewheel switch tube. The average point detection circuit receives the switch control signal and generates a current analog signal according to the switch control signal, wherein the rising time of the current analog signal is the same as the conduction time of the main switch tube or the conduction time of the follow current switch tube, and the average point detection circuit generates a first narrow pulse signal when the current analog signal reaches one half of the amplitude value of the current analog signal. The first sampling and holding circuit receives the current sampling signal and the first narrow pulse signal, and samples and holds the current sampling signal at the midpoint of the amplitude of the current sampling signal according to the first narrow pulse signal to generate an average current signal, wherein the average current signal is the average value of the current sampling signal. The resulting average current signal may be used for further control of the switching converter.

The invention also provides an average current sampling method which is applied to the switching converter, wherein the switching converter comprises a main switching tube, a follow current switching tube and a switching control signal, the switching control signal is used for controlling the on and off time of the main switching tube and the follow current switching tube, and the average current sampling method comprises the following steps: collecting current flowing through a main switching tube or a follow current switching tube to generate a current sampling signal; generating a current analog signal according to the switch control signal, wherein the rising time of the current analog signal is the same as the conduction time of the main switch tube or the conduction time of the follow current switch tube; generating a first narrow pulse signal at the moment when the current analog signal reaches one half of the amplitude of the current analog signal; a first narrow pulse signal is sampled and held at a midpoint of an amplitude of a current sample signal to produce an average current signal, wherein the average current signal characterizes an average value of the current sample signal.

In summary, due to the adoption of the technical characteristics, the invention has the beneficial effects that:

the invention provides a high-precision average current sampling circuit and a high-precision average current sampling method, which are different from the traditional mode of filtering sampling current and the mode of calculating the trough value and the peak value of the sampling current.

Additional aspects and advantages of the invention will be set forth in part in the description which follows, or may be learned by practice of the invention.

Drawings

The foregoing and/or additional aspects and advantages of the invention will become apparent and may be better understood from the following description of embodiments taken in conjunction with the accompanying drawings in which:

FIG. 1 is a block diagram of an average current sampling circuit according to one embodiment of the present invention;

FIG. 2 is a circuit schematic of an average current sampling circuit according to one embodiment of the invention;

FIG. 3 is a schematic waveform diagram of an intermediate signal generated in an average current sampling circuit according to one embodiment of the present invention;

fig. 4 is a flow chart of an average current sampling method according to one embodiment of the present invention.

The correspondence between the reference numerals and the component names in fig. 1 to 4 is:

1. a real-time sampling circuit; 2. an average point detection circuit; 3. a sample-and-hold circuit;

21. a current analog signal generation module; 22. a sample-and-hold module; 23. a voltage control voltage source; 24. and a comparison module.

Detailed Description

In order that the above-recited objects, features and advantages of the present invention will be more clearly understood, a more particular description of the invention will be rendered by reference to the appended drawings and appended detailed description. It should be noted that, in the case of no conflict, the embodiments of the present application and the features in the embodiments may be combined with each other.

In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention, however, the present invention may be practiced otherwise than as described herein, and therefore the scope of the present invention is not limited to the specific embodiments disclosed below. Reference throughout this specification to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, the appearances of the phrases "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. The verbs "comprise" and "have" are used herein as open limits, which neither exclude nor require that there be unrecited features. Features recited in the dependent claims may be freely combined with each other unless explicitly stated otherwise. The use of an element defined as "one" or "one" (i.e., in the singular) throughout this document does not exclude the possibility of a plurality of such elements. Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. Unless otherwise indicated, the terms "connected" or "coupled" are used to designate electrical connections between circuit elements that may be direct or may be via one or more other elements. In contrast, when an element is referred to as being "directly connected to" or "directly coupled to" another element, there are no intervening elements present. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items. When referring to the voltage of a node or terminal, unless indicated otherwise, the voltage is considered to be the voltage between that node and a reference potential (typically ground).

Average current sampling circuits and methods provided according to some embodiments of the present invention are described below with reference to fig. 1-4. The average current sampling circuit and method may be used in a switching converter and the resulting average current signal may be used for further control of the switching converter.

Fig. 1 shows a block diagram of an average current sampling circuit according to an embodiment of the present invention, where the average current sampling circuit is applied to a switching converter, and the switching converter includes at least a main switching tube HS, a freewheel switching tube LS, and a switching control signal for controlling on and off times of the main switching tube HS and the freewheel switching tube LS. It will be appreciated that, typically in a continuous current control mode, the main switch tube HS and the freewheel switch tube LS may be turned on and off complementarily, and when either of the main switch tube HS and the freewheel switch tube LS is turned on, the other switch tube is turned off, i.e. the main switch tube HS and the freewheel switch tube LS have complementary on-times. The main input end of the average current sampling circuit is coupled between the main switching tube HS and the freewheel switching tube LS, and is used for obtaining a current sampling signal Ics representing the current flowing through the main switching tube HS or the freewheel switching tube LS, the output end of the average current sampling circuit outputs an average current signal Iavg, the switching elements in the switching converter can be further controlled through the average current signal Iavg, and the application mode of the average current signal Iavg is not limited in the disclosure.

Specifically, the average current sampling circuit includes a real-time sampling circuit 1, an average point detection circuit 2, and a first sample hold circuit 3.

The real-time sampling circuit 1 is used for collecting the current flowing through the main switch tube HS or the freewheel switch tube LS and outputting a current sampling signal Ics. The current sample signal Ics may be indicative of the real-time current flowing through the main switching tube HS, or may be indicative of the real-time current flowing through the freewheel switching tube LS, which is related to the selectively collected switching tube current. For further illustration, in the embodiment shown in fig. 1, an embodiment of the present invention will be further described taking the collecting and freewheeling switch LS as an example.

In the embodiment shown in fig. 1, the real-time sampling circuit 1 is configured to sample a real-time current flowing through the freewheel switch LS and generate a current sampling signal Ics. It can be appreciated that the real-time current sampling manner is also various, for example, sampling can be performed at two ends of the freewheel switch tube LS through parallel sampling tubes, and sampling can also be performed through sampling resistors. In fig. 1, it is illustrated that the real-time current flowing through the freewheel switch tube LS is sampled by a sampling resistor, in this embodiment, the real-time sampling circuit 1 includes a sampling resistor R and a second operational amplifier OP2, the sampling resistor R is coupled between the switch node and the freewheel switch tube LS; the switch node is a common node between the main switch tube HS and the freewheel switch tube LS, namely a SW point; the second operational amplifier OP2 has a first end, a second end and an output end, wherein the first end is coupled between the switching node and the sampling resistor R, the second end is coupled between the sampling resistor R and the freewheel switching tube LS, and the output end outputs a current sampling signal Ics; the current sampling signal Ics output by the real-time sampling circuit 1 at this time represents the current flowing through the freewheel switching tube LS. When the current flowing through the main switching tube HS needs to be sampled, the sampling resistor R may be coupled between the switching node and the main switching tube HS, the first end of the second operational amplifier OP2 may be coupled between the switching node and the sampling resistor R, and the second end may be coupled between the sampling resistor R and the main switching tube HS. It is to be understood that the above current collection method is only an example method given in this embodiment, and those skilled in the art may also use other current sampling methods to obtain the current sampling signal Ics as needed.

The average point detection circuit 2 receives the switch control signal and generates a current analog signal according to the switch control signal, wherein the rising time of the current analog signal is the same as the on time of the main switch tube HS or the on time of the freewheel switch tube LS. For example, when collecting the current flowing through the main switching tube HS, the rise time of the current analog signal is the same as the on time of the main switching tube HS; when collecting the current flowing through the freewheel switch tube LS, the rise time of the current analog signal is the same as the on time of the freewheel switch tube LS. The average point detection circuit 2 generates the first narrow pulse signal Tmid at the time when the current analog signal reaches its own half amplitude, that is, generates a current analog signal according to the influence of the logic state of the switch control signal on the current sampling signal Ics by the average point detection circuit 2, the rising time of the current analog signal is the same as the rising time or the falling time of the current sampling signal Ics, and generates the first narrow pulse signal Tmid capable of indicating that the current analog signal reaches the half amplitude, it can be understood that the current sampling signal Ics also reaches the half amplitude when the current analog signal VC1 reaches the half amplitude. The current sampling signal Ics at this time is further directly sampled in a subsequent circuit by generating a first narrow pulse signal Tmid marking this particular time.

Wherein, the rising time refers to the time when the signal rises from the minimum value to the maximum value in one period, and the corresponding falling time refers to the time when the signal falls from the maximum value to the minimum value in one period. The switch control signals comprise a main switch tube control signal CH for controlling the main switch tube HS and a freewheel switch tube control signal CL for controlling the freewheel switch tube LS, wherein the main switch tube control signal CH and the freewheel switch tube control signal CL are in logic complementation. The average point detection circuit 2 may select either the main switching tube control signal CH or the freewheel switching tube control signal CL to generate the first narrow pulse signal Tmid, which is related to the active edge of the selection control signal, as will be explained in the following embodiments.

Taking the average value of the current flowing through the freewheel switch LS as shown in fig. 1 as an example, the average point detection circuit 2 receives the main switch control signal CH or the freewheel switch control signal CL, and the current sampling signal Ics drops from the maximum value to the minimum value during the on period of the freewheel switch LS. The average point detection circuit 2 generates a current analog signal in the on period of the freewheel switch LS, and the current analog signal has a linear rising trend, so that the time when the current analog signal reaches its average value and the time when the current sampling signal Ics reaches its average value are equal. The average point detection circuit 2 will generate a narrow pulse at the average point instant of the current analog signal, thereby forming the first narrow pulse signal Tmid.

One input end of the first sample-and-hold circuit 3 is coupled with the output end of the real-time sampling circuit 1 to receive the current sampling signal Ics; the other input terminal is coupled to the output terminal of the average point detection circuit 2 to receive the first narrow pulse signal Tmid; the first sample-and-hold circuit 3 samples and holds the midpoint of the amplitude of the current sampling signal Ics according to the first narrow pulse signal Tmid to generate an average current signal Iavg, where the average current signal Iavg is the average value of the current sampling signal Ics.

Fig. 2 shows a circuit schematic of the average point detection circuit 2 and the first sample-and-hold circuit 3 of one embodiment of the present disclosure. The average point detection circuit 2 includes a current analog signal generation module 21, a sample-and-hold module 22, a voltage control voltage source 23, and a comparison module 24.

The current analog signal generating module 21 receives the switch control signal and generates a current analog signal VC1 according to the logic state of the switch control signal. In one embodiment, the current analog signal VC1 rises linearly during the duration of the logic low state of the main switch control signal CH, and the rising time of the current analog signal VC1 is equal to the duration of the logic low state of the main switch control signal CH. The sample-and-hold module 22 receives the switch control signal and the current analog signal VC1, and samples and holds the maximum amplitude of the current analog signal VC1 at the time of the active edge of the switch control signal and generates the amplitude voltage signal Vp. The active edge of the switch control signal may include a rising edge or a falling edge, which may be selected according to a specific embodiment, and in one embodiment, if the control signal is the main switch tube control signal CH, the active edge is a rising edge of the main switch tube control signal CH, and corresponds to the turn-off time of the freewheel switch tube LS, that is, the time when the current analog signal VC1 rises to the maximum amplitude. In yet another embodiment, if the control signal is a freewheeling switch control signal CL, the active edge is a falling edge of the freewheeling switch control signal CL. Through sampling in a plurality of periods, an amplitude voltage signal Vp is finally formed, and the amplitude voltage signal Vp represents the maximum amplitude of the current analog signal VC1. The voltage control voltage source 23 receives the amplitude voltage signal Vp and generates a voltage reference signal Vp2, the amplitude of the voltage reference signal Vp2 being half the amplitude of the amplitude voltage signal Vp; the voltage reference signal Vp2 is divided steadily by the voltage control voltage source 23 to generate a voltage reference signal Vp2 representing half the amplitude of the amplitude voltage signal Vp. The comparison module 24 receives the voltage reference signal Vp2 and the current analog signal VC1, compares them, and generates a narrow pulse at a timing when the current analog signal VC1 is equal to the voltage reference signal Vp2 to output a first narrow pulse signal Tmid, i.e., the first narrow pulse signal Tmid capable of identifying a timing when the current analog signal VC1 reaches one half of its own amplitude is generated by the comparison module 24.

With continued reference to fig. 2, in some embodiments, the current analog signal generation module 21 includes a current source A1, a first capacitor C1, and a first electronic switch S1. The current source A1 has an input end and an output end, and a first end of the current source A1 is coupled with the power supply voltage signal Vcc; the first capacitor C1 has a first end and a second end, the first end is coupled to the output end of the current source A1, and the second end is coupled to the reference ground; the voltage at the first end of the first capacitor C1 is the current analog signal VC1; the first electronic switch S1 is connected in parallel to two ends of the first capacitor C1, and a control end of the first electronic switch S1 receives a switch control signal, that is, the switch control signal controls on and off of the first electronic switch S1. In a specific embodiment, the control end of the first electronic switch S1 receives the main switch control signal CH, and when the main switch control signal CH is logic high, the first capacitor C1 is shorted; after the main switch control signal is turned to logic low, the power supply voltage signal Vcc charges the first capacitor C1 through the current source A1; during the duration when the main switching tube control signal CH is logic low, the voltage at the first end of the first capacitor C1 rises linearly, i.e. the rising time of the current analog signal VC1 is the same as the on time of the freewheel switching tube LS.

In some embodiments, the sample-and-hold module 22 includes a single pulse signal generator, a second electronic switch S2, and a second capacitor C2. The single pulse signal generator receives the switching control signal and generates a second narrow pulse signal CH-r at the time of the active edge of the switching control signal. In one embodiment, the single pulse signal generator receives the main switch control signal CH and generates a narrow pulse at a rising edge of the main switch control signal to form the second narrow pulse signal CH-r, wherein the rising edge of the main switch control signal corresponds to a time when the current analog signal VC1 reaches a maximum value. The second electronic switch S2 has a first end, a second end and a control end, the first end of the second electronic switch S2 is coupled to the first end of the first capacitor C1 to receive the current analog signal VC1, and the control end of the second electronic switch S2 receives the second narrow pulse signal CH-r, and controls the second electronic switch S2 to be turned on and off according to the second narrow pulse signal CH-r. The second capacitor C2 has a first end and a second end, the first end of the second capacitor C2 is coupled to the second end of the second electronic switch S2, and the second end of the second capacitor C2 is coupled to the ground, wherein the voltage at the first end of the second capacitor C2 is the amplitude voltage signal Vp. Specifically, the second electronic switch S2 is turned off immediately after the second narrow pulse signal CH-r is turned on at the rising edge of the main switch control signal for a corresponding time to sample the maximum value of the current analog signal VC1, and is held by the second capacitor C2 in a matching manner, and after a plurality of periods, the amplitude voltage signal Vp representing the maximum value of the current analog signal VC1 is formed.

In some embodiments, the voltage control voltage source 23 includes a first operational amplifier OP1, a first regulation tube M1, and a voltage dividing unit. The first operational amplifier OP1 has a first end, a second end and an output end, and the first end of the first operational amplifier OP1 receives the amplitude voltage signal Vp. The first adjusting tube M1 is provided with a first end, a second end and a control end, the first end of the first adjusting tube M1 receives a power supply voltage signal Vcc, the second end of the first adjusting tube M1 is coupled with the second end of the first operational amplifier OP1, and the control end of the first adjusting tube M1 is coupled with the output end of the first operational amplifier OP 1; the first adjusting tube M1 works in a saturation region, and the output voltage at the second end of the first adjusting tube M1 is kept equal to the amplitude voltage signal Vp through the arrangement of the first operational amplifier OP1 and the first adjusting tube M1. In one embodiment, the first end, the second end and the control end of the first adjusting tube M1 correspond to the drain, the source and the gate of the transistor, respectively; the first end and the second end of the first operational amplifier OP1 correspond to the non-inverting input end and the inverting input end of the operational amplifier respectively, and it can be understood that the connection sequence of the ends can be adjusted according to actual needs. The voltage dividing unit has an input end and an output end, the input end of the voltage dividing unit is coupled with the second end of the first adjusting tube M1 and outputs a voltage reference signal Vp2 at the output end of the voltage dividing unit, wherein the voltage of the second end of the first adjusting tube M1 is divided by the voltage dividing unit, so that the voltage reference signal Vp2 is half of the amplitude voltage signal Vp. In a specific embodiment, the voltage dividing unit performs voltage division by adopting a resistor voltage dividing manner, specifically, the voltage dividing unit includes a first resistor R1 and a second resistor R2, one end of the first resistor R1 is coupled to the second end of the first switch tube, the other end of the first resistor R1 is connected to one end of the second resistor R2, the other end of the second resistor R2 is coupled to the ground, and a common node of the first resistor R1 and the second resistor R2 is used as an output end of the voltage dividing unit. The adjustment of the amplitude of the voltage reference signal Vp2 can be achieved by adjusting the resistance values of the first resistor R1 and the second resistor R2, for example, the resistance values of the first resistor R1 and the second resistor R2 are equal.

In fig. 2, the comparing module 24 is schematically shown as a comparator, the non-inverting input terminal of the comparator is connected to the voltage reference signal Vp2, the inverting input terminal of the comparator is connected to the current analog signal VC1, the voltage reference signal Vp2 and the current analog signal VC1 are compared by the comparator, and when the current analog signal VC1 is equal to the voltage reference signal Vp2, a narrow pulse is generated, so as to output the first narrow pulse signal Tmid. It will be appreciated that other comparison circuits with comparison function may be used for the comparison module 24, and that the non-inverting input and the inverting input of the comparator may be opposite.

In some embodiments, the first sample-and-hold circuit 3 comprises a third electronic switch S3 and a third capacitor C3. The first end of the third electronic switch S3 receives the current sampling signal Ics, the second end of the third electronic switch S3 is coupled to the first end of the third capacitor C3, and the second end of the third capacitor C3 is coupled to the reference ground. The control end of the third electronic switch S3 receives the first narrow pulse signal Tmid, the first narrow pulse signal Tmid controls the third electronic switch S3 to be turned on and off, specifically, the first narrow pulse signal Tmid turns on the third electronic switch S3 when the current analog signal VC1 reaches its own half amplitude, that is, when the current sampling signal Ics reaches its own half amplitude, and immediately turns off the third electronic switch S3 under the control of the narrow pulse signal, the current sampling signal Ics charges the third capacitor C3 with a voltage of one half of its own amplitude, and the first end of the third capacitor C3 outputs an average current signal Iavg representing an average value of the current sampling signal Ics.

Fig. 3 shows waveforms of the main switch tube control signal CH, the second narrow pulse signal CH-r, the current analog signal VC1, and the first narrow pulse signal Tmid in an embodiment of the present disclosure, it can be seen that a rising edge of the first narrow pulse signal Tmid corresponds to a time when the current analog signal VC1 reaches one half of the amplitude, that is, a time when the sampled current signal reaches one half of the amplitude; the rising edge of the second narrow pulse signal CH-r corresponds to the moment when the current analog signal VC1 reaches the maximum value, i.e. the turn-off moment of the main switching tube HS or the turn-off moment of the freewheel switching tube LS (selected according to need). The smaller the pulse widths of the first narrow pulse signal Tmid and the second narrow pulse signal CH-r, the higher the accuracy of the finally output average current signal Iavg.

Fig. 4 is a flow chart of an average current sampling method disclosed in an embodiment of the present invention, which can be applied in the aforementioned switching converter to generate an average current signal Iavg, which can be used to participate in further control of switching devices in the switching converter, the method comprising steps S11-S14.

S11, collecting current flowing through a main switch tube HS or a follow current switch tube LS, and generating a current sampling signal Ics.

S12, generating a current analog signal VC1 according to the switch control signal, wherein the rising time of the current analog signal VC1 is the same as the conduction time of the main switch tube HS or the conduction time of the freewheel switch tube LS.

S13, the first narrow pulse signal Tmid is generated at the moment when the current analog signal VC1 reaches its own half amplitude.

S14, sampling and holding at the midpoint of the amplitude of the current sampling signal Ics with the first narrow pulse signal Tmid to generate an average current signal Iavg, wherein the average current signal Iavg characterizes the average value of the current sampling signal Ics.

In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (10)

1. An average current sampling circuit applied to a switching converter, the switching converter including a main switching tube, a freewheel switching tube and a switch control signal for controlling on and off times of the main switching tube and the freewheel switching tube, the average current sampling circuit comprising:

the real-time sampling circuit is used for collecting current flowing through the main switching tube or the follow current switching tube and generating a current sampling signal;

the average point detection circuit receives the switch control signal and generates a current analog signal according to the switch control signal, wherein the rising time of the current analog signal is the same as the conduction time of the main switch tube or the conduction time of the follow current switch tube, and the average point detection circuit generates a first narrow pulse signal when the current analog signal reaches one half of the amplitude value of the current analog signal;

and the first sampling and holding circuit is used for receiving the current sampling signal and the first narrow pulse signal, and sampling and holding the current sampling signal at the midpoint of the amplitude of the current sampling signal according to the first narrow pulse signal to generate an average current signal, wherein the average current signal represents the average value of the current sampling signal.

2. The average current sampling circuit of claim 1 wherein the average point detection circuit comprises:

the current analog signal generation module receives the switch control signal and generates a current analog signal according to the logic state of the switch control signal;

the sampling and holding module is used for receiving the switch control signal and the current analog signal, sampling and holding the maximum amplitude of the current analog signal at the effective edge moment of the switch control signal and generating an amplitude voltage signal;

the voltage control voltage source receives an amplitude voltage signal and generates a voltage reference signal, wherein the amplitude of the voltage reference signal is half of the amplitude voltage signal;

and the comparison module receives the voltage reference signal and the current analog signal, and generates a narrow pulse at the moment when the current analog signal is equal to the voltage reference signal so as to output a first narrow pulse signal.

3. The average current sampling circuit of claim 2 wherein the current analog signal generation module comprises:

a current source having an input and an output, a first end of the current source being coupled to a supply voltage signal;

a first capacitor having a first end and a second end, the first end of the first capacitor being coupled to the output of the current source, the second end of the first capacitor being coupled to a reference ground; wherein, the first end of the first capacitor outputs the current analog signal;

the first electronic switch is provided with a control end, the first electronic switch is connected in parallel with two ends of the first capacitor, and the control end of the first electronic switch receives a switch control signal.

4. The average current sampling circuit of claim 2 wherein the sample-and-hold module comprises:

the single pulse signal generator is provided with an input end and an output end, the input end of the single pulse signal generator receives a switch control signal, and the single pulse signal generator generates a second narrow pulse signal at the effective edge moment of the switch control signal;

the second electronic switch is provided with a first end, a second end and a control end, wherein the first end of the second electronic switch receives a current analog signal, and the control end of the second electronic switch receives a second narrow pulse signal;

and the second capacitor is provided with a first end and a second end, the first end of the second capacitor is coupled with the second end of the second electronic switch, the second end of the second capacitor is coupled with the ground reference, and the first end of the second capacitor outputs the amplitude voltage signal.

5. The average current sampling circuit of claim 2 wherein said voltage controlled voltage source comprises:

a first operational amplifier having a first end, a second end, and an output end, the first end of the first operational amplifier receiving an amplitude voltage signal;

the first end of the first adjusting tube is used for receiving a power supply voltage signal, the second end of the first adjusting tube is coupled with the second end of the first operational amplifier, and the control end of the first adjusting tube is coupled with the output end of the first operational amplifier;

the voltage dividing unit is provided with an input end and an output end, wherein the input end of the voltage dividing unit is coupled with the second end of the first adjusting tube, and a voltage reference signal is output at the output end of the voltage dividing unit.

6. The average current sampling circuit of claim 5 wherein said voltage dividing unit comprises:

a first resistor having a first end and a second end, the first end of the first resistor being coupled to the second end of the first switching tube;

and the second resistor is provided with a first end and a second end, the first end of the second resistor is coupled with the second end of the first resistor, the second end of the second resistor is coupled with the reference ground, and the common node of the first resistor and the second resistor is used as the output end of the voltage dividing unit.

7. The average current sampling circuit of claim 1, wherein the switch control signal comprises a main switch tube control signal and a freewheel switch tube control signal, the main switch tube control signal and the freewheel switch tube control signal being logically complementary;

when the current sampling signal represents the current flowing through the main switching tube, the average point detection circuit generates a first narrow pulse signal according to the logic state of the control signal of the follow current switching tube;

when the current sampling signal represents the current flowing through the freewheel switch tube, the average point detection circuit generates a first narrow pulse signal according to the logic state of the control signal of the main switch tube.

8. The average current sampling circuit of claim 1 wherein said first sample-and-hold circuit comprises:

the third electronic switch is provided with a first end, a second end and a control end, wherein the first end of the third electronic switch receives a current sampling signal, and the control end of the third electronic switch receives a first narrow pulse signal;

and a third capacitor having a first end and a second end, the first end of the third capacitor being coupled to the second end of the third electronic switch, the second end of the third capacitor being coupled to a ground reference, wherein the first end of the third capacitor outputs the average current signal.

9. The average current sampling circuit of claim 1 wherein the real-time sampling circuit comprises:

the sampling resistor is coupled between the switch node and the main switch tube or the follow current switch tube;

the second operational amplifier is provided with a first end, a second end and an output end, wherein the first end of the second operational amplifier is coupled between the switch node and the sampling resistor, the second end of the second operational amplifier is coupled between the sampling resistor and the main switch tube or the freewheel switch tube, and the output end of the second operational amplifier outputs a current sampling signal.

10. The average current sampling method is applied to a switching converter, the switching converter comprises a main switching tube, a follow current switching tube and a switching control signal, and the switching control signal is used for controlling the on and off time of the main switching tube and the follow current switching tube, and is characterized in that the average current sampling method comprises the following steps:

collecting current flowing through a main switching tube or a follow current switching tube to generate a current sampling signal;

generating a current analog signal according to the switch control signal, wherein the rising time of the current analog signal is the same as the conduction time of the main switch tube or the conduction time of the follow current switch tube;

generating a first narrow pulse signal at the moment when the current analog signal reaches one half of the amplitude of the current analog signal;

a first narrow pulse signal is sampled and held at a midpoint of an amplitude of a current sample signal to produce an average current signal, wherein the average current signal characterizes an average value of the current sample signal.