CN117639477B

CN117639477B - BOOST system and control method of system power tube

Info

Publication number: CN117639477B
Application number: CN202410112551.0A
Authority: CN
Inventors: 赵鑫; 邓超
Original assignee: Shenzhen Chip Hope Micro-Electronics Ltd
Current assignee: Shenzhen Chip Hope Micro-Electronics Ltd
Priority date: 2024-01-26
Filing date: 2024-01-26
Publication date: 2024-03-26
Anticipated expiration: 2044-01-26
Also published as: CN117639477A

Abstract

The application discloses a BOOST system and a control method of a system power tube, which are applied to the technical field of power electronics. The method comprises the steps of firstly obtaining a first time length ton, a second time length toff and a time delay time length td of a BOOST system in a previous switching period, calculating the on time length of a system power tube in the current switching period, and finally controlling the system power tube according to the determined on time length. The determining formula of the on-time Ton of the system power tube is as follows: ton=ton 0× (ton+toff+td)/(ton+toff), and zero is taken when the delay period is not present. According to the scheme, through optimizing an algorithm of the input current, the input current can absolutely follow the change of the input voltage no matter in a CrM mode or in a DCM mode, and the modulation effect of a high PF is kept in the whole working process of the system.

Description

BOOST system and control method of system power tube

Technical Field

The present disclosure relates to the field of power electronics, and in particular, to a BOOST system and a control method for a system power tube.

Background

Power factor correction (Power Factor Correction, PFC) is a measure to improve the power factor of the grid. FIG. 1 is a circuit block diagram of a conventional BOOST system; as shown in fig. 1, the conventional PFC implementation is relatively simple, in which a signal (Vcomp) for determining the on time in a power frequency period is filtered through a large filter capacitor of the system, that is, the on time of the system in a power frequency period is almost unchanged (that is, the original on time ton 0=k×vcomp of a power tube of the system is a fixed parameter of the system, and Vcomp is determined by a Constant Voltage ring (Constant Voltage, CV ring) of the BOOST system to ensure that the output Voltage of the BOOST system is Constant.

Although the traditional PFC implementation mode is simpler, the traditional PFC implementation mode is established on the premise that the system always works in the CrM mode, but in practical application, the system cannot be guaranteed to always work in the absolute CrM mode, and with the complex diversification of application environments, the system is required to work in a discontinuous conduction mode (Discontinuous Conduction Mode, DCM mode) under specific application conditions so as to reduce the working frequency of the system and obtain better efficiency. Unlike the input current algorithm in the CrM mode, if the same input current control method as that in the CrM mode is still adopted, the requirement of high Power Factor (PF) cannot be satisfied.

Therefore, how to ensure that the BOOST system maintains the high PF in both the CrM mode and the DCM mode is a problem to be solved by those skilled in the art.

Disclosure of Invention

The purpose of the application is to provide a BOOST system and a control method of a system power tube, so as to solve the problem that the traditional algorithm can not ensure that the BOOST system keeps high PF in a CrM mode and a DCM mode.

In order to solve the above technical problems, the present application provides a control method of a system power tube, applied to a control circuit connected to a control end of the system power tube, the method includes:

acquiring a first time length from zero to a peak value of an inductance current in a last switching period in a BOOST system, a second time length from the peak value to zero of the inductance current, and a time delay time length of a system power tube; the BOOST system has the first time length and the second time length in a CrM mode, and has the first time length, the second time length and the delay time length in a DCM mode; taking zero when the time delay time is not existed;

determining the conduction time of the system power tube in the current switching period according to the acquired first time, second time and delay time; the determining formula of the on-time Ton of the system power tube is as follows: ton=ton 0× (ton+toff+td)/(ton+toff); ton is the first time length, toff is the second time length, td is the time delay time length, ton0 is the original on time length, and the original on time length is determined by a CV loop of the BOOST system and is used for ensuring that the output voltage of the BOOST system is constant;

and controlling the system power tube according to the determined conduction time.

Preferably, the determining, according to the obtained first duration, the obtained second duration, and the obtained delay duration, the on duration of the system power tube in the current switching cycle includes:

determining a first voltage proportional to the delay time period and determining a second voltage proportional to the sum of the first time period and the second time period;

converting the first voltage to a first charging current and converting the second voltage to a second charging current;

and determining the conduction time of the system power tube in the current switching period according to the first charging current, the first time length and the second charging current.

In order to solve the above technical problems, an embodiment of the present application provides a BOOST system, including a control circuit and a system power tube;

the control circuit is connected with the control end of the system power tube;

the control circuit is used for realizing the control method of the system power tube.

Preferably, the control circuit includes: a conduction time length determining circuit; the on-time determining circuit is used for determining the on-time of the system power tube in the current switching period according to the acquired first time, second time and delay time;

the on-time determining circuit includes: the device comprises a first voltage determining circuit, a second voltage determining circuit, a charging current determining circuit and a conduction time length output circuit;

the first voltage determining circuit is used for determining a first voltage proportional to the delay time length;

the second voltage determining circuit is used for determining a second voltage proportional to the sum of the first time duration and the second time duration;

the charging current determining circuit is respectively connected with the first voltage determining circuit and the second voltage determining circuit and is used for converting the first voltage into a first charging current and converting the second voltage into a second charging current;

the on-time output circuit is connected with the charging current determining circuit and is used for determining the on-time of the system power tube in the current switching period according to the first charging current, the first time and the second charging current.

Preferably, the first voltage determining circuit includes: a first capacitor, a first switch;

a first end of the first switch is connected with a preset charging current;

the second end of the first switch is connected with the first end of the first capacitor; the second end of the first capacitor is grounded;

and opening the first switch after the delay time is closed so as to obtain the first voltage of the first end of the first capacitor.

Preferably, the second voltage determining circuit includes: a second capacitor, a second switch;

a first end of the second switch is connected with a preset charging current;

the second end of the second switch is connected with the first end of the second capacitor; the second end of the second capacitor is grounded;

opening the second switch after the second switch is closed for a third period of time to obtain the second voltage of the first end of the second capacitor; wherein the third time period is the sum of the first time period and the second time period.

Preferably, the charging current determination circuit includes: the circuit comprises an operational amplifier, a first MOS tube, a current mirror and a resistor;

the non-inverting input end of the operational amplifier is connected with the first voltage and the second voltage;

the inverting input end of the operational amplifier, the source electrode of the first MOS tube and the first end of the resistor are connected with each other, and the second end of the resistor is grounded;

the output end of the operational amplifier is connected with the grid electrode of the first MOS tube, and the drain electrode of the first MOS tube is connected with the input end of the current mirror so as to obtain the first charging current and the second charging current which are output by the current mirror.

Preferably, the number of the charging current determining circuits is one; the first voltage and the second voltage are connected to the same non-inverting input end of the operational amplifier, and only one voltage is connected at the same time;

the current mirror comprises a first output end and a second output end; when the non-inverting input end of the operational amplifier is connected with the first voltage, the first output end of the current mirror outputs the first charging current; and when the non-inverting input end of the operational amplifier is connected with the second voltage, the second output end of the current mirror outputs the second charging current.

Preferably, the number of the charging current determining circuits is two, and the charging current determining circuits correspond to the first voltage and the second voltage respectively; the first voltage and the second voltage are respectively connected to the non-inverting input ends of the operational amplifiers corresponding to the first voltage and the second voltage;

the current mirror corresponding to the first voltage outputs the first charging current, and the current mirror corresponding to the second voltage outputs the second charging current.

Preferably, the on-time output circuit includes: a third switch, a fourth switch, a third capacitor, a fourth capacitor, and a comparator;

a first end of the third switch is connected with the first charging current; the second end of the third switch, the first end of the third capacitor and the non-inverting input end of the comparator are connected with each other; the second end of the third capacitor is grounded; the third switch is opened after being closed for the first time period, and the fourth switch is closed when the third switch is opened;

the first end of the fourth switch is connected with the second charging current; the second end of the fourth switch, the first end of the fourth capacitor and the inverting input end of the comparator are connected with each other; the second end of the fourth capacitor is grounded; so that the comparator outputs a signal after the on-time period elapses from when the third switch is turned on.

The control method of the system power tube is applied to a control circuit connected with a control end of the system power tube. The method comprises the steps of firstly obtaining a first time length from zero to a peak value of an inductance current in a last switching period of a BOOST system, a second time length from the peak value to zero of the inductance current and a time delay time length of a system power tube; the BOOST system has a first time length and a second time length in the CrM mode, and has the first time length, the second time length and a time delay time length in the DCM mode. And then determining the conduction time of the system power tube in the current switching period according to the acquired first time length, second time length and delay time length, and finally controlling the system power tube according to the determined conduction time length. The determining formula of the on-time Ton of the system power tube is as follows: ton=ton 0× (ton+toff+td)/(ton+toff); ton is the first duration, toff is the second duration, td is the delay duration, ton0 is the original on duration, and the original on duration is determined by a CV loop of the BOOST system and is used for guaranteeing constant output voltage of the BOOST system. Ton determined by the above formula can not only keep high PF in CrM mode, but also eliminate the effect of td in DCM mode. Therefore, the scheme ensures that the input current can absolutely follow the change of the input voltage in the CrM mode or the DCM mode by optimizing the algorithm of the input current, and the modulation effect of a high PF is maintained in the whole working process of the system.

The application also provides a BOOST system which corresponds to the method, so that the BOOST system has the same beneficial effects as the method.

Drawings

For a clearer description of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described, it being apparent that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a circuit block diagram of a conventional BOOST system;

FIG. 2 is a schematic waveform diagram in CrM mode;

FIG. 3 is a schematic waveform diagram of DCM mode;

fig. 4 is a flowchart of a control method of a system power tube according to an embodiment of the present application;

fig. 5 is a circuit configuration diagram of a first voltage determining circuit according to an embodiment of the present application;

fig. 6 is a circuit configuration diagram of a second voltage determining circuit according to an embodiment of the present application;

fig. 7 is a circuit configuration diagram of a charging current determining circuit according to an embodiment of the present application;

fig. 8 is a circuit configuration diagram of an on-time output circuit according to an embodiment of the present application.

Detailed Description

The following description of the technical solutions in the embodiments of the present application will be made clearly and completely with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, but not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments herein without making any inventive effort are intended to fall within the scope of the present application.

The core of the application is to provide a BOOST system and a control method of a system power tube, so as to solve the problem that the traditional algorithm can not ensure that the BOOST system keeps high PF in a CrM mode and a DCM mode.

In order to provide a better understanding of the present application, those skilled in the art will now make further details of the present application with reference to the drawings and detailed description.

Here, the waveforms of the CrM mode and the DCM mode are described; where Iin is the average inductor input current and is the average value of an inductor current. IL is the inductor current value, which is a real time value. A normal switching cycle is a triangular wave (CrM mode) or a triangular wave and a period of time delay (DCM mode). Ipk is the peak current of the inductor and is the maximum value of the inductor current. ton0 is the original conduction time of the system power tube in the traditional scheme; the inductor current increases gradually from 0 to a peak value over a first period of time ton. The second duration toff is the system power tube off time during which the inductor current gradually decreases from a peak value to 0. The delay time td is the length of time that the system power tube keeps being turned off after the inductor current is reduced from the peak value to 0, i.e. the so-called DCM mode, so the power tube off time in this mode is the sum of toff and td. Vin is the input voltage peak, vac is the input voltage ac value, vin=1.414×vac. sin theta is an ac phase coefficient, the instantaneous value of the input voltage is equal to Vin x sin theta, and when the phase coefficient of the input current is also sin theta, it means that the input voltage is in phase with the input current, and the system is high PF. L is the inductance of the system inductance, the inductance current satisfies i=v/l×t, I is the current variation across the inductance, V is the voltage across the inductance, t is the time the voltage is applied across the inductance, and Ipk at a certain moment is generated by the voltage vin×sin θ across the inductance and the time (ton) the voltage is applied across the inductance.

FIG. 2 is a schematic waveform diagram in CrM mode; as shown in fig. 2, the calculation formula of each parameter is as follows:

Iin=1/2×Ipk；

Vin=Vac×1.414；

Ipk=Vin×sinθ/L×ton0；

Iin=1/2×Vin×sinθ/L×ton0=1/2×Vin/L×ton0×sinθ；

in the CrM mode, ton0 is fixed in one power frequency period, vin is unchanged under a specific input line voltage, and L is a fixed inductance value. The input current remains the same as the input voltage amplitude phase, both being θ.

FIG. 3 is a schematic waveform diagram of DCM mode; as shown in fig. 3, the calculation formula of each parameter is as follows:

Iin=1/2×Ipk×（ton+toff）/（ton+toff+td）；

Vin=Vac×1.414；

Ipk=Vin×sinθ/L×ton0；

Iin=1/2×Vin×sinθ/L×ton0×（ton+toff）/（ton+toff+td）=1/2×Vin/L×ton0×(ton+toff）/（ton+toff+td）×sinθ；

the calculation formula of Iin in DCM is increased by the term (ton+toff)/(ton+toff+td), i.e. the average input current is also affected by toff and td, and cannot follow the phase of the input voltage completely, and the PF value has an effect.

It can be seen that for CrM mode, iin is equal to 1/2ipk, iin will naturally follow the input voltage phase, PF is high; however, for DCM mode, iin is equal to 1/2Ipk× (ton+toff)/(ton+toff+td), the PF value is affected by the factor (ton+toff)/(ton+toff+td) interference. In order to eliminate the influence of the coefficient, the embodiment of the application provides a control method of a system power tube, which is applied to a control circuit connected with a control end of the system power tube. Fig. 4 is a flowchart of a control method of a system power tube according to an embodiment of the present application; as shown in fig. 4, the method comprises the steps of:

s10: and acquiring a first time length when the inductance current is increased from zero to a peak value in a last switching period in the BOOST system, a second time length when the inductance current is reduced from the peak value to zero and a time delay time length of a system power tube.

The BOOST system has a first time length and a second time length in the CrM mode, and has the first time length, the second time length and a time delay time length in the DCM mode.

S11: and determining the conduction time of the system power tube in the current switching period according to the acquired first time, second time and delay time.

The determining formula of the on-time Ton of the system power tube is as follows: ton=ton 0× (ton+toff+td)/(ton+toff); ton is a first time length, toff is a second time length, td is a time delay time length, ton0 is an original on time length, and the original on time length is determined by a CV ring of the BOOST system and is used for ensuring that the output voltage of the BOOST system is constant; and taking zero when the time delay time is not existed.

S12: and controlling the system power tube according to the determined conduction time.

According to the method, the algorithm of the input current is optimized, so that the input current can absolutely follow the change of the input voltage no matter in the CrM mode or in the DCM mode, and the modulation effect of a high PF is kept in the whole system working process.

From the above, it is known that:

where Ton0 is determined by the Vcomp signal of the reaction load, and denoted as Ton 0=k×vcomp, the present application sets the original on-time Ton0 to be determined by the Vcomp signal, and introduces a coefficient term of (ton+toff+td)/(ton+toff), and the on-time is denoted as Ton, that is:

Ton=K×Vcomp×(ton+toff+td)/(ton+toff)；

(Note that ton, toff, td here generally uses the value sampled for the last cycle, since Vcomp is almost unchanged for one power frequency cycle, it can be approximately considered that ton, toff, td for the last cycle is approximately equal to the value for the current cycle.)

Substituting iin=1/2×vin×sin θ/l×ton× (ton+toff)/(ton+toff+td);

i.e. Iin=1/2×vin×sin θ/l×K×Vcomp=1/2×vin/l×K×Vcomp×sin θ;

because Vcomp is almost unchanged in a later period of power frequency, vin, L and K are constants, after optimization, the input current is kept the same as the input voltage amplitude phase, and both are theta. Note that iin=1/2×vin×sin θ/l×ton× (ton+toff)/(ton+toff+td); the formula itself also applies to CrM (td=0). Therefore, the optimized input current algorithm is simultaneously suitable for the CrM mode and the DCM mode, and the influence of the change of the working mode on the PF is not required to be considered when the system is applied.

In order to set Ton to the coefficient term of (ton+toff+td)/(ton+toff) which is determined by Vcomp signal and is reintroduced, the following formula is modified as explained below.

Ton=K×Vcomp×(ton+toff+td)/(ton+toff)；

Ton=K×Vcomp×（1+td/(ton+toff))；

Ton=K×Vcomp+K×Vcomp×td/(ton+toff)；

Where kxvcomp is a conventional algorithm for reproducing the corresponding ton from the value of load-adjusted Vcomp, a further term kxvcomp×td/(ton+toff), i.e. a ton0×td/(ton+toff) term, is added on this basis, denoted tdelay. Note that ton0 is generated solely from the value of Vcomp, which remains almost unchanged for one power frequency period, and td, ton, toff is sampled for the last period. To sum up, ton=ton 0+tdelay after the optimization algorithm.

The following describes how to obtain the time value tdelay above with a specific circuit. Fig. 5 is a circuit configuration diagram of a first voltage determining circuit according to an embodiment of the present application; as shown in fig. 5, the first voltage determining circuit includes a first capacitor C1, a first switch; the first end of the first switch is connected with a preset charging current ICh1; the second end of the first switch is connected with the first end of the first capacitor C1; the second end of the first capacitor C1 is grounded; the first switch is opened after a time delay td to obtain a first voltage Δv1 at a first end of the first capacitor C1. Fig. 6 is a circuit configuration diagram of a second voltage determining circuit according to an embodiment of the present application; as shown in fig. 6, the second voltage determining circuit includes a second capacitor C2, a second switch; the first end of the second switch is connected with a preset charging current ICh2; the second end of the second switch is connected with the first end of the second capacitor C2; the second end of the second capacitor C2 is grounded; the second switch is opened after being closed for a third time period to obtain a second voltage delta V2 of the first end of the second capacitor C2; the third time period is the sum of the first time period ton and the second time period toff.

To obtain the values of td/ton+toff, the values of td and ton+toff are first obtained by chip sampling. Then charging the two capacitors with the two times and a fixed current source, respectively, can be obtained:

Ich1×td=C1×ΔV1；

Ich2×(ton+toff)=C2×ΔV2；

ΔV1=Ich1×td/C1；

ΔV2=Ich2×(ton+toff)/C2；

control ich1=ich2, c1=c2; Δv1/Δv2=td/(ton+toff).

Fig. 7 is a circuit configuration diagram of a charging current determining circuit according to an embodiment of the present application; as shown in fig. 7, the charging current determining circuit includes an operational amplifier U1, a first MOS transistor M1, a current mirror (only a part of the current mirror is shown in fig. 7), and a resistor R. The non-inverting input end of the operational amplifier U1 is connected with a first voltage delta V1 and a second voltage delta V2; the inverting input end of the operational amplifier U1, the source electrode of the first MOS tube M1 and the first end of the resistor R are connected with each other, and the second end of the resistor R is grounded; the output end of the operational amplifier is connected with the grid electrode of the first MOS tube M1, and the drain electrode of the first MOS tube M1 is connected with the input end of the current mirror to obtain a first charging current ICh3 and a second charging current ICh4 which are output by the current mirror. Fig. 8 is a circuit configuration diagram of an on-time output circuit according to an embodiment of the present application; as shown in fig. 8, the on-time output circuit includes a third switch, a fourth switch, a third capacitor C3, a fourth capacitor C4, and a comparator U2 (fig. 8 also shows another part of the current mirror). The first end of the third switch is connected to the first charging current ICh3; the second end of the third switch, the first end of the third capacitor C3 and the non-inverting input end of the comparator U2 are connected with each other; the second end of the third capacitor C3 is grounded; the third switch is opened after being closed for a first time period ton, and the fourth switch is closed when the third switch is opened; the first end of the fourth switch is connected with a second charging current ICh4; the second end of the fourth switch, the first end of the fourth capacitor C4 and the inverting input end of the comparator U2 are connected with each other; the second end of the fourth capacitor C4 is grounded; so that the comparator U2 outputs a signal after the on-time Ton has elapsed since the third switch was turned on.

Δv1 and Δv2 are converted into currents Ich3 and Ich4 by VtoI as charging currents for the capacitors C3, C4, respectively. The method comprises the following steps:

Ich3=ΔV1/R；

Ich4=ΔV2/R；

for charging C3 with Ich3 in ton time, lch3×ton=c3×Δv3, Δv3=Δv1/r×ton/C3.

After the charge of c3=c4, the voltage is maintained, the Ich4 is controlled to charge the C4, and when the voltage Δv4 on the C4 is equal to the voltage value on the C3, the comparator is turned over, and the charge time to the C4 is denoted as t_c4, and Δv2/r×t_c4/c4=Δv4=Δv3=Δv1/r×ton/C3 is present.

I.e. t_c4=Δv1/Δv2×ton=ton×td/(ton+toff) =tdelay; in this way, the required tdelay time is obtained, and the control system is turned on in ton=ton+tdelay time to realize high PF modulation compatible with CrM and DCM modes.

Where Icharge (Ich) is a capacitor charging current, Δv is a capacitor voltage change amount, t is a capacitor charging time, C is a capacitor capacitance value, and ichχt=c×Δv is present, so that when the charging current and the capacitor capacitance value are fixed, the capacitor voltage change amount is a reflection of the charging time.

The two capacitors have the same capacitance and the same capacitance voltage variation, and the products of the corresponding capacitor charging time and charging current should be equal, so that when the product of the charging time and charging current of one capacitor is determined, the product of the charging time and charging current of the other capacitor is determined in order to obtain the same capacitance and the same capacitance voltage variation, and the charging time of the other capacitor can be determined if the charging current of the other capacitor is known. The above formulas are all objectively determined based on the basic principle of the system operation, and compared with the traditional control method, the novel optimized control mode is adopted to better adapt to the system to maintain a high PF value based on the basic principle that the system operation is objectively determined.

The implementation mode illustrated herein is a process of realizing time voltage conversion and voltage-to-current re-conversion by utilizing the charge-discharge characteristics of the capacitor. The implementation of the details is not limited to a form, for example, the design of VtoI can be used for multiplexing one operational amplifier and two operational amplifiers, and the logic design of the two operational amplifiers is simpler but the chip area is increased. For example, the charging capacitors with equal capacitance values can be added with additional control logic circuits to be multiplexed into one capacitor to obtain higher matching precision, and the additional control logic circuits bring design difficulty, but are feasible in principle. The design method for realizing time voltage change and voltage-to-current reacquiring time by utilizing the charge-discharge characteristics of the capacitor is within the protection scope of the application.

In the BOOST system provided by the embodiment of the application, the control circuit is connected with the control end of the system power tube, so that the control circuit can control the conduction time of the system power tube. In practical application, the steps can be realized through a specific control circuit, and the control circuit comprises a conduction time length determining circuit for determining the conduction time length of the system power tube in the current switching period according to the acquired first time length, second time length and delay time length. A specific structure of a conduction period determination circuit is provided, which comprises a first voltage determination circuit, a second voltage determination circuit, a charging current determination circuit and a conduction period output circuit. The first voltage determining circuit is used for determining a first voltage proportional to the delay time length; the second voltage determining circuit is used for determining a second voltage proportional to the sum of the first time duration and the second time duration; the charging current determining circuit is respectively connected with the first voltage determining circuit and the second voltage determining circuit and is used for converting the first voltage into a first charging current and converting the second voltage into a second charging current; the on-time output circuit is connected with the charging current determining circuit and is used for determining the on-time of the system power tube in the current switching period according to the first charging current, the first time and the second charging current.

Specifically, the first voltage determination circuit may refer to the structure shown in fig. 5, the second voltage determination circuit may refer to the structure shown in fig. 6, the charging current determination circuit may refer to the structure shown in fig. 7, and the on-time output circuit may refer to the structure shown in fig. 8. If the number of the charging current determining circuits is one, that is, the design of VtoI multiplexes one operational amplifier, the first voltage and the second voltage are connected to the same non-inverting input end of the same operational amplifier, and only one voltage is connected at the same time; the current mirror comprises a first output end and a second output end; when the non-inverting input end of the operational amplifier is connected with a first voltage, the first output end of the current mirror outputs a first charging current; when the non-inverting input end of the operational amplifier is connected with the second voltage, the second output end of the current mirror outputs a second charging current; the scheme of adopting a charging current determining circuit can save hardware cost. If the number of the charging current determining circuits is two, two operational amplifiers are used for respectively corresponding to the first voltage and the second voltage, i.e. VtoI. The first voltage and the second voltage are respectively connected to the non-inverting input ends of the corresponding operational amplifiers; the current mirror corresponding to the first voltage outputs a first charging current, and the current mirror corresponding to the second voltage outputs a second charging current; by adopting the scheme of two charging current determining circuits, the control logic is simpler.

The control method of the BOOST system and the system power tube provided by the application is described in detail. In the description, each embodiment is described in a progressive manner, and each embodiment is mainly described by the differences from other embodiments, so that the same similar parts among the embodiments are mutually referred. It should be noted that it would be obvious to those skilled in the art that various improvements and modifications can be made to the present application without departing from the principles of the present application, and such improvements and modifications fall within the scope of the present application.

It should also be noted that in this specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.

Claims

1. A control method for a system power tube, which is applied to a control circuit connected with a control end of the system power tube, the method comprising:

2. The method for controlling a system power tube according to claim 1, wherein the determining the on-time of the system power tube in the current switching period according to the obtained first time period, the obtained second time period and the obtained delay time period includes:

3. The BOOST system is characterized by comprising a control circuit and a system power tube;

the control circuit is connected with the control end of the system power tube;

the control circuit is used for realizing the control method of the system power tube according to claim 1 or 2.

4. The BOOST system of claim 3, wherein the control circuit comprises: a conduction time length determining circuit; the on-time determining circuit is used for determining the on-time of the system power tube in the current switching period according to the acquired first time, second time and delay time;

the on-time determining circuit includes: a first voltage determination circuit, a second voltage determination circuit, a charging current determination circuit, and a conduction period output circuit;

5. The BOOST system of claim 4, wherein the first voltage determination circuit comprises: a first capacitor, a first switch;

a first end of the first switch is connected with a preset charging current;

6. The BOOST system of claim 5, wherein the second voltage determination circuit comprises: a second capacitor, a second switch;

a first end of the second switch is connected with a preset charging current;

7. The BOOST system of claim 6, wherein the charge current determination circuit comprises: the circuit comprises an operational amplifier, a first MOS tube, a current mirror and a resistor;

8. The BOOST system of claim 7, wherein the number of charge current determining circuits is one; the first voltage and the second voltage are connected to the same non-inverting input end of the operational amplifier, and only one voltage is connected at the same time;

9. The BOOST system of claim 7, wherein the number of charge current determining circuits is two corresponding to the first voltage and the second voltage, respectively; the first voltage and the second voltage are respectively connected to the non-inverting input ends of the operational amplifiers corresponding to the first voltage and the second voltage;

10. The BOOST system of claim 8 or 9, wherein the on-time output circuit includes: a third switch, a fourth switch, a third capacitor, a fourth capacitor, and a comparator;