CN117579173B

CN117579173B - Signal loss detection circuit and chip

Info

Publication number: CN117579173B
Application number: CN202410068519.7A
Authority: CN
Inventors: 魏建宁; 李蓝; 姚评; 黄明朋; 彭云武
Original assignee: Chengdu Cetc Xingtuo Technology Co ltd
Current assignee: Chengdu Cetc Xingtuo Technology Co ltd
Priority date: 2024-01-17
Filing date: 2024-01-17
Publication date: 2024-03-26
Anticipated expiration: 2044-01-17
Also published as: CN117579173A

Abstract

The invention discloses a signal loss detection circuit and a chip. In order to solve the problem of false overturn when the signal is free from losing and alarming, the invention delays the LOS signal output by the comparator for a period of time, and in the period of time, the establishment of the reference level and the peak detection level is ensured to be completed, so that the LOS signal for feedback cannot influence the establishment of the reference level and the peak detection level, thereby solving the problem of false overturn of the LOS signal. The invention adopts the delay unit as the technical means, solves the technical problem of false overturn of LOS signals, and obtains the technical effects of low chip area and compatibility with PVT variation. The invention is suitable for the field of optical communication chips.

Description

Signal loss detection circuit and chip

Technical Field

The invention relates to a signal loss detection circuit and a chip, in particular to a signal loss detection circuit and a chip for avoiding false overturn during signal loss alarming.

Background

The optical communication chip is widely applied to the fields of internet, data center and the like, the optical receiver is an important component in the optical communication system, the optical receiver is used for converting optical signals into electric signals, the amplitude of the electric signals generally passing through a transimpedance amplifier (Transimpedance Amplifier, TIA) is tens of millivolts, and a clock data recovery (Clock Data Recovery, CDR) circuit in the optical receiver generally requires that the input amplitude is hundreds of millivolts, so that a limiting amplifier (Limiting Amplifier, LA) is added between the TIA and the CDR to shape and limit the signals with small amplitude, and meanwhile, the limited signals can avoid the influence of insufficient circuit bandwidth of subsequent cascading.

In a high-speed optical communication system, a Loss Of Signal (LOS) detection circuit is used by a receiving end to detect the amplitude Of an input Signal, when the amplitude Of the input Signal is lower than a detection threshold, the receiving end feeds back a LOS alarm Signal (also called LOS Signal) Of Loss Of Signal to the system, and the system can control a subsequent circuit to stop working so as to save power consumption and reduce the error rate Of the system. In addition, in order to reduce false alarms of the detection circuit caused by input noise, hysteresis is generally set to the threshold of the LOSs of signal detection circuit, and a common LOSs of signal (LOS) detection circuit is shown in fig. 1.

The hysteresis of the threshold in the LOS detection circuit is achieved by feeding back the LOS signal output by the comparator to the peak detection circuit. When the LOS signal is lost, the LOS signal is fed back to the peak detection circuit, and the time for establishing the peak detection level of the signal is different from the reference level, which may cause the comparator to flip erroneously, resulting in the reporting of an erroneous LOS signal, as shown in fig. 2, where when the LOS signal is high, it indicates that the peak detection level is less than the reference level, which indicates that the amplitude of the input signal is lower than the set detection threshold.

In order to solve the problem of false overturn of the comparator, in the prior art, one solution is to increase a larger capacitor in a reference level generating circuit, so that the setup time of a signal peak detection level is smaller than the setup time of the reference level, and the possibility of false overturn of the comparator is reduced, and the effect of the solution is shown in fig. 3. The disadvantage of this type of solution is that it consumes too much chip area due to the large capacitance: the peak detection circuit is a high frequency part of the detection signal, and needs a large capacitance to reduce noise, meaning that the capacitance in the reference level generation circuit is larger than the capacitance of the peak detection level.

Another solution is to form two feedback loops, different from the LOS signal in fig. 1, which is fed back to the reference level generating circuit and the peak detecting circuit at the same time, and to form only one of the feedback loops: either to the peak detection circuit or to the reference level generation circuit. This means that the peak detection level and the reference level no longer have problems with setup time conflicts, i.e. no false inversion of the LOS signal.

But using this approach presents additional problems: in general, in order to ensure that the threshold and hysteresis of the LOS detection circuit are less affected by process corner, voltage, and temperature (PVT), the peak detection circuit and the reference level generation circuit are usually completely symmetrical, so as to ensure that the relative values of the two levels are not substantially affected by PVT. Because the LOS signal of the scheme feeds back only one loop, the peak value detection circuit and the reference level generation circuit are not completely symmetrical, so that the threshold value and hysteresis of the LOS detection circuit introduce some components which are obviously affected by PVT, and the robustness of the threshold value and hysteresis of the LOS detection circuit is poor.

Disclosure of Invention

In order to alleviate or partially alleviate the above technical problem, the solution of the present invention is as follows:

a loss of signal detection circuit, the loss of signal detection circuit comprising: a peak detection circuit for detecting a level amplitude level of an input detection signal to generate a peak detection level; a reference level generating circuit for generating a reference level; a comparator for receiving the peak detection level and the reference level; and the delay unit is used for receiving the output signal of the comparator and outputting an LOS signal which indicates whether the signal is lost.

In an embodiment, the LOS signal is used as a feedback input signal for both the peak detection circuit and the reference level generation circuit.

In an embodiment, the peak detection circuit and the reference level generation circuit are fully symmetrical circuits.

In an embodiment, the delay unit is a digital delay unit.

In an embodiment, the delay unit is an analog delay unit.

In one embodiment, the non-inverting input of the comparator receives the reference level; an inverting input of the comparator receives the peak detection level.

In one embodiment, the input detection signal is sent to the amplifier, and then is sent to the peak detection circuit after being processed by the ac coupling module.

In an embodiment, the LOS signal is a high signal when the detection signal is below the detection threshold; when the detection signal is higher than the detection threshold, the LOS signal is a low level signal.

A chip comprising a loss of signal detection circuit as claimed in any preceding claim.

In an embodiment, the chip is a receiving chip for optical communications.

The technical scheme of the invention has one or more of the following beneficial technical effects:

1) The problem of false overturn of LOS signals is solved;

2) The chip area is saved;

3) For PVT variation, the generated LOS detection threshold and hysteresis have higher robustness, so that the application scene is wider.

Furthermore, other advantageous effects that the present invention has will be mentioned in the specific embodiments.

Drawings

FIG. 1 is a block diagram of a prior art signal loss detection circuit;

FIG. 2 is a schematic diagram of a prior art LOS signal false-flip timing;

FIG. 3 is a timing diagram of the prior art after false inversion of LOS signals is overcome;

FIG. 4 is a schematic block diagram of a signal loss detection circuit of the present invention;

FIG. 5 is a schematic diagram of the circuit operation sequence of the LOS detection circuit of the present invention.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is apparent that the described embodiments are some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

Wherein, in the description of the present invention, "/" means that the related objects are in a "or" relationship, unless otherwise specified, for example, a/B may mean a or B; the "and/or" in the present invention is merely an association relationship describing the association object, and indicates that three relationships may exist, for example, a and/or B may indicate: there are three cases, a alone, a and B together, and B alone, wherein a, B may be singular or plural.

In the description of the present invention, unless otherwise indicated, "a plurality" means two or more than two. "at least one of" or the like means any combination of these items, including any combination of single item(s) or plural items(s). For example, at least one (one) of a, b, or c may represent: a, b, c, a-b, a-c, b-c, or a-b-c, wherein a, b, c may be single or plural.

In addition, in order to facilitate the clear description of the technical solution of the embodiments of the present invention, in the embodiments of the present invention, the words "first", "second", etc. are used to distinguish the same item or similar items having substantially the same function and effect. It will be appreciated by those of skill in the art that the words "first," "second," and the like do not limit the amount and order of execution, and that the words "first," "second," and the like do not necessarily differ.

In embodiments of the invention, words such as "exemplary," "such as" and the like are used to mean serving as an example, instance, or illustration. Any embodiment or design described herein as "exemplary," "for example," or "example" is not necessarily to be construed as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary," "for example," and the like is intended to present related concepts in a concrete fashion that may be readily understood.

Numerous specific details are set forth in the following description in order to provide a better understanding of the invention. It will be understood by those skilled in the art that the present invention may be practiced without some of these specific details. In some instances, well known methods, procedures, components, and circuits have not been described in detail so as not to obscure the present invention.

Referring to fig. 4, a schematic block diagram of a signal loss detection circuit in accordance with the present disclosure is shown. The detection signal is sent to the amplifier, processed by the AC coupling module and then sent to the peak detection circuit. The output signal of the peak detection circuit, i.e. the peak detection level, is taken as an input of a comparator, such as the input of the inverting input.

Furthermore, the reference level output by the reference level generating circuit is taken as another input of the comparator, such as the input of the non-inverting input terminal.

The LOS detection circuit comprising an amplifier, an ac coupling module, a reference level generation circuit, a peak detection circuit, a comparator, etc. is well known to those skilled in the art, and specific circuit implementation details are not described in detail herein.

The output signal of the comparator is passed through a delay unit, preferably a digital delay unit, which ultimately outputs the LOS signal, i.e. the LOS alert signal.

Further, like the existing LOS detection circuit, the LOS signal serves as a feedback signal for both the peak detection circuit and the reference level generation circuit. Thus, the peak detection circuit and the reference level generation circuit are completely symmetrical circuits, and thus can resist PVT variations and adversely affect the circuits.

Alternatively, the delay unit may be an analog delay unit. Digital delay cells are preferred because digital delay cells generally have more chip area advantages.

According to the invention, the LOS signal output by the comparator is delayed for a period of time, and the establishment of the reference level and the peak detection level is ensured to be completed in the period of time, so that the LOS signal for feedback cannot influence the establishment of the reference level and the peak detection level, and the problem of false overturn of the LOS signal is solved.

Referring to fig. 5, which shows the circuit operation timing of the LOS detection circuit to which the technical scheme of the present invention is applied, when the detection signal is lower than the detection threshold, the LOS signal is a high level signal; when the detection signal is higher than the detection threshold, the LOS signal is a low level signal.

The invention avoids the problem of false overturn of the traditional LOS detection circuit, maintains the influence of compatible PVT environment change, and has higher robustness of the generated LOS detection threshold and hysteresis, so that the application scene is wider, and the chip area is not obviously improved. Therefore, compared with the existing solution, the LOS detection circuit has more comprehensive advantages.

In addition, the invention also discloses a chip, wherein the LOS detection circuit is configured on the chip, and the chip is a receiving chip for optical communication.

The foregoing is merely illustrative of the present invention, and the present invention is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims

1. A loss of signal detection circuit, the loss of signal detection circuit comprising:

a peak detection circuit for detecting a level amplitude level of an input detection signal to generate a peak detection level;

a reference level generating circuit for generating a reference level;

a comparator for receiving the peak detection level and the reference level;

a delay unit for receiving the output signal of the comparator and outputting an LOS signal indicating whether the signal is lost;

the LOS signal is used as a feedback input signal of the peak detection circuit and the reference level generation circuit at the same time;

the peak detection circuit and the reference level generation circuit are completely symmetrical circuits.

2. The loss of signal detection circuit of claim 1, wherein:

the delay unit is a digital delay unit.

3. The loss of signal detection circuit of claim 1, wherein:

the delay unit is an analog delay unit.

4. The loss of signal detection circuit of claim 1, wherein:

the non-inverting input end of the comparator receives the reference level;

an inverting input of the comparator receives the peak detection level.

5. The loss of signal detection circuit of claim 1, wherein:

the input detection signal is sent to the amplifier, and then is sent to the peak value detection circuit after being processed by the alternating current coupling module.

6. The loss of signal detection circuit of claim 1, wherein:

when the detection signal is lower than the detection threshold value, the LOS signal is a high level signal;

when the detection signal is higher than the detection threshold, the LOS signal is a low level signal.

7. A chip, characterized in that:

the chip comprising the signal loss detection circuit of any of the preceding claims 1-6.

8. The chip of claim 7, wherein:

the chip is a receiving chip for optical communication.