JPS61148939A - Frame synchronization system - Google Patents

Frame synchronization system

Info

Publication number
JPS61148939A
JPS61148939A JP27095784A JP27095784A JPS61148939A JP S61148939 A JPS61148939 A JP S61148939A JP 27095784 A JP27095784 A JP 27095784A JP 27095784 A JP27095784 A JP 27095784A JP S61148939 A JPS61148939 A JP S61148939A
Authority
JP
Grant status
Application
Patent type
Prior art keywords
frame
synchronizing
bit
btck
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP27095784A
Other versions
JPH0431211B2 (en )
Inventor
Hirokazu Kobayashi
Original Assignee
Trio Kenwood Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0602Systems characterised by the synchronising information used
    • H04J3/0605Special codes used as synchronising signal

Abstract

PURPOSE:To attain high stable frame synchronization by transmitting alternately two kinds of frame synchronizing data with different bit patterns at each frame and taking it as the frame synchronization state when one received frame is synchronized. CONSTITUTION:Reception data fed to an input terminal IN is inputted to a bit synchronizing circuit 1, where a bit clock pulse BTCK is recovered. Two kinks of frame synchronizing data AS, BS having different patterns are arranged alternately at each frame in the reception data, and the synchronizing data AS, BS are detected in synchronization with the BTCK by frame synchronizing pattern detection circuits 2, 3 for words A, B. The pulse BTCK is counted by a bit counter 4, from which frame pulses AFSYNC and BFSYNC whose phases are shifted by 180 deg. at two frame interval are generated and the phase is discriminated with the output of the circuits 2, 3 by phase coincidence discrimination circuits 5, 6 respectively, and when any frame is synchronized, the counter 4 is not initialized and a frame synchronizing signal is outputted from a gate 10.
JP27095784A 1984-12-24 1984-12-24 Expired - Lifetime JPH0431211B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27095784A JPH0431211B2 (en) 1984-12-24 1984-12-24

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27095784A JPH0431211B2 (en) 1984-12-24 1984-12-24

Publications (2)

Publication Number Publication Date
JPS61148939A true true JPS61148939A (en) 1986-07-07
JPH0431211B2 JPH0431211B2 (en) 1992-05-25

Family

ID=17493373

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27095784A Expired - Lifetime JPH0431211B2 (en) 1984-12-24 1984-12-24

Country Status (1)

Country Link
JP (1) JPH0431211B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6411435A (en) * 1987-07-03 1989-01-17 Fujitsu Ltd Frame synchronization system
EP0479607A2 (en) * 1990-10-04 1992-04-08 Nec Corporation Method and arrangement for detecting framing bit sequence in digital data communications system
US5533039A (en) * 1993-09-22 1996-07-02 Storage Technology Corporation Fault tolerant fiber optic protocol for determining beginning of data
JPH08186554A (en) * 1994-12-27 1996-07-16 Nec Corp Time division multiplex transmitter and decoding circuit
JP2012156926A (en) * 2011-01-28 2012-08-16 Fujitsu Semiconductor Ltd Transmitting device, transmitting method, receiving device and receiving method

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6411435A (en) * 1987-07-03 1989-01-17 Fujitsu Ltd Frame synchronization system
EP0479607A2 (en) * 1990-10-04 1992-04-08 Nec Corporation Method and arrangement for detecting framing bit sequence in digital data communications system
US5533039A (en) * 1993-09-22 1996-07-02 Storage Technology Corporation Fault tolerant fiber optic protocol for determining beginning of data
JPH08186554A (en) * 1994-12-27 1996-07-16 Nec Corp Time division multiplex transmitter and decoding circuit
JP2012156926A (en) * 2011-01-28 2012-08-16 Fujitsu Semiconductor Ltd Transmitting device, transmitting method, receiving device and receiving method

Also Published As

Publication number Publication date Type
JPH0431211B2 (en) 1992-05-25 grant

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