CN117542886A - Strong polarization heterojunction Fin-HEMT device and preparation method thereof - Google Patents

Strong polarization heterojunction Fin-HEMT device and preparation method thereof Download PDF

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Publication number
CN117542886A
CN117542886A CN202311613939.0A CN202311613939A CN117542886A CN 117542886 A CN117542886 A CN 117542886A CN 202311613939 A CN202311613939 A CN 202311613939A CN 117542886 A CN117542886 A CN 117542886A
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layer
fin
channel
source
heterojunction
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吴畅
王凯
邢绍琨
刘捷龙
郭涛
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Hubei Jiufengshan Laboratory
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Hubei Jiufengshan Laboratory
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/26—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys
    • H01L29/267—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys in different semiconductor regions, e.g. heterojunctions

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Abstract

The invention relates to a strong polarization heterojunction Fin-HEMT device. The strong polarization heterojunction Fin-HEMT device comprises a channel layer which is unintentionally doped epsilon-Ga 2 O 3 The upper surface of the channel layer is etched with a groove along the width direction of the gate to form a Fin structure, wherein the etching depth is h; an insertion layer: the forbidden band width of the material of the insertion layer is smaller than epsilon-Ga 2 O 3 The insertion layer is deposited on the channel layer and has a thickness d1 in the trench; a barrier layer deposited on the insertion layer and having a thickness d2 in the trench, the barrier layer being ε - (Al) x Ga 1‑x ) 2 O 3 A layer, d1+d2 < h; the gate electrode is manufactured on the barrier layer and has a fin structure; also comprises a source electrode and a drain electrode arranged at two sides of the gate electrode, wherein the source electrode and the drain electrodeThe drain electrode is in contact with the channel layer, the insertion layer and the barrier layer. The device has good multi-threshold coupling effect and can improve the linearity of the device on the premise of not losing the channel width and the two-dimensional electron gas concentration between Fins.

Description

Strong polarization heterojunction Fin-HEMT device and preparation method thereof
Technical Field
The invention relates to the technical field of semiconductors, in particular to a strong polarization heterojunction Fin-HEMT device and a preparation method thereof.
Background
Epsilon-phase Ga 2 O 3 Is a hexagonal polar phase, and has strong spontaneous polarization (spontaneous polarization charge up to 2e 14 cm -2 One order of magnitude higher than GaN) and therefore forms (Al x Ga 1-x ) 2 O 3 /Ga 2 O 3 When in heterojunction, 2DEG with high concentration can be generated only by spontaneous polarization and piezoelectric polarization without delta modulation doping, the concentration can be adjusted by changing Al composition, and the limiting field property and mobility of a polarized channel have obvious advantages compared with a delta modulation doped channel.
In a working environment with high withstand voltage and strong irradiation, gaAs limits the withstand voltage and irradiation resistance of the device due to narrow forbidden bandwidth and low critical breakdown field strength; gaN has large epitaxial defect density of heterogeneous substrates, and more defect energy levels in band gaps, so that current collapse can be caused, and the withstand voltage characteristic and the irradiation resistance characteristic of the device can be influenced. epsilon-Ga 2 O 3 The polarization heterojunction has great application potential in the high-frequency field of high withstand voltage and radiation resistance by combining the ultra-wide forbidden band width and high critical breakdown field intensity. The above characteristics enable epsilon- (Al) x Ga 1-x ) 2 O 3 /Ga 2 O 3 The strong polarization heterojunction has great application potential in the high-voltage and high-frequency field, and epsilon- (Al) can be developed based on the strong polarization heterojunction x Ga 1-x ) 2 O 3 /Ga 2 O 3 A strong polarization barrier heterojunction HEME structure.
Disclosure of Invention
Based on the expression, the invention provides a strong polarization heterojunction Fin-HEMT device which has a good multi-threshold coupling effect and can improve the linearity of the device on the premise of not losing the channel width and the two-dimensional electron gas concentration between Fins.
The technical scheme for solving the technical problems is as follows: the invention provides a strong polarization heterojunction Fin-HEMT device, which at least comprises
A channel layer of unintentionally doped epsilon-Ga 2 O 3 The upper surface of the channel layer is etched with a groove along the width direction of the gate to form a Fin structure, wherein the etching depth is h;
an insertion layer: the forbidden bandwidth of the intercalation material is smaller than epsilon-Ga 2 O 3 The insertion layer is deposited on the channel layer and has a thickness d1 in the trench;
a barrier layer deposited on the insertion layer and having a thickness d2 in the trench, the barrier layer being ε - (Al) x Ga 1-x ) 2 O 3 A layer, d1+d2 < h;
the gate electrode is manufactured on the barrier layer and has a fin structure;
the semiconductor device further comprises a source electrode and a drain electrode which are arranged on two sides of the gate electrode, wherein the source electrode and the drain electrode are in contact with the channel layer, the insertion layer and the barrier layer.
As a preferred embodiment, the device further comprises
A substrate having opposed first and second surfaces;
and a buffer layer deposited on the first surface of the substrate, the channel layer being fabricated on the buffer layer.
In particular, the substrate includes, but is not limited to SiC, gaN, ga 2 O 3 A substrate; the buffer layer includes, but is not limited to, fe-doped gallium oxide structures; materials of the insertion layer include, but are not limited to, gaN, inGaN; the barrier layer is N-doped epsilon- (Al) x Ga 1-x ) 2 O 3 A layer.
As a preferred embodiment, the source-drain electrode is in contact with the channel layer, the insertion layer, and the barrier layer through a contact layer.
The invention also provides a preparation method of the strong polarization heterojunction Fin-HEMT device, which comprises the following steps:
epitaxial growth of unintentionally doped epsilon-Ga on a substrate 2 O 3 The layer is used as a channel layer, a mask is manufactured on the channel layer, and then an array groove is etched in the active region along the width direction of the gate;
removing the mask, sequentially extending the insertion layer and the barrier layer, and ensuring that the sum of the thicknesses of the insertion layer and the barrier layer in the groove is smaller than the depth of the etched groove;
and manufacturing a mask on the barrier layer, etching the source-drain region, manufacturing a source-drain electrode, removing the mask, and performing gate electrode photoetching by adopting an electron beam photoetching machine to manufacture a gate electrode.
In a preferred embodiment, the method further comprises the step of growing a contact layer in the source-drain region before the source-drain electrode is manufactured, and the source-drain electrode is manufactured on the contact layer after the contact layer is manufactured.
Further, the contact layer is manufactured by adopting a hard mask selective etching and regrowth mode, and specifically comprises the following steps: and (3) adopting a hard mask, etching and stopping in the channel layer structure by dry etching, then growing a heavily doped N-type gallium oxide contact layer, and depositing metal on the contact layer.
Further, the contact layer is obtained by etching in a soft mask mode, and specifically comprises the following steps: and (3) adopting a soft mask, washing glue after etching, then carrying out full-wafer regrowth of a heavily doped N-type gallium oxide layer, removing gallium oxide between a source and a drain in an etching mode, and depositing metal on the rest gallium oxide.
As a preferred embodiment, the channel layer is epitaxially grown on the substrate with a buffer layer.
According to the invention, the groove is etched on the channel layer, the insertion layer and the barrier layer are deposited, the total thickness of the insertion layer and the barrier layer in the groove is ensured to be smaller than the height of the etched groove, then the gate electrode is manufactured, the 2DEG in the Fin structure and between Fin and Fin is all present through the epitaxy of the barrier layer, and the coupling of the side gate and the top gate is realized without losing the width of the channel; at the same time, a specific channel insertion layer is introduced to form (Al x Ga 1-x ) 2 O 3 /insert channel layer/Ga 2 O 3 The heterojunction is formed, the quantum well is formed, the carrier concentration and the limiting field of the 2DEG channel are improved, and the channel mobility of the device is further improved.
Drawings
Fig. 1 is a schematic diagram of a three-dimensional structure of a Fin-HEMT device with a strong polarization heterojunction according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a gate position of the strong polarization heterojunction Fin-HEMT device shown in fig. 1;
fig. 3 is a process flow diagram of the fabrication of the strongly polarized heterojunction Fin-HEMT device shown in fig. 1.
In the drawings, the list of components represented by the various numbers is as follows:
1 substrate, 2 buffer layer, 3 channel layer, 4 insertion layer, 5 barrier layer, 6 source electrode, 7 drain electrode, 8 gate electrode.
Detailed Description
In order to facilitate an understanding of the present application, a more complete description of the present application will now be provided with reference to the relevant figures. Examples of the present application are given in the accompanying drawings. This application may, however, be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
It should be noted that in the description of the present application, the drawings and descriptions of the embodiments are illustrative and not restrictive, and that like reference numerals designate like structures throughout the embodiments of the specification. In addition, the drawings may exaggerate thicknesses of some layers, films, panels, regions, etc. for understanding and ease of description. In addition, "on …" refers to positioning an element on or under another element, but not essentially on the upper side of the other element according to the direction of gravity.
As shown in fig. 1 and 2, a strong polarization heterojunction Fin-HEMT device at least comprises
Channel layer 3. Channel layer 3 is unintentionally doped ε -Ga 2 O 3 The upper surface of the channel layer 3 is etched with a groove along the width direction of the gate to form a Fin structure, wherein the etching depth is defined as h;
an insertion layer 4, the material of the insertion layer 4 having a forbidden bandwidth smaller than epsilon-Ga 2 O 3 An insertion layer 4 is deposited on the channel layer 3 and has a thickness d1 in the trench;
a barrier layer 5, the barrier layer 5 being deposited on the insertion layer 4 and having a thickness d2 in the trench, the barrier layer being ε - (Al) x Ga 1-x ) 2 O 3 A layer satisfying d1+d2 < h;
the gate electrode 8 is manufactured on the barrier layer and has a fin structure;
the device further comprises a drain electrode 6 and a source electrode 7 arranged on both sides of the gate electrode, both the source electrode 7 and the drain electrode 6 being in contact with the channel layer 3, the insertion layer 4 and the barrier layer 5.
In the prior art, etching is usually carried out after the channel layer and the barrier layer are deposited to form a Fin structure, then a gate electrode is manufactured, after the channel layer 3 is etched, the insertion layer 4 and the barrier layer 5 are sequentially deposited, the thicknesses of the insertion layer and the barrier layer in the groove are ensured to be smaller than the etching depth of the groove, so that 2DEG can be generated on one side of the channel layer of a horizontal heterojunction and a side wall heterojunction in the Fin structure and a horizontal heterojunction interface between Fin and Fin, the channel width and the two-dimensional electron gas concentration between Fin are not lost, the barrier layer of the side wall is relatively thinner than a plane, the common control of a top gate and a side gate is realized for a horizontal channel in the Fin structure, the side wall channel in the Fin structure is mainly controlled by the side gate, the channel between Fin and the side gate is mainly controlled by the bottom gate, the multi-threshold coupling effect is further enhanced, and the linearity of the device is improved.
In the present invention, the barrier layer is formed by sequentially depositing a channel layer, an insertion layer and a barrier layer (Al x Ga 1-x ) 2 O 3 /insert channel layer/Ga 2 O 3 The presence of a heterojunction,for a heterojunction channel, 2DEG is generated on one side of an insertion channel layer at a heterojunction interface through polarization, so that channel mobility is improved, on-resistance is reduced, connection of each channel 2DEG and a source-drain regrowth region is guaranteed, good ohmic contact is facilitated, and an annealing process is simplified.
On the basis of the above, the strong polarization heterojunction Fin-HEMT device provided by the invention further comprises a substrate 1, wherein the substrate 1 is provided with a first surface and a second surface which are opposite;
buffer layer 2, buffer layer 2 is deposited on the first surface of substrate 1, and channel layer 3 is fabricated on buffer layer 2.
It will be appreciated that the substrate 1 includes, but is not limited to SiC, gaN, ga 2 O 3 The substrate, buffer layer 2 includes but is not limited to a Fe doped GaN structure, and the material of the insertion layer includes but is not limited to GaN, inGaN.
Further, the barrier layer 5 is N-doped ε - (Al) x Ga 1-x ) 2 O 3 The layer may further increase the concentration of 2DEG inserted into the channel layer by appropriate N-type doping of the barrier layer.
The invention also provides a preparation method of the strong polarization heterojunction Fin-HEMT device, which comprises the following steps:
epitaxial growth of unintentionally doped epsilon-Ga on a substrate 1 2 O 3 The layer is used as a channel layer 3, a mask is manufactured on the channel layer 3, and then an array groove is etched in the active area along the width direction of the gate;
removing the mask, sequentially extending the insertion layer 4 and the barrier layer 5, and ensuring that the sum of the thicknesses of the insertion layer 4 and the barrier layer 5 in the groove is smaller than the depth of the etched groove;
and manufacturing a mask on the barrier layer 5, etching the source and drain regions, manufacturing a source and drain electrode, removing the mask, and performing gate electrode photoetching by adopting an electron beam photoetching machine to manufacture a gate electrode.
It will be appreciated that the buffer layer 2 may be epitaxially grown on the substrate 1 prior to the epitaxy of the channel layer 3.
In the invention, the source electrode and the drain electrode are contacted with the groove layer, the insertion layer and the barrier layer through the gallium oxide contact layer, and the mode can simplify the annealing process and effectively reduce the ohmic contact resistance, thereby being more beneficial to improving the frequency characteristic and the power characteristic of the device.
Further, the contact layer can be manufactured by adopting a hard mask selective etching and regrowth mode or can be manufactured by adopting a soft mask etching mode.
The method for etching and regrowing by adopting the hard mask selective area comprises the following steps: and (3) adopting a hard mask, etching and stopping in the channel layer structure by dry etching, then growing a heavily doped N-type gallium oxide contact layer, and then depositing metal on the contact layer to manufacture a source electrode and a drain electrode.
The mode of adopting the soft mask is as follows: and (3) adopting a soft mask, washing glue after etching, then carrying out full-wafer regrowth of a heavily doped N-type gallium oxide layer, removing gallium oxide between a source electrode and a drain electrode in an etching mode, and then depositing metal on the rest gallium oxide to manufacture the source electrode and the drain electrode.
In addition, the source-drain electrode can omit secondary epitaxy after the regrowth etching is finished, ohmic metal is directly deposited, the 2DEG is directly contacted with the side wall metal, and the groove metal ohmic electrode is formed through annealing.
The following is a detailed description of a specific case, with particular reference to fig. 3. A preparation method of a strong polarization heterojunction Fin-HEMT device comprises the following steps:
step 1: preparing an epitaxial substrate: the substrate is selected from the group consisting of, but not limited to SiC, gaN, ga 2 O 3 And various high-resistance substrates are adopted, and the SiC substrate is taken as an example in the scheme. Then the buffer layer and the channel layer are grown by MOCVD (metal organic chemical vapor deposition) or MBE (molecular beam epitaxy), the buffer layer can adopt a Fe doped gallium oxide structure with the thickness of T1, and the channel layer adopts an unintentional doped epsilon-Ga with the thickness of T2 2 O 3 Structure is as follows.
Step 2: and (3) depositing and etching an active area barrier regrowth mask: in order to prepare the Fin structure with the coupling control of the side gate and the top gate, a certain duty ratio is adopted to carry out selective etching on an active region along the gate width direction, and the etching depth T3 (preferably 20-200 nm) is larger than the thicknesses of a subsequent epitaxial insertion layer and a barrier layer so as to ensure that the Fin structure has the following characteristicsAnd (5) side gate control. The mask can be selected from photoresist as soft mask to simplify process steps, or hard mask (including but not limited to various dielectric layers and metal mask: siO) 2 SiN, ni, etc.), improving etch profile reduces process risk where to deposit SiO with thickness T4 2 The mask layer is, for example, stripped by photolithography, the soft mask pattern is transferred to the hard mask, and then dry etching is performed using Cl-based plasma, the etching terminating in the channel layer structure, to ensure that the deposited barrier layer is still epitaxial on the basis of the channel layer.
Step 3: mask removal and regrowth of the active region insertion layer and barrier layer: the mask layer involved is removed after etching, followed by deposition of an insertion layer and an unintentionally doped epsilon- (Al) layer of thickness T5 in the active region by MBE x Ga 1-x ) 2 O 3 The layer is used as a barrier layer to form Al x Ga 1-x ) 2 O 3 /insert channel layer/Ga 2 O 3 Heterojunction structure due to epsilon- (Al) x Ga 1-x ) 2 O 3 Polarity of the material itself, epsilon-Ga in and between Fin structures 2 O 3 A 2DEG is generated on one side of the channel layer.
Step 4: and (3) depositing and etching a source-drain region regrowing mask: in order to ensure good contact between the channel and the source drain electrode, the source drain electrode is manufactured by adopting a selective etching and regrowth mode, and the epsilon- (Al) of the secondary epitaxy x Ga 1-x ) 2 O 3 The etching selectivity of the mask and the photoresist in Cl-based ICP etching is relatively large, if the mask is etched for a long time with high power, the risk of burned photoresist exists, and the soft mask is difficult to meet the etching requirement, so that a hard mask (including but not limited to various dielectric layers and metal masks: siO 2 SiN, ni, etc.), here to deposit SiO with a thickness T6 by sputtering 2 The mask layer is an example. And transferring the soft mask pattern onto the hard mask through photoetching stripping, and then carrying out dry etching by utilizing plasma containing Cl groups, wherein the etching is stopped in the channel layer structure and is lower than two-dimensional electron gas so as to ensure that the high-doped regrowth can be contacted with the 2DEG of the heterojunction channel.
Step 5: regrowth of source-drain regionHard mask removal: then using MBE to regrow the source and drain etching area to grow a heavily doped N-type gallium oxide contact layer, and then using BOE solution to remove SiO 2 And (5) masking.
Step 6: source drain ohmic electrode fabrication (schematic vertical section of source drain electrode position): after the secondary extension is completed, the source and drain metal electrodes are deposited by utilizing electron beam evaporation or magnetron sputtering, and a metal system is exemplified by common Ti/Al/Ni/Au. If the regrowth doping concentration is not high enough, good ohmic contact cannot be directly formed, and the method can be improved by annealing, wherein the annealing temperature can be 400-600 ℃, the annealing atmosphere is nitrogen, and the annealing time is 30 s-1 min. Isolation between the active regions is then performed, and implantation or MESA etching may be used.
Step 7: manufacturing a Fin structure gate electrode: and (3) carrying out gate electrode photoetching by adopting an electron beam photoetching machine, selecting PMMA series electron photoresist, carrying out three times of photoresist homogenizing, changing the sensitivity and resolution of the photoresist by changing the photoresist baking temperature, and matching with a proper exposure area and exposure dose, so that the composite layer photoresist forms a T-shaped gate electrode photoetching morphology (a schematic diagram is heavy and a T-shaped gate cap is not shown) after one exposure and one development. The deposition of the gate metal is then performed using electron beam evaporation or magnetron sputtering, the metal system being optionally but not limited to a Ni/Au combination. Because the barrier layers of the side walls are relatively thinner than the plane, the horizontal channel in the Fin structure realizes common control of the top gate and the side gate, the side wall channel in the Fin structure is mainly controlled by the side gate, and the channel between Fin and Fin is mainly controlled by the top gate, thereby realizing the improvement of linearity through multi-threshold coupling and improving the conduction capability of the device through increasing the actual gate width. And stripping after the gate electrode deposition is finished, and finally finishing key process steps for manufacturing the device.
The device structure has at least the following beneficial technical effects:
(1) High turn-on capability: the channel width and the two-dimensional electron gas concentration between Fin are not lost;
(2) High linearity: the horizontal channel in the Fin structure realizes the common control of the top gate and the side gate, the side wall channel of Fin is mainly controlled by the side gate, and the horizontal channel between Fin and Fin is mainly controlled by the bottom gate, so that the multi-threshold coupling effect is further enhanced, and the linearity of the device is improved;
(3) Strong polarization: of epsilon phase (Al) x Ga 1-x ) 2 O 3 /GaN/Ga 2 O 3 The heterojunction has strong polarization, and can generate high-concentration 2DEG on one side of the channel layer at the heterojunction interface;
(4) High withstand voltage: epsilon-Ga 2 O 3 The dielectric breakdown field strength is 8MV/cm and the forbidden bandwidth of 5eV, so that the dielectric breakdown characteristic of the device is effectively improved;
(5) High mobility: al (Al) x Ga 1-x ) 2 O 3 /insert channel layer/Ga 2 O 3 The heterojunction channel can effectively improve the finite field property and mobility of channel carriers, and in addition, the channel mobility can be further improved through a Fin structure;
(6) High output power: the high on-current and the high critical breakdown field intensity of the material are combined, so that the device can be applied to a high-voltage high-current working scene to generate high output power;
(7) Low contact resistance: and by means of regrowing of the source-drain region, the connection between the channel 2DEG and the source-drain region is ensured, good ohmic contact is formed, and the annealing process is simplified.
(8) Low side gate leakage: compared with the conventional Fin HEMT, the side gate is not in direct contact with two-dimensional electron gas, but is similar to the top gate, and is in contact with the barrier layer, so that the electric leakage of the side gate can be effectively reduced.
The foregoing description of the preferred embodiments of the invention is not intended to limit the invention to the precise form disclosed, and any such modifications, equivalents, and alternatives falling within the spirit and scope of the invention are intended to be included within the scope of the invention.

Claims (10)

1. A strong polarization heterojunction Fin-HEMT device is characterized by at least comprising
A channel layer of unintentionally doped epsilon-Ga 2 O 3 The upper surface of the channel layer is etched with a groove along the width direction of the gate to form a Fin structure, wherein the etching depth is h;
an insertion layer: the forbidden bandwidth of the intercalation material is smaller than epsilon-Ga 2 O 3 The insertion layer is deposited on the channel layer and has a thickness d1 in the trench;
a barrier layer deposited on the insertion layer and having a thickness d2 in the trench, the barrier layer being ε - (Al) x Ga 1-x ) 2 O 3 A layer, d1+d2 < h;
the gate electrode is manufactured on the barrier layer and has a fin structure;
the semiconductor device further comprises a source electrode and a drain electrode which are arranged on two sides of the gate electrode, wherein the source electrode and the drain electrode are in contact with the channel layer, the insertion layer and the barrier layer.
2. The strongly polarized heterojunction Fin-HEMT device of claim 1, further comprising
A substrate having opposed first and second surfaces;
and a buffer layer deposited on the first surface of the substrate, the channel layer being fabricated on the buffer layer.
3. The strongly polarized heterojunction Fin-HEMT device of claim 2, wherein the substrate comprises, but is not limited to SiC, gaN, ga 2 O 3 A substrate; the buffer layer includes, but is not limited to, fe-doped epsilon-gallium oxide structures; materials for the insertion layer include, but are not limited to, gaN, inGaN.
4. The strongly polarized heterojunction Fin-HEMT device of claim 1, wherein the source-drain electrode is in contact with the channel layer, the insertion layer, and the barrier layer through a contact layer.
5. The Fin-HEMT device of any one of claims 1-4, wherein the barrier layer is N-doped epsilon- (Al) x Ga 1-x ) 2 O 3 A layer.
6. The method for manufacturing the strong polarization heterojunction Fin-HEMT device as claimed in any one of claims 1 to 5, comprising the following steps:
epitaxial growth of unintentionally doped epsilon-Ga on a substrate 2 O 3 The layer is used as a channel layer, a mask is manufactured on the channel layer, and then an array groove is etched in the active region along the width direction of the gate;
removing the mask, sequentially extending the insertion layer and the barrier layer, and ensuring that the sum of the thicknesses of the insertion layer and the barrier layer in the groove is smaller than the depth of the etched groove;
and manufacturing a mask on the barrier layer, etching the source-drain region, manufacturing a source-drain electrode, removing the mask, and performing gate electrode photoetching by adopting an electron beam photoetching machine to manufacture a gate electrode.
7. The method for fabricating a Fin-HEMT device of claim 6, further comprising the step of growing a contact layer on the source/drain regions before the source/drain electrodes are fabricated, wherein the source/drain electrodes are fabricated on the contact layer after the contact layer is fabricated.
8. The method for manufacturing the Fin-HEMT device with the strong polarization heterojunction according to claim 7, wherein the contact layer is manufactured by adopting a hard mask selective etching and regrowth mode, specifically comprising the following steps: and (3) adopting a hard mask, and etching to stop in the channel layer structure by dry etching, and then growing a heavily doped N-type gallium oxide contact layer.
9. The method for manufacturing a Fin-HEMT device with a strong polarization heterojunction according to claim 7, wherein the source-drain electrode is etched by a soft mask, specifically: and (3) adopting a soft mask, washing glue after etching, then carrying out full-wafer regrowth of a heavily doped N-type gallium oxide layer, and removing gallium oxide between a source and a drain in an etching mode.
10. The method of claim 6, wherein the step of epitaxially growing a buffer layer on the substrate is performed before the step of epitaxially growing the channel layer.
CN202311613939.0A 2023-11-28 2023-11-28 Strong polarization heterojunction Fin-HEMT device and preparation method thereof Pending CN117542886A (en)

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