CN117528966A - Manufacturing method of ultrathin high-density multilayer interconnection ceramic substrate - Google Patents
Manufacturing method of ultrathin high-density multilayer interconnection ceramic substrate Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 52
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- 229910052719 titanium Inorganic materials 0.000 claims abstract description 18
- 238000004544 sputter deposition Methods 0.000 claims abstract description 9
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- 238000005530 etching Methods 0.000 claims description 16
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- 230000008021 deposition Effects 0.000 claims description 7
- 238000003825 pressing Methods 0.000 claims description 7
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- 229910052581 Si3N4 Inorganic materials 0.000 claims description 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 6
- 229910000679 solder Inorganic materials 0.000 claims description 6
- 239000000126 substance Substances 0.000 claims description 6
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 5
- 238000007689 inspection Methods 0.000 claims description 5
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- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 4
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- PWHULOQIROXLJO-UHFFFAOYSA-N Manganese Chemical compound [Mn] PWHULOQIROXLJO-UHFFFAOYSA-N 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4697—Manufacturing multilayer circuits having cavities, e.g. for mounting components
Abstract
The invention discloses a manufacturing method of an ultrathin high-density multilayer interconnection ceramic substrate, which comprises the following steps: selecting a ceramic substrate, and performing laser drilling on the ceramic substrate to form a via hole; performing vacuum magnetron sputtering on the ceramic substrate, and sputtering on the surface of the ceramic substrate and the hole wall of the via hole to form a seed titanium layer and a copper layer; manufacturing a double-layer ceramic core plate; manufacturing a multilayer substrate; manufacturing an upper-lower interconnection multi-layer board; and manufacturing the multi-high-order HDI ceramic substrate. The invention realizes the production of a multi-layer circuit on the basis of the traditional two-layer DPC ceramic substrate, and the multi-layer ceramic plate produced by the process has the advantages of simpler processing, lower processing energy consumption, higher thermal conductivity of finished products, more precise circuit, low conductor resistivity and low signal transmission loss compared with LTCC and HTCC.
Description
Technical Field
The invention belongs to the technical field of printed circuit board manufacturing, and particularly relates to a manufacturing method of an ultrathin high-density multilayer interconnection ceramic substrate.
Background
With the vigorous development of the microelectronic packaging industry, the electronic packaging technology is moving toward miniaturization, high density, multiple power and high reliability. The substrate materials commonly used at present mainly comprise four major types of plastic substrates, metal substrates, ceramic substrates and composite substrates. Ceramic substrates have become the base material for high-power electronic circuit structure technology and interconnection technology by virtue of their good high temperature resistance, corrosion resistance, high thermal conductivity and thermal expansion coefficient properties.
The ceramic substrate is mainly divided into DPC, TFC, DBC, AMB, LTCC/HTCC and the like according to the process, and the DPC (Direct Plated Copper, direct copper-plated ceramic substrate) manufacturing process comprises the following steps: firstly, carrying out pretreatment cleaning on a ceramic substrate, and depositing a Ti/Cu layer serving as a seed layer on the surface of the substrate by utilizing a vacuum sputtering mode; then, completing circuit manufacture by photoetching, developing and etching processes; and finally, increasing the thickness of the circuit in an electroplating/chemical plating mode, and completing the manufacture of the substrate after the photoresist is removed. TFC (Thick Film Ceramic, thick film ceramic substrate) is prepared by coating metal paste on the surface of a ceramic substrate by adopting a screen printing technology, and drying and sintering at a high temperature (700-800 ℃). The metal paste is generally composed of metal powder (ag—pd or ag—pt), an organic resin, glass frit, and the like. After high temperature sintering, the resin binder is burned off, leaving almost all of the pure metal, as the vitreous binder acts on the ceramic substrate surface. The thickness of the sintered metal layer is 10-20 mu m, and the minimum line width is 0.3 mm. The DBC (Direct Bonded Copper, directly bonded copper ceramic substrate) is formed by eutectic sintering of a ceramic substrate (Al 2O3 or AlN) and copper foil at high temperature (1065 ℃), and finally, a circuit is formed in an etching mode according to wiring requirements. The AMB (Active Metal Brazing, copper-clad ceramic substrate) is prepared by adding an active element to a solder, forming a reaction layer on the ceramic surface by chemical reaction, and improving the wettability of the solder on the ceramic surface to thereby chemically bond the ceramic and the metal. HTCC (high temperature cofired multilayer ceramic substrate) is prepared by adding ceramic powder (Al 2O3 or AlN) into an organic binder, and uniformly mixing to obtain paste slurry; then scraping the slurry into a sheet shape by using a scraper, and forming a green body from the sheet-shaped slurry by a drying process; then, through holes are drilled according to the design of each layer, and wiring and hole filling are carried out by adopting screen printing metal slurry; and finally, superposing the green layers, and sintering in a high-temperature furnace (1600 ℃). The manufacturing process of LTCC (low temperature co-fired multilayer ceramic substrate) is similar to HTCC, except that low-melting glass frit with the mass fraction of 30% -50% is mixed into Al2O3 powder, so that the sintering temperature is reduced to 850-900 ℃.
In the manufacturing process, except that the LTCC and the HTCC can realize multi-layer wiring, other single-sided circuits or double-sided circuits are adopted. Although LTCC and HTCC ceramic circuit boards can realize multi-layer lines, LTCC is limited due to shrinkage and heat dissipation problems. The LTCC is formed by sintering slurry and green ceramic tape in 800-900 deg.C environment, the thermal conductivity of ceramic circuit board is only 2-6W/m.K, far lower than the original thermal conductivity of bare ceramic substrate (alumina: 15-25W/m.K, aluminum nitride > 170W/m.K, silicon nitride > 80W/m.K). The HTCC manufacturing process is cofired at a high temperature of 1600 ℃, the problem of shrinkage rate during processing affects the layer bias of a circuit, and because the processing temperature is high, high-melting-point metals such as tungsten, molybdenum, manganese and the like are needed to be used for the circuit, the resistivity of the wiring conductor is high, and the signal transmission loss is larger.
Disclosure of Invention
Therefore, the invention aims to provide a manufacturing method for realizing an ultrathin high-density multilayer interconnection ceramic substrate in a low-temperature process environment (< 350 ℃), so as to obtain a ceramic substrate with good heat dissipation and high integration density.
In order to solve the above problems, the present invention provides a method for manufacturing an ultrathin high-density multilayer interconnection ceramic substrate, comprising the steps of:
selecting a ceramic substrate, and performing laser drilling on the ceramic substrate to form a via hole;
performing vacuum magnetron sputtering on the ceramic substrate, and sputtering on the surface of the ceramic substrate and the hole wall of the via hole to form a seed titanium layer and a copper layer;
manufacturing a double-layer ceramic core plate;
and manufacturing the multi-layer substrate.
Further, the ceramic substrate is an alumina, aluminum nitride, silicon nitride or beryllium oxide ceramic substrate.
Further, a seed titanium layer and a copper layer are formed on the surface of the ceramic substrate and the hole wall of the through hole in a sputtering mode, wherein the thickness of the titanium layer is more than or equal to 0.25 mu m, and the thickness of the copper layer is more than or equal to 0.8 mu m.
Further, vacuum magnetron sputtering is carried out on the ceramic substrate, a seed titanium layer and a copper layer are formed on the surface of the ceramic substrate and the hole wall of the through hole by sputtering, and then the method further comprises the following steps:
electroplating and filling holes on the ceramic substrate so as to fill the through holes of the ceramic substrate; and meanwhile, thickening the surface copper of the ceramic substrate to enable the surface copper of the ceramic substrate to be thickened to be more than 45 mu m.
Further, the manufacturing of the double-layer ceramic core plate comprises the following steps:
grinding the ceramic substrate subjected to electroplating hole filling and surface copper thickening to enable a copper surface to be flat;
performing first pattern transfer, and correspondingly transferring a required circuit pattern to a copper surface;
etching a required circuit on the copper surface through an etching process;
and (3) carrying out titanium removal treatment on the ceramic substrate by using chemical liquid medicine, and removing the seed titanium layer to obtain the double-layer ceramic core plate.
Further, after the manufacturing of the double-layer ceramic core plate is completed, the manufacturing method comprises the following steps:
performing AOI (automated optical inspection) and electrical measurement full inspection on the ceramic core plate;
and forming a layer of brown film on the copper surface of the ceramic core plate through brown treatment.
Further, the manufacturing of the double-layer ceramic core plate comprises manufacturing a multi-layer substrate after the completion of manufacturing the double-layer ceramic core plate, comprising:
a combined lamination plate, wherein prepregs, copper foils or FPC (flexible printed circuits) are correspondingly laminated on the upper surface and the lower surface of the ceramic core plate after the browning treatment;
and pressing the prepreg, the copper foil or the FPC and the ceramic core plate together in a pressing mode to obtain the pressed multilayer substrate.
Further, the manufacturing of the multilayer substrate includes manufacturing an upper and lower interconnection multilayer board, including:
the Mark point is uncovered, and the laser is used for uncovering the outer copper layer and the PP medium layer to expose the inner Mark point;
laser blind holes pass through the inner mark points and laser channels of the inner blind holes and the outer blind holes;
deslagging, and cleaning slag in the blind hole through plasma microetching;
copper deposition, namely depositing seed metal copper on the wall of the blind hole through chemical copper deposition;
electroplating to thicken the electroless copper plating seed layer to 3-5 μm;
electroplating the blind holes, filling the blind holes in an electroplating mode, and electroplating and thickening the surface copper of the substrate to more than 40 mu m;
grinding, namely grinding the copper surface of the electroplated substrate;
transferring the pattern of the second time, and transferring the image to the copper surface through an image transfer process;
etching, namely etching the circuit pattern through an etching process to obtain the upper and lower interconnection multi-layer board.
Further, after the upper and lower interconnection multi-layer boards are manufactured, the manufacturing of the multi-high-order HDI ceramic substrate comprises the following steps:
deep-control slotting is carried out on the upper and lower interconnection multi-layer boards, picosecond laser is used for removing insulating medium, and bonding pads used for welding high-power chips on the ceramic core board are exposed;
performing solder mask/character manufacturing;
surface treatment;
and scribing and slicing by using picosecond laser to obtain a multi-high-order HDI ceramic substrate finished product.
The invention also provides an ultrathin high-density multilayer interconnection ceramic substrate prepared by the method.
Compared with the prior art, the invention adopts a thermoelectric separation design, the device with large heating value is reserved on the ceramic layer, and other conductors are integrated through vertical interconnection; the invention realizes the production of a multi-layer circuit on the basis of the traditional two-layer DPC ceramic substrate, and the multi-layer ceramic plate produced by the process has the advantages of simpler processing, lower processing energy consumption, higher thermal conductivity of finished products, more precise circuit, low conductor resistivity and low signal transmission loss compared with LTCC and HTCC.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of a method of making the present invention;
FIG. 2 is a schematic diagram of the stacking of the product of the present invention.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.
It should be understood that the terms "comprises" and "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It is also to be understood that the terminology used in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in this specification and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be further understood that the term "and/or" as used in this specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations.
Referring to fig. 1, fig. 1 is a flowchart of a manufacturing method of the present invention. The invention provides a manufacturing method of an ultrathin high-density multilayer interconnection ceramic substrate, which specifically comprises the following steps:
s1, drilling holes by using a high-strength ceramic substrate (bending strength is more than 700 MPa) with the thickness of 0.32mm and using fiber laser to realize front and back through;
wherein the ceramic substrate selected includes, but is not limited to, alumina, aluminum nitride, silicon nitride, beryllium oxide ceramic substrates. In this example, an ultra-thin high strength 0.32mm thick silicon nitride ceramic substrate was selected.
S2, chemically removing slag by using hydrofluoric acid and hydrogen peroxide, cleaning slag after drilling in the S1, and performing ultrasonic cleaning by using a plurality of pure water to ensure that the hole wall and the ceramic surface are clean;
the ceramic slag after laser drilling is firstly removed from the granular slag through physical slag scraping, and then the porous layer of the hole wall is completely eroded through liquid medicine, so that the product quality is ensured.
S3, metallizing a ceramic seed layer: sputtering a seed titanium layer and a copper layer on a silicon nitride ceramic substrate in sequence by adopting vacuum magnetron sputtering, and attaching a seed metal film layer to the wall of the ceramic hole, wherein the thickness of the titanium layer is more than or equal to 0.25 mu m, and the thickness of the copper layer is more than or equal to 0.8 mu m;
wherein, under the vacuum degree of 6.0X10-4 Pa, the electron impacts argon to generate ion, the ion impacts the target surface under the action of electric field, and the titanium target and copper target are transferred to the surface of the ceramic substrate for deposition.
S4, electroplating and filling the through holes and thickening surface copper of the ceramic substrate with the seed layer, wherein after electroplating, the through holes can be filled with copper columns, and the surface copper is also electroplated and thickened to be more than 45 mu m;
and electroplating and filling holes on the ceramic substrate with the seed layer to fill up the upper and lower via holes and thicken the surface copper to more than 45 mu m.
S5, mechanically grinding the electroplated substrate, wherein the copper surface of the whole substrate is polished to be smooth, and the polished copper surface is controlled to be 30-40 mu m;
in this example, the electroplated substrate was mechanically polished to uniformly polish the copper surface, and the thickness of the polished copper was controlled to about 35. Mu.m.
S6, carrying out first pattern transfer on the ground substrate through a dry film pressing, exposing and developing process, transferring an image onto a copper surface, protecting a bonding pad to be reserved by using a dry film by adopting a negative film process flow, and exposing copper with a line distance to be etched;
s7, copper is reduced by etching, copper in the groove is etched, and a circuit diagram is obtained (if a positive technology is adopted, after film removal is adopted in the process, a microetching solution is used for etching away a bottom seed copper layer);
s8, using titanium removing liquid to remove the titanium layer of the seed layer at the bottom, and obtaining a double-layer ceramic core plate; it should be noted that steps S4-S8 may also be produced by a positive process, wherein the positive process is first pattern transfer, then electroplating, grinding, film stripping, microetching seed copper;
s9, middle detection: the ceramic core board is subjected to AOI and electric measurement full inspection, so that the core board meets the requirements;
s10, the inspected ceramic core plate is subjected to browning treatment;
s11, stacking plates in a combined mode: the case adopts a high Tg prepreg, one 1080RC67 piece at the upper part and one 1080RC67 piece at the lower part respectively, and a copper foil is HOZ; or FPC pure glue material is used;
s12, pressing the (PP+copper foil) or FPC and the ceramic core board together in a pressing mode;
s13, because the ceramic core plate is a brittle material, the alignment Mark point is found out by adopting a laser uncovering mode, and the outer copper and the PP are removed by using laser according to the design Mark area of the core plate, so that the inner Mark point is exposed;
s14, aligning mark points of the core plate, and using laser to form blind hole channels of the inner layer and the outer layer;
s15, deslagging and microetching are carried out on the base plate after laser by using plasma, and slag in the blind hole is removed completely;
s16, copper deposition: depositing seed metal copper on the wall of the blind hole through chemical copper deposition;
s17, plate electricity: the electroless copper plating layer is thickened to 3-5 mu m by electroplating, so that the copper plating layer is prevented from being bitten off by treatment before hole filling;
s18, blind hole electroplating: filling the blind hole channel by electroplating, and electroplating and thickening the surface copper of the substrate to more than 40 mu m;
s19, grinding: leveling the electroplated copper surface of the substrate;
s20, transferring the pattern for the second time: s6, transferring the image to the copper surface through an image transfer process;
s21, etching: s7, etching out the circuit pattern by the same process;
s22, AOI/electrical measurement 2: through AOI test and electrical test, the product requirements are met;
s23, repeating the steps S10-S22, so that more layers of circuits can be manufactured;
s24, controlling depth and grooving: removing the insulating medium by using picosecond laser to expose a bonding pad of the ceramic core plate for welding the high-power chip;
the dielectric above the bonding pad of the welding chip is burned off by picosecond laser to expose the bonding pad of the ceramic core plate layer, and the back surface of the heat dissipation bonding pad can be grooved by the same process or dissipated by densely arranging blind holes through an array, as shown in figure 1;
s25, solder resist/character: following the product design, performing solder mask/character manufacturing;
s26, surface treatment: carrying out surface treatment by following the design of the product;
s27, molding: scribing and slicing by using picosecond laser to obtain a finished product.
Wherein, because the substrate is made of PP/FPC and ceramic composite material, the molding needs to use laser double-sided cutting, the PP/FPC layer is firstly cut, and then the ceramic is divided into single pcs after a notch is cut by laser.
Referring to fig. 2, fig. 2 is a schematic diagram illustrating stacking of the product of the present invention. The invention also provides an ultrathin high-density multilayer interconnection ceramic substrate, which comprises a ceramic substrate, wherein inner copper foils are arranged on the upper surface and the lower surface of the ceramic substrate to form an inner copper-clad layer; correspondingly, outer copper foil is correspondingly pressed on the inner copper-clad layers on the upper surface and the lower surface of the ceramic substrate through PP, and an outer copper-clad layer is formed.
A through groove capable of penetrating the upper copper-clad layer and the lower copper-clad layer is correspondingly formed in the ceramic substrate, a copper base for realizing connection of the upper copper-clad layer and the lower copper-clad layer (upper circuit and lower circuit) is formed in the through groove, a depth control groove is formed in a position of one surface of the ceramic substrate corresponding to the through groove, and a ceramic layer bonding pad is correspondingly formed in the position of the depth control groove and used for welding a high-power chip; and a depth control groove is correspondingly formed in the other surface of the ceramic substrate corresponding to the through groove, or heat dissipation is realized through densely distributed blind holes.
The multilayer interconnection ceramic substrate of the embodiment adopts a design mode of thermoelectric separation, devices with large heat productivity are reserved on the ceramic layer, other conductors are vertically interconnected and integrated, namely, other low-power component bonding pads without heat conduction requirements are designed on other circuit layers, and the upper parts of the heat dissipation bonding pads are not wired during design; thereby ensuring the advantages of good heat dissipation and high integration density of the ceramic substrate.
The embodiments of the invention have been described in detail above, but they are merely examples, and the invention is not limited to the embodiments described above. It will be apparent to those skilled in the art that any equivalent modifications or substitutions to this invention are within the scope of the invention, and therefore, all equivalent changes and modifications, improvements, etc. that do not depart from the spirit and scope of the principles of the invention are intended to be covered by this invention.
Claims (10)
1. The manufacturing method of the ultrathin high-density multilayer interconnection ceramic substrate is characterized by comprising the following steps of:
selecting a ceramic substrate, and performing laser drilling on the ceramic substrate to form a via hole;
performing vacuum magnetron sputtering on the ceramic substrate, and sputtering on the surface of the ceramic substrate and the hole wall of the via hole to form a seed titanium layer and a copper layer;
manufacturing a double-layer ceramic core plate;
and manufacturing the multi-layer substrate.
2. The method for manufacturing an ultra-thin high-density multilayer interconnection ceramic substrate according to claim 1, wherein the ceramic substrate is an alumina, aluminum nitride, silicon nitride, beryllium oxide ceramic substrate.
3. The method for manufacturing the ultrathin high-density multilayer interconnection ceramic substrate according to claim 2, wherein a seed titanium layer and a copper layer are formed on the surface of the ceramic substrate and the hole wall of the via hole by sputtering, the thickness of the titanium layer is more than or equal to 0.25 μm, and the thickness of the copper layer is more than or equal to 0.8 μm.
4. The method for manufacturing an ultra-thin high-density multilayer interconnection ceramic substrate according to claim 3, wherein vacuum magnetron sputtering is performed on the ceramic substrate, and a seed titanium layer and a copper layer are formed on the surface of the ceramic substrate and the hole wall of the via hole by sputtering, and further comprising:
electroplating and filling holes on the ceramic substrate so as to fill the through holes of the ceramic substrate; and meanwhile, thickening the surface copper of the ceramic substrate to enable the surface copper of the ceramic substrate to be thickened to be more than 45 mu m.
5. The method for manufacturing an ultra-thin high-density multilayer interconnection ceramic substrate according to claim 4, wherein the manufacturing of the double-layered ceramic core board comprises:
grinding the ceramic substrate subjected to electroplating hole filling and surface copper thickening to enable a copper surface to be flat;
performing first pattern transfer, and correspondingly transferring a required circuit pattern to a copper surface;
etching a required circuit on the copper surface through an etching process;
and (3) carrying out titanium removal treatment on the ceramic substrate by using chemical liquid medicine, and removing the seed titanium layer to obtain the double-layer ceramic core plate.
6. The method for manufacturing an ultra-thin high-density multi-layered interconnect ceramic substrate according to claim 5, wherein after the manufacturing of the dual-layered ceramic core plate is completed, comprising:
performing AOI (automated optical inspection) and electrical measurement full inspection on the ceramic core plate;
and forming a layer of brown film on the copper surface of the ceramic core plate through brown treatment.
7. The method of manufacturing an ultra-thin high density multi-layered interconnect ceramic substrate of claim 6, wherein said manufacturing a multi-layered substrate comprises:
a combined lamination plate, wherein prepregs, copper foils or FPC (flexible printed circuits) are correspondingly laminated on the upper surface and the lower surface of the ceramic core plate after the browning treatment;
and pressing the prepreg, the copper foil or the FPC and the ceramic core plate together in a pressing mode to obtain the pressed multilayer substrate.
8. The method for manufacturing an ultra-thin high-density multilayer interconnection ceramic substrate according to claim 7, wherein the manufacturing of the upper and lower interconnection multilayer board comprises:
the Mark point is uncovered, and the laser is used for uncovering the outer copper layer and the PP medium layer to expose the inner Mark point;
laser blind holes pass through the inner mark points and laser channels of the inner blind holes and the outer blind holes;
deslagging, and cleaning slag in the blind hole through plasma microetching;
copper deposition, namely depositing seed metal copper on the wall of the blind hole through chemical copper deposition;
electroplating to thicken the electroless copper plating seed layer to 3-5 μm;
electroplating the blind holes, filling the blind holes in an electroplating mode, and electroplating and thickening the surface copper of the substrate to more than 40 mu m;
grinding, namely grinding the copper surface of the electroplated substrate;
transferring the pattern of the second time, and transferring the image to the copper surface through an image transfer process;
etching, namely etching the circuit pattern through an etching process to obtain the upper and lower interconnection multi-layer board.
9. The method for manufacturing an ultra-thin high-density multilayer interconnection ceramic substrate according to claim 8, wherein the manufacturing of the multi-high-order HDI ceramic substrate comprises:
deep-control slotting is carried out on the upper and lower interconnection multi-layer boards, picosecond laser is used for removing insulating medium, and bonding pads used for welding high-power chips on the ceramic core board are exposed;
performing solder mask/character manufacturing;
surface treatment;
and scribing and slicing by using picosecond laser to obtain a multi-high-order HDI ceramic substrate finished product.
10. An ultra-thin high density multilayer interconnected ceramic substrate, characterized in that the ceramic substrate is manufactured by the method according to any one of claims 1-9.
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