CN117318635B - Reconfigurable high-linearity low-power amplifier - Google Patents
Reconfigurable high-linearity low-power amplifier Download PDFInfo
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- CN117318635B CN117318635B CN202311598540.XA CN202311598540A CN117318635B CN 117318635 B CN117318635 B CN 117318635B CN 202311598540 A CN202311598540 A CN 202311598540A CN 117318635 B CN117318635 B CN 117318635B
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/94—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the way in which the control signals are generated
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0008—Arrangements for reducing power consumption
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
Abstract
The invention discloses a reconfigurable high-linearity low-power consumption amplifier, which belongs to the technical field of integrated circuit design and comprises a first single-pole double-throw switch network, a first balun switch network, a first high-linearity amplifying network, a second balun switch network, a second balun network and a second single-pole double-throw switch network; the invention has reconfigurable characteristics, and can realize high-linearity amplifier with two structures: the high-harmonic suppression high-linearity amplifier and the low-power consumption high-linearity amplifier have broadband characteristics, process and temperature fluctuation self-adaption capability, and the first high-linearity amplifying network and the second high-linearity amplifying network both adopt a common-source common-gate structure, so that the structure not only has the low-power consumption characteristics, but also can well reduce the Miller effect and widen the frequency band, and can well realize high linearity in a broadband.
Description
Technical Field
The invention belongs to the technical field of integrated circuit design, and particularly relates to a reconfigurable high-linearity low-power-consumption amplifier.
Background
With the development of the current wireless communication technology, the wireless receiver has higher requirements on high integration level, low cost, high linearity, low power consumption and the like. In communication systems, the signal is sometimes amplified according to different applications, i.e. different emphasis is placed on certain indicators. If the chip can be reconstructed in the same chip to meet different requirements, the efficiency is greatly improved and the cost is reduced. It is well known that in wireless communication systems, in order to reduce signal distortion, there is a high requirement for signal linearity, and sometimes not only intermodulation distortion, but also harmonic distortion, and in some applications, the power consumption of the system is also extremely demanding. Therefore, if one chip can selectively switch linearity, harmonic suppression degree and power consumption according to different demands of users in the system, the system has good practical application significance.
Disclosure of Invention
Aiming at the defects in the prior art, the reconfigurable high-linearity low-power-consumption amplifier provided by the invention can selectively switch the working modes of the amplifier according to the linearity, the harmonic suppression degree and the power consumption of users aiming at different requirements.
In order to achieve the aim of the invention, the invention adopts the following technical scheme: a reconfigurable high-linearity low-power consumption amplifier comprises a first single-pole double-throw switch network, a first balun switch network, a first high-linearity amplifying network, a second balun switch network, a second balun network and a second single-pole double-throw switch network;
the input end of the first single-pole double-throw switch network is used as the radio frequency input end of the reconfigurable high-linearity low-power amplifier, the first output end of the first single-pole double-throw switch network is connected with the input end of the first high-linearity amplifying network, the second output end of the first single-pole double-throw switch network is connected with the input end of the first balun network, and the output end of the first balun network is connected with the input end of the first balun switch network;
the first output end of the first balun switch network is connected with the input end of the first high-linearity amplifying network, the second output end of the first balun switch network is connected with the input end of the second high-linearity amplifying network, the output end of the first high-linearity amplifying network is respectively connected with the first input end of the second balun switch network and the first input end of the second single-pole double-throw switch network, the output end of the second high-linearity amplifying network is connected with the second input end of the second balun switch network, the output end of the second balun switch network is connected with the input end of the second balun network, the output end of the second balun switch network is connected with the second input end of the second single-pole double-throw switch network, and the output end of the second single-pole double-throw switch network is used as the radio frequency output end of the reconfigurable high-linearity low-power consumption amplifier.
Further, the first single pole double throw switch network includes a capacitor C1;
one end of the capacitor C1 is used as an input end of the first single-pole double-throw switch network, and the other end of the capacitor C1 is respectively connected with the drain electrode of the switch tube Ms1 and the drain electrode of the switch tube Ms 3;
the grid electrode of the switch tube Ms1 is connected with a control voltage Vcon1 through a resistor Rs1, the source electrode of the switch tube Ms1 is respectively connected with the drain electrode of the switch tube Ms2 and one end of a microstrip line TL1, the grid electrode of the switch tube Ms2 is connected with the control voltage Vcon2 through a resistor Rs2, the source electrode of the switch tube Ms2 is grounded, and the other end of the microstrip line TL1 is used as a first output end of the first single-pole double-throw switch network;
the gate of the switch tube Ms3 is connected with the control voltage Vcon3 through a resistor Rs3, and the source of the switch tube Ms3 is used as the second output end of the first single-pole double-throw switch network.
Further, the first balun network comprises an inductor L1 and a grounding inductor L2;
one end of the inductor L1 is used as an input end of the first balun network, the other end of the inductor L1 is respectively connected with the grounding inductor L3, and the non-grounding end of the inductor L2 and the other end of the inductor L1 are used as output ends of the first balun network together;
the first balun switch network comprises a switch tube Ms4 and a switch tube Ms5;
the drain of the switch tube Ms4 and the drain of the switch tube Ms5 are used as the input end of the first balun switch network together, wherein the drain of the switch tube Ms4 is connected with the other end of the inductor L1, the gate of the switch tube Ms4 is connected with the control voltage Vcon3 through a resistor Rs4, the source of the switch tube Ms4 is used as the first output end of the first balun switch network, the drain of the switch tube Ms5 is connected with the non-grounded end of the inductor L2, the gate of the switch tube Ms5 is connected with the control voltage Vcon3 through a resistor Rs5, and the source of the switch tube Ms5 is used as the second output end of the second balun switch network.
Further, the first high linearity amplifying network comprises a capacitor C2;
one end of the capacitor C2 is used as an input end of the first high-linearity amplifying network, the other end of the capacitor C2 is respectively connected with one end of the grounding inductance L7 and one end of the capacitor C4, and the other end of the capacitor C4 is respectively connected with one end of the resistor R1 and the grid electrode of the amplifying tube M1;
the other end of the resistor R1 is respectively connected with the grid electrode of the amplifying tube M5, the drain electrode of the amplifying tube M5 and one end of the resistor R5, the source electrode of the amplifying tube M5 is connected with the grounding resistor R3, and the other end of the resistor R5 is respectively connected with one end of the resistor R11, the grounding capacitor C8, one end of the inductor L11 and VD 1;
the source electrode of the amplifying tube M1 is grounded, the drain electrode of the amplifying tube M1 is connected with the source electrode of the amplifying tube M2, the grid electrode of the amplifying tube M2 is connected with one end of a resistor R7 and one end of a resistor R13 respectively, the other end of the resistor R7 is connected with the other ends of a grounding resistor R9 and a resistor R11 respectively through a microstrip line TL2, the other end of the resistor R13 is connected with a grounding capacitor C6, the drain electrode of the amplifying tube M2 is connected with one end of an inductor L9, the other end of the inductor L9 is connected with the other end of an inductor L11 and one end of a capacitor C10 respectively, and the other end of the capacitor C10 is connected with a grounding capacitor C12 and serves as an output end of the first high-linearity amplifying network.
Further, the second high linearity amplifying network includes a capacitor C3;
one end of the capacitor C3 is used as an input end of the second high-linearity amplifying network, the other end of the capacitor C3 is respectively connected with one end of the grounding inductance L8 and one end of the capacitor C5, and the other end of the capacitor C5 is respectively connected with one end of the resistor R2 and the grid electrode of the amplifying tube M3;
the other end of the resistor R2 is respectively connected with the grid electrode of the amplifying tube M6, the drain electrode of the amplifying tube M6 is connected with one end of the resistor R6, the source electrode of the amplifying tube M6 is connected with the grounding resistor R4, and the other end of the resistor R6 is respectively connected with one end of the resistor R12, the grounding capacitor C9, one end of the inductor L12 and VD 2;
the source electrode of the amplifying tube M3 is grounded, the drain electrode of the amplifying tube M3 is connected with the source electrode of the amplifying tube M4, the grid electrode of the amplifying tube M4 is connected with one end of a resistor R8 and one end of a resistor R14 respectively, the other end of the resistor 14 is connected with a grounding capacitor C7, the other end of the resistor R8 is connected with the other ends of a grounding resistor R10 and a resistor R12 respectively through a microstrip line TL13, the drain electrode of the amplifying tube M4 is connected with one end of an inductor L10, the other end of the inductor L10 is connected with the other end of an inductor L12 and one end of a capacitor C11 respectively, and the other end of the capacitor C11 is connected with a grounding capacitor C13 and serves as an output end of the second high-linearity amplifying network.
Further, the second balun switch network comprises a switch tube Ms6 and a switch tube Ms7;
the source electrode of the switch tube Ms6 is used as a first input end of the second balun switch network, the grid electrode of the switch tube Ms6 is connected with the control voltage Vcon3 through a resistor Rs6, the source electrode of the switch tube Ms7 is used as a second input end of the second balun switch network, the grid electrode of the switch tube Ms7 is connected with the control voltage Vcon3 through a resistor Rs7, and the drain electrode of the switch tube Ms6 and the drain electrode of the switch tube Ms7 are used as output ends of the second balun switch network together;
the second balun network comprises an inductor L4 and a grounding inductor L5;
one end of the inductor L4 and the non-grounded end of the grounding inductor L5 are used as the input end of the second balun network, wherein one end of the inductor L4 is connected with the drain electrode of the switch tube Ms6 and the grounding inductor L6 respectively, the non-grounded end of the grounding inductor L5 is connected with the drain electrode of the switch tube Ms7, and the other end of the inductor L4 is used as the output end of the second balun network.
Further, the second single pole double throw switching network includes a switching tube Ms8 and a switching tube Ms10;
the drain electrode of the switch tube Ms10 is connected with one end of the microstrip line TL4 and the source electrode of the switch tube Ms9, the other end of the microstrip line TL4 is used as a first input end of the second single-pole double-throw switch network, the grid electrode of the switch tube Ms10 is connected with the control voltage Vcon2 through a resistor Rs10, the grid electrode of the switch tube Ms9 is connected with the control voltage Vcon1 through a resistor Rs9, the drain electrode of the switch tube Ms9 is connected with the drain electrode of the switch tube Ms8 and one end of a capacitor C14, the grid electrode of the switch tube Ms8 is connected with the control voltage Vcon3 through a resistor Rs8, the source electrode of the switch tube Ms8 is used as a second input end of the second single-pole double-throw switch network, and the other end of the capacitor C14 is used as an output end of the second single-pole double-throw switch network.
The beneficial effects of the invention are as follows:
1. the invention has reconfigurable characteristics, and can realize high-linearity amplifier with two structures: high harmonic rejection high linearity amplifier and low power consumption high linearity amplifier. When the first single-pole double-throw switch and the second single-pole double-throw switch are switched to the balun branch to work and the two high-linearity amplifying networks VD1 and VD2 are powered on and the first balun switch network and the second balun switch network are opened up and down, the two amplifying networks can realize high linearity (OIP 3) and high second harmonic suppression capability through the first balun function, and the circuit realizes the first high-harmonic suppression high-linearity amplifier; when the first single-pole double-throw switch network and the second single-pole double-throw switch network are switched to the other path of operation, the VD1 is powered on, the VD2 is powered off, and meanwhile, the first balun switch and the second balun switch are disconnected, only the first high-linearity amplifying network works at the moment, and the low-power-consumption mode high-linearity amplifier is realized.
2. The balun provided by the invention adopts the balun with the auxiliary line, so that the balun not only can convert a single-ended signal into a differential signal and inhibit common mode noise, but also has good isolation and good harmonic suppression capability.
3. The invention combines circuit characteristics to adopt unbalanced switch and balanced switch. The first single-pole double-throw switch and the second single-pole double-throw switch adopt unbalanced single-pole double-throw switches, and the balun branch difference loss is minimized by combining circuit characteristics, so that the output power and the linearity are higher, and the two reconstruction circuit modes have enough high isolation. The first balun switch network and the second balun switch network both adopt low-differential-loss balanced switch networks, so that certain isolation degree is ensured, and the amplitudes of two paths of differential signals are ensured to be consistent.
4. The two realizable high-linearity amplifiers in the invention have broadband characteristics, and the first and second high-linearity amplifying networks both adopt a common-source common-gate structure, so that the structure not only has low power consumption characteristics, but also can well reduce the Miller effect and widen the frequency band, thereby being capable of realizing high linearity in the broadband.
5. The invention adopts the active bias technology, can well improve the consistency of chips and has self-adaptive characteristics to the external temperature change.
Drawings
Fig. 1 is a schematic block diagram of a reconfigurable high-linearity low-power amplifier provided by the invention.
Fig. 2 is a schematic diagram of a reconfigurable high-linearity low-power amplifier circuit provided by the invention.
Detailed Description
The following description of the embodiments of the present invention is provided to facilitate understanding of the present invention by those skilled in the art, but it should be understood that the present invention is not limited to the scope of the embodiments, and all the inventions which make use of the inventive concept are protected by the spirit and scope of the present invention as defined and defined in the appended claims to those skilled in the art.
Example 1:
the embodiment of the invention provides a reconfigurable high-linearity low-power consumption amplifier, which is shown in figure 1 and comprises a first single-pole double-throw switch network, a first balun switch network, a first high-linearity amplifying network, a second balun switch network, a second balun network and a second single-pole double-throw switch network;
the input end of the first single-pole double-throw switch network is used as a radio frequency input end RFIN of the reconfigurable high-linearity low-power amplifier, the first output end of the first single-pole double-throw switch network is connected with the input end of the first high-linearity amplifying network, the second output end of the first single-pole double-throw switch network is connected with the input end of the first balun network, and the output end of the first balun network is connected with the input end of the first balun switch network;
the first output end of the first balun switch network is connected with the input end of the first high-linearity amplifying network, the second output end of the first balun switch network is connected with the input end of the second high-linearity amplifying network, the output end of the first high-linearity amplifying network is respectively connected with the first input end of the second balun switch network and the first input end of the second single-pole double-throw switch network, the output end of the second high-linearity amplifying network is connected with the second input end of the second balun switch network, the output end of the second balun switch network is connected with the input end of the second balun network, the output end of the second balun switch network is connected with the second input end of the second single-pole double-throw switch network, and the output end of the second single-pole double-throw switch network is used as the radio frequency output end RFOUT of the reconfigurable high-linearity low-power consumption amplifier.
As shown in fig. 2, the first single pole double throw switch network in the present embodiment includes a capacitor C1;
one end of the capacitor C1 is used as an input end of the first single-pole double-throw switch network, and the other end of the capacitor C1 is respectively connected with the drain electrode of the switch tube Ms1 and the drain electrode of the switch tube Ms 3;
the grid electrode of the switch tube Ms1 is connected with a control voltage Vcon1 through a resistor Rs1, the source electrode of the switch tube Ms1 is respectively connected with the drain electrode of the switch tube Ms2 and one end of a microstrip line TL1, the grid electrode of the switch tube Ms2 is connected with the control voltage Vcon2 through a resistor Rs2, the source electrode of the switch tube Ms2 is grounded, and the other end of the microstrip line TL1 is used as a first output end of the first single-pole double-throw switch network;
the gate of the switch tube Ms3 is connected with the control voltage Vcon3 through a resistor Rs3, and the source of the switch tube Ms3 is used as the second output end of the first single-pole double-throw switch network.
As shown in fig. 2, the first balun network in the present embodiment includes an inductance L1 and a ground inductance L2;
one end of the inductor L1 is used as an input end of the first balun network, the other end of the inductor L1 is connected with the grounding inductor L3 respectively, and the non-grounding end of the inductor L2 and the other end of the inductor L1 are used as output ends of the first balun network together.
As shown in fig. 2, the first balun switch network in this embodiment includes a switch tube Ms4 and a switch tube Ms5;
the drain of the switch tube Ms4 and the drain of the switch tube Ms5 are used as the input end of the first balun switch network together, wherein the drain of the switch tube Ms4 is connected with the other end of the inductor L1, the gate of the switch tube Ms4 is connected with the control voltage Vcon3 through a resistor Rs4, the source of the switch tube Ms4 is used as the first output end of the first balun switch network, the drain of the switch tube Ms5 is connected with the non-grounded end of the inductor L2, the gate of the switch tube Ms5 is connected with the control voltage Vcon3 through a resistor Rs5, and the source of the switch tube Ms5 is used as the second output end of the second balun switch network.
As shown in fig. 2, the first high linearity amplifying network in the present embodiment includes a capacitor C2;
one end of the capacitor C2 is used as an input end of the first high-linearity amplifying network, the other end of the capacitor C2 is respectively connected with one end of the grounding inductance L7 and one end of the capacitor C4, and the other end of the capacitor C4 is respectively connected with one end of the resistor R1 and the grid electrode of the amplifying tube M1;
the other end of the resistor R1 is respectively connected with the grid electrode of the amplifying tube M5, the drain electrode of the amplifying tube M5 and one end of the resistor R5, the source electrode of the amplifying tube M5 is connected with the grounding resistor R3, and the other end of the resistor R5 is respectively connected with one end of the resistor R11, the grounding capacitor C8, one end of the inductor L11 and VD 1;
the source electrode of the amplifying tube M1 is grounded, the drain electrode of the amplifying tube M1 is connected with the source electrode of the amplifying tube M2, the grid electrode of the amplifying tube M2 is connected with one end of a resistor R7 and one end of a resistor R13 respectively, the other end of the resistor R7 is connected with the other ends of a grounding resistor R9 and a resistor R11 respectively through a microstrip line TL2, the other end of the resistor R13 is connected with a grounding capacitor C6, the drain electrode of the amplifying tube M2 is connected with one end of an inductor L9, the other end of the inductor L9 is connected with the other end of an inductor L11 and one end of a capacitor C10 respectively, and the other end of the capacitor C10 is connected with a grounding capacitor C12 and serves as an output end of the first high-linearity amplifying network.
As shown in fig. 2, the second high linearity amplifying network in the present embodiment includes a capacitor C3;
one end of the capacitor C3 is used as an input end of the second high-linearity amplifying network, the other end of the capacitor C3 is respectively connected with one end of the grounding inductance L8 and one end of the capacitor C5, and the other end of the capacitor C5 is respectively connected with one end of the resistor R2 and the grid electrode of the amplifying tube M3;
the other end of the resistor R2 is respectively connected with the grid electrode of the amplifying tube M6, the drain electrode of the amplifying tube M6 is connected with one end of the resistor R6, the source electrode of the amplifying tube M6 is connected with the grounding resistor R4, and the other end of the resistor R6 is respectively connected with one end of the resistor R12, the grounding capacitor C9, one end of the inductor L12 and VD 2;
the source electrode of the amplifying tube M3 is grounded, the drain electrode of the amplifying tube M3 is connected with the source electrode of the amplifying tube M4, the grid electrode of the amplifying tube M4 is connected with one end of a resistor R8 and one end of a resistor R14 respectively, the other end of the resistor 14 is connected with a grounding capacitor C7, the other end of the resistor R8 is connected with the other ends of a grounding resistor R10 and a resistor R12 respectively through a microstrip line TL13, the drain electrode of the amplifying tube M4 is connected with one end of an inductor L10, the other end of the inductor L10 is connected with the other end of an inductor L12 and one end of a capacitor C11 respectively, and the other end of the capacitor C11 is connected with a grounding capacitor C13 and serves as an output end of the second high-linearity amplifying network.
As shown in fig. 2, the second balun switch network in the present embodiment includes a switch tube Ms6 and a switch tube Ms7;
the source electrode of the switch tube Ms6 is used as a first input end of the second balun switch network, the grid electrode of the switch tube Ms6 is connected with the control voltage Vcon3 through a resistor Rs6, the source electrode of the switch tube Ms7 is used as a second input end of the second balun switch network, the grid electrode of the switch tube Ms7 is connected with the control voltage Vcon3 through a resistor Rs7, and the drain electrode of the switch tube Ms6 and the drain electrode of the switch tube Ms7 are used as output ends of the second balun switch network together;
as shown in fig. 2, the second balun network in the present embodiment includes an inductance L4 and a ground inductance L5;
one end of the inductor L4 and the non-grounded end of the grounding inductor L5 are used as the input end of the second balun network, wherein one end of the inductor L4 is connected with the drain electrode of the switch tube Ms6 and the grounding inductor L6 respectively, the non-grounded end of the grounding inductor L5 is connected with the drain electrode of the switch tube Ms7, and the other end of the inductor L4 is used as the output end of the second balun network.
As shown in fig. 2, the second single pole double throw switching network in the present embodiment includes a switching tube Ms8 and a switching tube Ms10;
the drain electrode of the switch tube Ms10 is connected with one end of the microstrip line TL4 and the source electrode of the switch tube Ms9, the other end of the microstrip line TL4 is used as a first input end of the second single-pole double-throw switch network, the grid electrode of the switch tube Ms10 is connected with the control voltage Vcon2 through a resistor Rs10, the grid electrode of the switch tube Ms9 is connected with the control voltage Vcon1 through a resistor Rs9, the drain electrode of the switch tube Ms9 is connected with the drain electrode of the switch tube Ms8 and one end of a capacitor C14, the grid electrode of the switch tube Ms8 is connected with the control voltage Vcon3 through a resistor Rs8, the source electrode of the switch tube Ms8 is used as a second input end of the second single-pole double-throw switch network, and the other end of the capacitor C14 is used as an output end of the second single-pole double-throw switch network.
Example 2:
the present embodiment provides the operating principle of two kinds of high-linearity amplifiers (high-harmonic-rejection high-linearity amplifier and low-power-consumption mode high-linearity amplifier) that can be realized by the amplifier structure in embodiment 1:
high harmonic rejection high linearity amplifier:
the signal enters from the RFin port to reach the first single-pole double-throw switch network, the switch tubes Ms 1-Ms 3 are controlled by control voltages Vcon 1-Vcon 3 respectively, when the balun branch circuit series switch tube Ms3 of the first single-pole double-throw switch network is opened, the series switch tube Ms1 of the other branch circuit is turned off, the parallel switch tube Ms2 is opened, the signal enters the first balun network, the first balun and the second balun are the balun with the auxiliary line, the second harmonic suppression capability is better, in the first balun network, the signal is converted into a differential signal from a single-ended signal, one signal with the 180 DEG phase difference enters the first high-linearity amplifying network through the series switch tube Ms4, the other signal enters the second high-linearity amplifying network through the series switch tube Ms5, and at the moment, the switch tubes Ms4 and Ms5 are both in an open state and are controlled by the control voltage Vcon 3.
In the state of the high-harmonic-suppression high-linearity amplifier, VD1 and VD2 are simultaneously powered, and the working states of the first high-linearity amplifying network and the second high-linearity amplifying network are identical, and the present embodiment is described with respect to the first high-linearity amplifying network. In the first high-linearity amplifying network, the whole impedance matching focuses on the higher OIP3 output, the capacitors C2, C4 and the inductor L7 form input matching, the amplifying tubes M1 and M2 are of a common-source common-gate structure, and the common-source common-gate structure can well improve the OIP3 of the circuit in a wide frequency band. The grid voltage of M1 is provided by VD1 through active bias, resistors R3 and R5 and amplifying tube M5 form an active bias structure, the structure can effectively control process and temperature fluctuation, consistency is improved, the source stage of M1 is grounded, and the drain electrode of the structure is connected with the source stage of M2. The grid voltage of M2 is obtained by dividing voltage of VD1 through resistors R9 and R11, the drain voltage of the grid voltage is obtained by VD1 through inductors L11 and L9, L11 is a choke inductor, L9 is a matching inductor, C8 is a bypass capacitor, the grid electrode of M2 is grounded through a capacitor C6 in a radio frequency mode, and a resistor R13 is used for improving circuit stability. Capacitors C10 and C12 are output matching.
The two differential signals coming out from the first and second high-linearity amplifying networks reach the second balun network through the series switch transistors Ms6 and Ms7, at this time Ms6 and Ms7 are in an open state, which is also controlled by the control voltage Vcon 3. And converting the differential signal into a single-ended signal through a second balun network and outputting the single-ended signal to a second single-pole double-throw switch network. In the second single-pole double-throw switch network, a series switch tube Ms8 of the balun branch is opened, a series switch tube Ms9 of the other branch is turned off, a parallel switch tube Ms10 is opened, control voltages of Ms 8-Ms 10 are shared with control voltages in the first single-pole double-throw switch network, and finally signals are output from an RFout port. Because the differential structure has higher linearity and combines the first and second high-linearity amplifier networks, the whole circuit has higher OIP3 output, and meanwhile, the chin of the structure has better second harmonic suppression capability, so that the first high-harmonic suppression high-linearity amplifier is realized.
Low power mode high linearity amplifier:
signals enter from the RFin port to reach the first single pole double throw switching network. At this time, the series switching tube Ms3 of the balun branch is turned off; the series switching tube Ms1 of the other branch is opened, the parallel switching tube Ms2 is turned off, so that the signal can smoothly pass through the branch to reach the first high-linearity amplifying network, and meanwhile, the upper and lower series switching tubes Ms4 and Ms5 of the first balun network are both turned off, and the two branches are both turned off; similarly, both branches of the second balun network are disconnected. At this time, VD1 is powered on, the first high-linearity amplifying network realizes the amplifying function, VD2 is not powered on, the second high-linearity amplifying network has no amplifying function, the signal comes out from the first high-linearity amplifying network and enters the second single-pole double-throw switching network, which is the same as the first single-pole double-throw switching network, at this time, the balun branch is disconnected in the network, and the signal reaches the output end RFout through the opened series switching tube Ms9, because only the first high-linearity amplifying network works at this time, the second low-power-consumption mode high-linearity amplifier is realized.
In the description of the present invention, it should be understood that the terms "first" and "second" are used for descriptive purposes only and are not to be interpreted as indicating or implying a relative importance or number of implicitly specified features. Thus, a feature defined as "first", "second" may include one or more such feature, either explicitly or implicitly.
The principles and embodiments of the present invention have been described in detail with reference to specific examples, which are provided to facilitate understanding of the method and core ideas of the present invention; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present invention, the present description should not be construed as limiting the present invention in view of the above.
Those of ordinary skill in the art will recognize that the embodiments described herein are for the purpose of aiding the reader in understanding the principles of the present invention and should be understood that the scope of the invention is not limited to such specific statements and embodiments. Those of ordinary skill in the art can make various other specific modifications and combinations from the teachings of the present disclosure without departing from the spirit thereof, and such modifications and combinations remain within the scope of the present disclosure.
Claims (7)
1. The reconfigurable high-linearity low-power-consumption amplifier is characterized by comprising a first single-pole double-throw switch network, a first balun switch network, a first high-linearity amplifying network, a second balun switch network, a second balun network and a second single-pole double-throw switch network;
the input end of the first single-pole double-throw switch network is used as the radio frequency input end of the reconfigurable high-linearity low-power amplifier, the first output end of the first single-pole double-throw switch network is connected with the input end of the first high-linearity amplifying network, the second output end of the first single-pole double-throw switch network is connected with the input end of the first balun network, and the output end of the first balun network is connected with the input end of the first balun switch network;
the first output end of the first balun switch network is connected with the input end of the first high-linearity amplifying network, the second output end of the first balun switch network is connected with the input end of the second high-linearity amplifying network, the output end of the first high-linearity amplifying network is respectively connected with the first input end of the second balun switch network and the first input end of the second single-pole double-throw switch network, the output end of the second high-linearity amplifying network is connected with the second input end of the second balun switch network, the output end of the second balun switch network is connected with the input end of the second balun network, the output end of the second balun switch network is connected with the second input end of the second single-pole double-throw switch network, and the output end of the second single-pole double-throw switch network is used as the radio frequency output end of the reconfigurable high-linearity low-power consumption amplifier.
2. The reconfigurable high linearity low power consumption amplifier of claim 1, wherein said first single pole double throw switching network includes a capacitor C1;
one end of the capacitor C1 is used as an input end of the first single-pole double-throw switch network, and the other end of the capacitor C1 is respectively connected with the drain electrode of the switch tube Ms1 and the drain electrode of the switch tube Ms 3;
the grid electrode of the switch tube Ms1 is connected with a control voltage Vcon1 through a resistor Rs1, the source electrode of the switch tube Ms1 is respectively connected with the drain electrode of the switch tube Ms2 and one end of a microstrip line TL1, the grid electrode of the switch tube Ms2 is connected with the control voltage Vcon2 through a resistor Rs2, the source electrode of the switch tube Ms2 is grounded, and the other end of the microstrip line TL1 is used as a first output end of the first single-pole double-throw switch network;
the gate of the switch tube Ms3 is connected with the control voltage Vcon3 through a resistor Rs3, and the source of the switch tube Ms3 is used as the second output end of the first single-pole double-throw switch network.
3. The reconfigurable high linearity low power consumption amplifier of claim 1, wherein the first balun network includes an inductance L1 and a ground inductance L2;
one end of the inductor L1 is used as an input end of the first balun network, the other end of the inductor L1 is respectively connected with the grounding inductor L3, and the non-grounding end of the inductor L2 and the other end of the inductor L1 are used as output ends of the first balun network together;
the first balun switch network comprises a switch tube Ms4 and a switch tube Ms5;
the drain of the switch tube Ms4 and the drain of the switch tube Ms5 are used as the input end of the first balun switch network together, wherein the drain of the switch tube Ms4 is connected with the other end of the inductor L1, the gate of the switch tube Ms4 is connected with the control voltage Vcon3 through a resistor Rs4, the source of the switch tube Ms4 is used as the first output end of the first balun switch network, the drain of the switch tube Ms5 is connected with the non-grounded end of the inductor L2, the gate of the switch tube Ms5 is connected with the control voltage Vcon3 through a resistor Rs5, and the source of the switch tube Ms5 is used as the second output end of the second balun switch network.
4. The reconfigurable high linearity low power consumption amplifier of claim 1, wherein said first high linearity amplifying network includes a capacitor C2;
one end of the capacitor C2 is used as an input end of the first high-linearity amplifying network, the other end of the capacitor C2 is respectively connected with one end of the grounding inductance L7 and one end of the capacitor C4, and the other end of the capacitor C4 is respectively connected with one end of the resistor R1 and the grid electrode of the amplifying tube M1;
the other end of the resistor R1 is respectively connected with the grid electrode of the amplifying tube M5, the drain electrode of the amplifying tube M5 and one end of the resistor R5, the source electrode of the amplifying tube M5 is connected with the grounding resistor R3, and the other end of the resistor R5 is respectively connected with one end of the resistor R11, the grounding capacitor C8, one end of the inductor L11 and VD 1;
the source electrode of the amplifying tube M1 is grounded, the drain electrode of the amplifying tube M1 is connected with the source electrode of the amplifying tube M2, the grid electrode of the amplifying tube M2 is connected with one end of a resistor R7 and one end of a resistor R13 respectively, the other end of the resistor R7 is connected with the other ends of a grounding resistor R9 and a resistor R11 respectively through a microstrip line TL2, the other end of the resistor R13 is connected with a grounding capacitor C6, the drain electrode of the amplifying tube M2 is connected with one end of an inductor L9, the other end of the inductor L9 is connected with the other end of an inductor L11 and one end of a capacitor C10 respectively, and the other end of the capacitor C10 is connected with a grounding capacitor C12 and serves as an output end of the first high-linearity amplifying network.
5. The reconfigurable high linearity low power consumption amplifier of claim 1, wherein the second high linearity amplifying network includes a capacitor C3;
one end of the capacitor C3 is used as an input end of the second high-linearity amplifying network, the other end of the capacitor C3 is respectively connected with one end of the grounding inductance L8 and one end of the capacitor C5, and the other end of the capacitor C5 is respectively connected with one end of the resistor R2 and the grid electrode of the amplifying tube M3;
the other end of the resistor R2 is respectively connected with the grid electrode of the amplifying tube M6, the drain electrode of the amplifying tube M6 is connected with one end of the resistor R6, the source electrode of the amplifying tube M6 is connected with the grounding resistor R4, and the other end of the resistor R6 is respectively connected with one end of the resistor R12, the grounding capacitor C9, one end of the inductor L12 and VD 2;
the source electrode of the amplifying tube M3 is grounded, the drain electrode of the amplifying tube M3 is connected with the source electrode of the amplifying tube M4, the grid electrode of the amplifying tube M4 is connected with one end of a resistor R8 and one end of a resistor R14 respectively, the other end of the resistor R14 is connected with a grounding capacitor C7, the other end of the resistor R8 is connected with the other ends of a grounding resistor R10 and a resistor R12 respectively through a microstrip line TL13, the drain electrode of the amplifying tube M4 is connected with one end of an inductor L10, the other end of the inductor L10 is connected with the other end of an inductor L12 and one end of a capacitor C11 respectively, and the other end of the capacitor C11 is connected with the grounding capacitor C13 and serves as an output end of the second high-linearity amplifying network.
6. The reconfigurable high linearity low power consumption amplifier of claim 1, wherein the second balun switch network includes a switch tube Ms6 and a switch tube Ms7;
the source electrode of the switch tube Ms6 is used as a first input end of the second balun switch network, the grid electrode of the switch tube Ms6 is connected with the control voltage Vcon3 through a resistor Rs6, the source electrode of the switch tube Ms7 is used as a second input end of the second balun switch network, the grid electrode of the switch tube Ms7 is connected with the control voltage Vcon3 through a resistor Rs7, and the drain electrode of the switch tube Ms6 and the drain electrode of the switch tube Ms7 are used as output ends of the second balun switch network together;
the second balun network comprises an inductor L4 and a grounding inductor L5;
one end of the inductor L4 and the non-grounded end of the grounding inductor L5 are used as the input end of the second balun network, wherein one end of the inductor L4 is connected with the drain electrode of the switch tube Ms6 and the grounding inductor L6 respectively, the non-grounded end of the grounding inductor L5 is connected with the drain electrode of the switch tube Ms7, and the other end of the inductor L4 is used as the output end of the second balun network.
7. The reconfigurable high linearity low power consumption amplifier of claim 1, wherein said second single pole double throw switching network comprises a switching tube Ms8 and a switching tube Ms10;
the drain electrode of the switch tube Ms10 is connected with one end of the microstrip line TL4 and the source electrode of the switch tube Ms9, the other end of the microstrip line TL4 is used as a first input end of the second single-pole double-throw switch network, the grid electrode of the switch tube Ms10 is connected with the control voltage Vcon2 through a resistor Rs10, the grid electrode of the switch tube Ms9 is connected with the control voltage Vcon1 through a resistor Rs9, the drain electrode of the switch tube Ms9 is connected with the drain electrode of the switch tube Ms8 and one end of a capacitor C14, the grid electrode of the switch tube Ms8 is connected with the control voltage Vcon3 through a resistor Rs8, the source electrode of the switch tube Ms8 is used as a second input end of the second single-pole double-throw switch network, and the other end of the capacitor C14 is used as an output end of the second single-pole double-throw switch network.
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Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014207524A (en) * | 2013-04-11 | 2014-10-30 | 三菱電機株式会社 | Active balun |
| CN111082765A (en) * | 2019-12-27 | 2020-04-28 | 中电国基南方集团有限公司 | Ultra-wideband two-position phase shifter |
| CN114866047A (en) * | 2022-07-07 | 2022-08-05 | 成都嘉纳海威科技有限责任公司 | Bi-Hemt technology-based broadband dual-channel transceiving amplification chip |
| CN114978074A (en) * | 2022-07-25 | 2022-08-30 | 成都嘉纳海威科技有限责任公司 | Three-channel transceiving amplification chip |
| CN115632616A (en) * | 2022-12-22 | 2023-01-20 | 成都嘉纳海威科技有限责任公司 | But chip is put in low-power consumption drive of adaptive gain control |
| CN115940990A (en) * | 2023-03-13 | 2023-04-07 | 成都嘉纳海威科技有限责任公司 | Ultra-wideband transmitting-receiving multifunctional chip |
| CN116015332A (en) * | 2023-01-09 | 2023-04-25 | 成都通量科技有限公司 | Millimeter wave dual-band image rejection receiver and receiving method |
| CN116846351A (en) * | 2022-03-23 | 2023-10-03 | 锐石创芯(深圳)科技股份有限公司 | Push-pull power amplifying circuit |
-
2023
- 2023-11-28 CN CN202311598540.XA patent/CN117318635B/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014207524A (en) * | 2013-04-11 | 2014-10-30 | 三菱電機株式会社 | Active balun |
| CN111082765A (en) * | 2019-12-27 | 2020-04-28 | 中电国基南方集团有限公司 | Ultra-wideband two-position phase shifter |
| CN116846351A (en) * | 2022-03-23 | 2023-10-03 | 锐石创芯(深圳)科技股份有限公司 | Push-pull power amplifying circuit |
| CN114866047A (en) * | 2022-07-07 | 2022-08-05 | 成都嘉纳海威科技有限责任公司 | Bi-Hemt technology-based broadband dual-channel transceiving amplification chip |
| CN114978074A (en) * | 2022-07-25 | 2022-08-30 | 成都嘉纳海威科技有限责任公司 | Three-channel transceiving amplification chip |
| CN115632616A (en) * | 2022-12-22 | 2023-01-20 | 成都嘉纳海威科技有限责任公司 | But chip is put in low-power consumption drive of adaptive gain control |
| CN116015332A (en) * | 2023-01-09 | 2023-04-25 | 成都通量科技有限公司 | Millimeter wave dual-band image rejection receiver and receiving method |
| CN115940990A (en) * | 2023-03-13 | 2023-04-07 | 成都嘉纳海威科技有限责任公司 | Ultra-wideband transmitting-receiving multifunctional chip |
Non-Patent Citations (2)
| Title |
|---|
| A 400MHz Single-Chip CMOS Transceiver for Long Range High Definition Video Transmission in UAV Application;HUANG Shuigen;LIN Min;WANG Ruoyu;CHEN Zhuojun;DONG Yemin;;Chinese Journal of Electronics;20200515(第03期);258-261 * |
| 基于2.4GHz的无线传感网络通信平台的设计;江晓林;;移动通信;20081130(第22期);314-319 * |
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