CN117293193A - Gallium oxide Schottky diode with AlN barrier layer and preparation method - Google Patents
Gallium oxide Schottky diode with AlN barrier layer and preparation method Download PDFInfo
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- CN117293193A CN117293193A CN202311264299.7A CN202311264299A CN117293193A CN 117293193 A CN117293193 A CN 117293193A CN 202311264299 A CN202311264299 A CN 202311264299A CN 117293193 A CN117293193 A CN 117293193A
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- 230000004888 barrier function Effects 0.000 title claims abstract description 54
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 title claims abstract description 43
- 229910001195 gallium oxide Inorganic materials 0.000 title claims abstract description 43
- 238000002360 preparation method Methods 0.000 title abstract description 8
- 229920002120 photoresistant polymer Polymers 0.000 claims description 43
- 238000005530 etching Methods 0.000 claims description 23
- 238000000034 method Methods 0.000 claims description 23
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 12
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims description 6
- 239000008367 deionised water Substances 0.000 claims description 6
- 229910021641 deionized water Inorganic materials 0.000 claims description 6
- 238000004506 ultrasonic cleaning Methods 0.000 claims description 6
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 6
- 238000000609 electron-beam lithography Methods 0.000 claims description 5
- 238000004528 spin coating Methods 0.000 claims description 4
- 238000004519 manufacturing process Methods 0.000 claims description 3
- 239000010409 thin film Substances 0.000 claims description 2
- 229910052751 metal Inorganic materials 0.000 abstract description 34
- 239000002184 metal Substances 0.000 abstract description 34
- 239000003574 free electron Substances 0.000 abstract description 10
- 229910005191 Ga 2 O 3 Inorganic materials 0.000 description 19
- 238000000151 deposition Methods 0.000 description 15
- 239000011248 coating agent Substances 0.000 description 12
- 238000000576 coating method Methods 0.000 description 12
- 239000000758 substrate Substances 0.000 description 9
- 239000011148 porous material Substances 0.000 description 8
- 230000008021 deposition Effects 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 7
- 230000008569 process Effects 0.000 description 7
- 239000010408 film Substances 0.000 description 6
- 238000001259 photo etching Methods 0.000 description 6
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 4
- 230000005684 electric field Effects 0.000 description 4
- 229910052757 nitrogen Inorganic materials 0.000 description 4
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 4
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 4
- 229910004205 SiNX Inorganic materials 0.000 description 3
- 238000004140 cleaning Methods 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 3
- 208000032750 Device leakage Diseases 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000001035 drying Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005566 electron beam evaporation Methods 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 238000007781 pre-processing Methods 0.000 description 2
- 230000005641 tunneling Effects 0.000 description 2
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 description 1
- 239000005751 Copper oxide Substances 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 229910000431 copper oxide Inorganic materials 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 229910000480 nickel oxide Inorganic materials 0.000 description 1
- GNRSAWUEBMWBQH-UHFFFAOYSA-N oxonickel Chemical compound [Ni]=O GNRSAWUEBMWBQH-UHFFFAOYSA-N 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
Abstract
The invention discloses a gallium oxide Schottky diode with an AlN barrier layer and a preparation method thereof. The gallium oxide Schottky diode comprises an AlN barrier layer arranged between the low-doped epitaxial layer and an anode electrode region; the AlN barrier layer has a thickness of not more than 5nm. An ultrathin AlN barrier layer is introduced between gallium oxide and anode metal, so that high-concentration free electrons can be formed at the interface of the gallium oxide and the anode metal, and when the device works under forward bias, the free electrons can tunnel, thereby keeping low starting voltage. Further, the AlN barrier layer has a thickness of not more than 5nm, because an excessive thickness will result in a decrease in free electron concentration at the interface, and free electrons are difficult to pass through the barrier layer, thereby affecting the forward conduction performance of the device.
Description
Technical Field
The invention relates to the technical field of gallium oxide Schottky diodes, in particular to a gallium oxide Schottky diode with an AlN barrier layer and a preparation method thereof.
Background
Ga 2 O 3 By means of high forbidden bandwidth, high breakdown electric field and low cost growth modeHas the advantages of ultrahigh pressure resistance, low cost and large-scale preparation, the method can prepare the high-power, high-performance and low-cost power device, and is hopeful to solve the development bottleneck of silicon base, gaN and SiC. Wherein Ga 2 O 3 The SBD provides a more efficient and energy-saving device selection for new generation power electronic technology in the fields of electric automobiles, photovoltaic power generation and other emerging industries by virtue of excellent device performance. However, high performance Ga 2 O 3 The development of SBD still faces some key scientific and technical issues, and research is needed to solve and break through. For example, a large leakage current can be generated at the schottky interface of the single barrier under the action of a reverse electric field, which can cause reverse breakdown of the device and increase standby energy consumption of the device. Because the effective p-type doping technology of gallium oxide still has great challenges, the gallium oxide homojunction pn is difficult to realize, and researchers usually consider that p-type oxide such as nickel oxide, copper oxide and other materials are introduced at the schottky barrier interface to form a heterojunction diode, but the problems of larger device turn-on voltage, slower switching speed and the like are easily caused.
Disclosure of Invention
In view of the above, the present invention is directed to a gallium oxide schottky diode with an AlN barrier layer and a method for manufacturing the same, which can solve at least one technical problem mentioned in the background art.
According to one aspect of the present invention, there is provided a gallium oxide schottky diode having an AlN barrier layer, the gallium oxide schottky diode including an AlN barrier layer disposed between a low-doped epitaxial layer and an anode electrode region; the AlN barrier layer has a thickness of not more than 5nm.
In the technical scheme, an ultrathin AlN barrier layer is introduced between gallium oxide and anode metal, so that high-concentration free electrons can be formed at the interface of the gallium oxide and the anode metal, and when the device works under forward bias, the free electrons can tunnel, thereby keeping low starting voltage. Further, the AlN barrier layer has a thickness of not more than 5nm, because an excessive thickness will result in a decrease in free electron concentration at the interface, and free electrons are difficult to pass through the barrier layer, thereby affecting the forward conduction performance of the device.
In some embodiments, the low doped epitaxial layer and the AlN barrier layer are both trench structures.
In the technical scheme, the AlN layer with a low interface state grown on the surface of the etched gallium oxide groove can improve the barrier height, effectively passivate surface traps and surface tunneling effects, and therefore device leakage current is reduced.
In some embodiments, the gallium oxide schottky diode further comprises: an insulating layer;
the inner surface of the groove of the AlN barrier layer and the insulating layer form a three-dimensional field plate structure.
In the technical scheme, the three-dimensional field plate structure is formed through the inner surface of the groove and the insulating layer, so that the breakdown voltage of the device can be greatly improved.
In some embodiments, the insulating layer is disposed on top of the AlN barrier layer and covers only the edge positions of the anode electrode region by 5-20 μm.
In the above technical solution, the purpose of this arrangement is to avoid direct contact between the extension region of the external electrode and the AlN layer, and to realize metal interconnection of the anode electrode and the external electrode.
In some embodiments, the gallium oxide schottky diode further comprises: an external electrode region;
the external electrode region is positioned on top of the anode electrode region and the insulating layer and has a size larger than that of the anode electrode region.
In the above technical solution, the purpose of the arrangement is to form a field plate structure by extending the metal of the external electrode, change the electric field distribution inside the gallium oxide material, and introduce the peak electric field into the insulating layer with higher withstand voltage, thereby realizing higher breakdown voltage.
According to another aspect of the present invention, a method for preparing a gallium oxide schottky diode having an AlN barrier layer is provided, for preparing the gallium oxide schottky diode having an AlN barrier layer, the method comprising:
pretreating the surface of the low-doped epitaxial layer;
after pretreatment, an AlN thin film is grown on the surface by ALD technique.
In the technical scheme, an ultrathin AlN barrier layer is introduced between gallium oxide and anode metal, so that high-concentration free electrons can be formed at the interface of the gallium oxide and the anode metal, and when the device works under forward bias, the free electrons can tunnel, thereby keeping low starting voltage.
In some embodiments, the preprocessing comprises: and sequentially carrying out ultrasonic cleaning on the surface of the low-doped epitaxial layer through acetone, absolute ethyl alcohol and deionized water.
In the technical scheme, the purpose of cleaning is to remove impurities on the surface of the low-doped epitaxial layer, so that the influence on the subsequent process is avoided.
In some embodiments, the preprocessing comprises:
spin-coating photoresist on the surface of the low-doped epitaxial layer, and obtaining a groove etching window through electron beam lithography; RIE is used to etch the trench structure in the trench etch window.
In the technical scheme, the AlN layer with a low interface state grown on the surface of the etched gallium oxide groove can improve the barrier height, effectively passivate surface traps and surface tunneling effects, and therefore device leakage current is reduced. During the etching process, a photoresist etching process is adopted, and the process is mature.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of an embodiment of a gallium oxide schottky diode with an AlN barrier layer according to the present invention;
fig. 2 is a flow chart of an embodiment of a gallium oxide schottky diode with an AlN barrier layer according to the present invention;
fig. 3 is a schematic diagram of another embodiment of a gallium oxide schottky diode with an AlN barrier layer according to the present invention;
fig. 4 is a schematic flow chart of another embodiment of a gallium oxide schottky diode with AlN barrier layer according to the present invention;
Detailed Description
The invention is described in further detail below with reference to the drawings and examples. It is specifically noted that the following examples are only for illustrating the present invention, but do not limit the scope of the present invention. Likewise, the following examples are only some, but not all, of the examples of the present invention, and all other examples, which a person of ordinary skill in the art would obtain without making any inventive effort, are within the scope of the present invention.
The invention provides a gallium oxide Schottky diode with an AlN barrier layer and a preparation method thereof, which can at least solve the technical problems mentioned in the background art.
One of the embodiments
Referring to fig. 1, a gallium oxide schottky diode with an AlN barrier layer, structure 1 is shown in fig. 1, and includes, from bottom to top: (1) a cathode electrode region, (2) a highly doped substrate, (3) a low doped epitaxial layer, (4) an AlN barrier layer, (5) an anode electrode region, (6) an insulating layer, and (7) an external electrode region. The process flow is shown in fig. 2, and the preparation method comprises the following steps:
step 1: beta-Ga using low doped epitaxial layer/high doped substrate structure 2 O 3 The epitaxial wafer is subjected to ultrasonic cleaning by acetone, absolute ethyl alcohol and deionized water in sequence;
step 2: using ALD technique on beta-Ga 2 O 3 Growing an AlN film on the surface of an epitaxial layer of the epitaxial wafer;
step 3: in beta-Ga 2 O 3 And carrying out ohmic electrode metal deposition on the highly doped substrate area on the back of the epitaxial wafer, and carrying out rapid annealing treatment to form good ohmic contact.
Step 4: in beta-Ga 2 O 3 Uniformly coating photoresist on the front surface of an epitaxial wafer, and forming an opening by photoetchingIs a metal anode region; depositing Schottky electrode metal in the anode metal region with the holes, and placing a sample into a photoresist remover for lift-0ff stripping to form an anode electrode region;
step 5: growing SiN on sample upper surface using PECVD x An insulating layer;
step 6: continuously uniformly coating photoresist on the front surface of the sample, and forming a photoresist open pore window in the anode electrode region by photoetching technology; siN under split-hole window using ICP etching technique x Etching the insulating layer, and removing photoresist by using photoresist remover after complete etching;
step 7: coating photoresist on the front surface of the sample continuously, and forming a photoresist open pore window with the size larger than that of the anode metal region through alignment; depositing anode metal in the area of the opening, and putting the sample into photoresist remover to lift-0ff for stripping to form an extended metal field plate;
specifically:
step 1: selecting and cleaning beta-Ga 2 O 3 And (5) an epitaxial wafer.
Lightly doped epitaxial layer (Si: 3×10) 16 cm -3 ) Heavily doped substrate (Sn: 5×10) 18 cm -3 ) beta-Ga of 10um, 500um respectively 2 O 3 And (3) an epitaxial wafer is subjected to double-sided polishing treatment. Respectively carrying out ultrasonic cleaning for 10min by using acetone, absolute ethyl alcohol and deionized water, and drying by using nitrogen to obtain a clean surface state;
step 2: an AlN barrier layer is deposited.
Using ALD technique on beta-Ga 2 O 3 Growing AlN film on the epitaxial layer surface of epitaxial wafer with trimethyl aluminum (TMA) and NH 3 As Al and N sources, the growth temperature was set at 375 ℃. Each ALD cycle was pulsed with 0.1sTMA, 6s N 2 Pulse, 1s NH 3 Pulse, 6s N 2 Pulse composition. The film deposition thickness is about 2-5nm.
Step 3: good cathode ohmic contact is obtained.
In beta-Ga 2 O 3 The high doped substrate area on the back of the epitaxial wafer is used for evaporating 50/100nm Ti/Au by using an electron beam evaporation technology as ohmic contact metal,and rapidly annealed at 500 c for 90s to form a good ohmic contact.
Step 4: and realizing anode schottky contact.
In beta-Ga 2 O 3 Uniformly coating photoresist on the front surface of the epitaxial wafer, and forming an anode metal region with an opening on the top of the epitaxial layer through photoetching; depositing 20/20nm Ni/Au structural Schottky metal in the anode metal area with the opening, and putting a sample into a photoresist remover for lift-0ff stripping to form an anode electrode area;
step 5: and (3) depositing a SiNx insulating layer.
Deposition of SiNx insulating layer, 5% SiH, on sample upper surface using PECVD 4 ：NH 3 =130: 85sccm, growth temperature 260 ℃, deposition of SiN x The thickness of the insulating layer is 200nm;
step 6: siN on the upper surface of the anode x Etching the insulating layer, uniformly coating photoresist on the front surface of the sample, and forming a photoresist open-pore window above the anode electrode region by photoetching technology; siN under split-hole window using ICP etching technique x Etching the insulating layer, and removing photoresist by using photoresist remover after complete etching;
step 7: obtaining the external electrode and the field plate structure.
Coating photoresist on the front surface of the sample continuously, and forming a photoresist open pore window with the size larger than that of the anode metal region through alignment; depositing 50/100nm Ni/Au metal in the area of the opening, and putting the sample into photoresist remover for lift-0ff stripping to form an extended metal field plate;
second embodiment
Gallium oxide schottky diode with AlN barrier layer, structure 2, as shown in fig. 3, includes, from bottom to top: (1) a cathode electrode region, (2) a highly doped substrate, (3) a low doped epitaxial layer, (4) an AlN barrier layer, (5) an anode electrode region, (6) an insulating layer, and (7) an external electrode region. The AlN barrier layer is positioned on the surface of the low-doped epitaxial layer, the anode electrode region is arranged on the top of the AlN barrier layer, the insulating layer is arranged on the top of the AlN barrier layer and only covers the edge of the anode electrode region, and the external electrode region is positioned on the top of the anode electrode region and the insulating layer and is larger than the anode electrode region in size. The process flow is shown in fig. 4, and the preparation method comprises the following steps:
step 1: beta-Ga using low doped epitaxial layer/high doped substrate structure 2 O 3 The epitaxial wafer is subjected to ultrasonic cleaning by acetone, absolute ethyl alcohol and deionized water in sequence;
step 2: in beta-Ga 2 O 3 Spin-coating photoresist on the surface of an epitaxial layer of the epitaxial wafer, and obtaining a groove etching window through electron beam lithography; etching a groove structure by using RIE;
step 3: using ALD technique on beta-Ga 2 O 3 Growing an AlN film on the surface of an epitaxial layer of the epitaxial wafer;
step 4: in beta-Ga 2 O 3 And carrying out ohmic electrode metal deposition on the highly doped substrate area on the back of the epitaxial wafer, and carrying out rapid annealing treatment to form good ohmic contact.
Step 5: in beta-Ga 2 O 3 Uniformly coating photoresist on the front surface of the epitaxial wafer, and forming an anode metal region with an opening through photoetching; depositing Schottky electrode metal in the anode metal region with the holes, and placing a sample into a photoresist remover for lift-0ff stripping to form an anode electrode region;
step 6: growing SiN on sample upper surface using PECVD x An insulating layer;
step 7: continuously uniformly coating photoresist on the front surface of the sample, and forming a photoresist open pore window in the anode electrode region by photoetching technology; siN under split-hole window using ICP etching technique x Etching the insulating layer, and removing photoresist by using photoresist remover after complete etching;
step 8: coating photoresist on the front surface of the sample continuously, and forming a photoresist open pore window with the size larger than that of the anode metal region through alignment; depositing anode metal in the area of the opening, and putting the sample into photoresist remover to lift-0ff for stripping to form an extended metal field plate;
specifically:
step 1: selecting and cleaning beta-Ga 2 O 3 And (5) an epitaxial wafer.
Lightly doped epitaxial layer (Si: 3×10) 16 cm -3 ) Heavily doped linerBottom (Sn: 5×10) 18 cm -3 ) beta-Ga of 10um, 500um respectively 2 O 3 And (3) an epitaxial wafer is subjected to double-sided polishing treatment. Respectively carrying out ultrasonic cleaning for 10min by using acetone, absolute ethyl alcohol and deionized water, and drying by using nitrogen to obtain a clean surface state;
step 2: the trench pattern window is lithographically etched and the trench structure is etched using ICP-RIE.
In beta-Ga 2 O 3 Spin coating photoresist on the surface of an epitaxial layer of the epitaxial wafer; then baking for 240s on a heating plate at 96 ℃ to obtain the photoresist with the thickness of about 1 mu m; and obtaining a groove etching area without photoresist coverage through electron beam lithography. The gate electrode is positioned above the dielectric layer; gallium oxide etching using ICP-RIE system, BCl 3 The Ar gas flow is 35/5sccm,RIE 30W,ICP 200W, and the chamber pressure is 5mtorr. Etching depth is 1 μm;
step 3: an AlN barrier layer is deposited.
Using ALD technique on beta-Ga 2 O 3 Growing AlN film on the epitaxial layer surface of epitaxial wafer with trimethyl aluminum (TMA) and NH 3 As Al and N sources, the growth temperature was set at 375 ℃. Each ALD cycle was pulsed with 0.1sTMA, 6s N 2 Pulse, 1s NH 3 Pulse, 6s N 2 Pulse composition. The film deposition thickness is about 2-5nm.
Step 4: good cathode ohmic contact is obtained.
In beta-Ga 2 O 3 The high doped substrate area on the back of the epitaxial wafer is used for evaporating 50/100nm Ti/Au as ohmic contact metal by using an electron beam evaporation technology, and is rapidly annealed for 90s at 500 ℃ to form good ohmic contact.
Step 5: and realizing anode schottky contact.
In beta-Ga 2 O 3 Uniformly coating photoresist on the front surface of the epitaxial wafer, and forming an anode metal region with an opening at the top of the groove fin through photoetching; depositing 20/20nm Ni/Au structural Schottky metal in the anode metal area with the opening, and putting a sample into a photoresist remover for lift-0ff stripping to form an anode electrode area;
step 6: siNx insulating layer deposition
Deposition of SiNx insulating layer, 5% SiH, on sample upper surface using PECVD 4 ：NH 3 =130: 85sccm, growth temperature 260 ℃, deposition of SiN x The thickness of the insulating layer is 200nm;
step 7: siN on the upper surface of the anode x Etching the insulating layer, uniformly coating photoresist on the front surface of the sample, and forming a photoresist open pore window above the anode electrode region by means of electron beam lithography; siN under split-hole window using ICP etching technique x Etching the insulating layer, and removing photoresist by using photoresist remover after complete etching;
step 8: obtaining external electrode and field plate structure
Coating photoresist on the front surface of the sample continuously, and forming a photoresist open pore window with the size larger than that of the anode metal region through alignment; ni/Au metal with the thickness of 50/100nm is deposited in the area of the opening, and the sample is put into photoresist for lift-0ff stripping, so that an extended metal field plate is formed.
The foregoing description is only a partial embodiment of the present invention, and is not intended to limit the scope of the present invention, and all equivalent devices or equivalent processes using the descriptions and the drawings of the present invention or directly or indirectly applied to other related technical fields are included in the scope of the present invention.
Claims (8)
1. The gallium oxide Schottky diode with the AlN barrier layer is characterized by comprising the AlN barrier layer arranged between the low-doped epitaxial layer and the anode electrode region;
the AlN barrier layer has a thickness of not more than 5nm.
2. A gallium oxide Schottky diode having an AlN barrier layer as defined in claim 1,
the low-doped epitaxial layer and the AlN barrier layer are both of a groove structure.
3. A gallium oxide Schottky diode having an AlN barrier layer as defined in claim 2,
the gallium oxide schottky diode further includes: an insulating layer;
the inner surface of the groove of the AlN barrier layer and the insulating layer form a three-dimensional field plate structure.
4. A gallium oxide Schottky diode having an AlN barrier layer as defined in claim 3,
the insulating layer is arranged on top of the AlN barrier layer and covers only the edge position of the anode electrode region by 5-20 mu m.
5. A gallium oxide Schottky diode having an AlN barrier layer as defined in claim 4,
the gallium oxide schottky diode further includes: an external electrode region;
the external electrode region is positioned on top of the anode electrode region and the insulating layer and has a size larger than that of the anode electrode region.
6. A method for preparing a gallium oxide schottky diode having an AlN barrier layer, characterized by being used for preparing a gallium oxide schottky diode having an AlN barrier layer according to any one of claims 1 to 5, the method comprising:
pretreating the surface of the low-doped epitaxial layer;
after pretreatment, an AlN thin film is grown on the surface by ALD technique.
7. A method of fabricating a gallium oxide Schottky diode having an AlN barrier layer as defined in claim 6,
the pretreatment comprises the following steps: and sequentially carrying out ultrasonic cleaning on the surface of the low-doped epitaxial layer through acetone, absolute ethyl alcohol and deionized water.
8. A method of fabricating a gallium oxide Schottky diode having an AlN barrier layer as defined in claim 6,
the pretreatment comprises the following steps:
spin-coating photoresist on the surface of the low-doped epitaxial layer, and obtaining a groove etching window through electron beam lithography; RIE is used to etch the trench structure in the trench etch window.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311264299.7A CN117293193A (en) | 2023-09-27 | 2023-09-27 | Gallium oxide Schottky diode with AlN barrier layer and preparation method |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202311264299.7A CN117293193A (en) | 2023-09-27 | 2023-09-27 | Gallium oxide Schottky diode with AlN barrier layer and preparation method |
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| CN202311264299.7A Pending CN117293193A (en) | 2023-09-27 | 2023-09-27 | Gallium oxide Schottky diode with AlN barrier layer and preparation method |
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| Country | Link |
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- 2023-09-27 CN CN202311264299.7A patent/CN117293193A/en active Pending
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