CN117119715A - Circuit board local metallization binding layer compression processing technology - Google Patents
Circuit board local metallization binding layer compression processing technology Download PDFInfo
- Publication number
- CN117119715A CN117119715A CN202311374728.6A CN202311374728A CN117119715A CN 117119715 A CN117119715 A CN 117119715A CN 202311374728 A CN202311374728 A CN 202311374728A CN 117119715 A CN117119715 A CN 117119715A
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- Prior art keywords
- circuit board
- edge
- metallization
- copper
- metalized
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Links
- 238000001465 metallisation Methods 0.000 title claims abstract description 41
- 238000012545 processing Methods 0.000 title claims abstract description 28
- 238000005516 engineering process Methods 0.000 title claims abstract description 19
- 230000006835 compression Effects 0.000 title description 5
- 238000007906 compression Methods 0.000 title description 5
- 238000000034 method Methods 0.000 claims abstract description 36
- 238000004519 manufacturing process Methods 0.000 claims abstract description 20
- 238000007688 edging Methods 0.000 claims abstract description 19
- 238000003801 milling Methods 0.000 claims abstract description 13
- 238000005056 compaction Methods 0.000 claims abstract description 11
- 238000005520 cutting process Methods 0.000 claims abstract description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 15
- 229910052802 copper Inorganic materials 0.000 claims description 15
- 239000010949 copper Substances 0.000 claims description 15
- 229910052751 metal Inorganic materials 0.000 claims description 15
- 239000002184 metal Substances 0.000 claims description 15
- 238000003825 pressing Methods 0.000 claims description 10
- 238000005553 drilling Methods 0.000 claims description 6
- 238000000151 deposition Methods 0.000 claims description 5
- 230000008021 deposition Effects 0.000 claims description 5
- 238000009713 electroplating Methods 0.000 claims description 5
- 239000000835 fiber Substances 0.000 claims description 5
- 239000005383 fluoride glass Substances 0.000 claims description 5
- 238000000465 moulding Methods 0.000 claims description 5
- 229920002120 photoresistant polymer Polymers 0.000 claims description 5
- 229910000679 solder Inorganic materials 0.000 claims description 5
- 238000004381 surface treatment Methods 0.000 claims description 5
- 238000012956 testing procedure Methods 0.000 claims description 5
- 238000003754 machining Methods 0.000 claims description 3
- 238000009957 hemming Methods 0.000 claims 5
- 239000000853 adhesive Substances 0.000 abstract description 4
- 230000001070 adhesive effect Effects 0.000 abstract description 4
- 238000007747 plating Methods 0.000 abstract description 4
- 238000003466 welding Methods 0.000 abstract description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 47
- 239000000919 ceramic Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 101001045744 Sus scrofa Hepatocyte nuclear factor 1-beta Proteins 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000007664 blowing Methods 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- LQBJWKCYZGMFEV-UHFFFAOYSA-N lead tin Chemical compound [Sn].[Pb] LQBJWKCYZGMFEV-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 150000003071 polychlorinated biphenyls Chemical class 0.000 description 1
- 238000012805 post-processing Methods 0.000 description 1
- 230000003014 reinforcing effect Effects 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
Abstract
The invention discloses a circuit board local metallization binding layer compaction processing technology, which relates to the technical field of circuit board binding processing, in particular to a circuit board local metallization binding layer compaction processing technology, comprising the following specific steps of the circuit board local metallization binding layer compaction processing technology: s1, arranging a plurality of layers of copper-clad plates on the edge of a circuit board up and down in the vertical direction according to a metallization edging process; s2, performing edge milling processing operation according to the metalized edge covering; s3, cutting edges according to the specific edge covering positions of the copper-clad layers, and thus obtaining the metalized edge covering area with the concave structure. The local metallization bordure layer compaction processing technology of the circuit board enhances the adhesive force of the metallization bordure plating layer, solves the adhesive force problem of the metallization bordure, effectively prevents the side wall plating layer from falling off when tin and lead are blown and welded, and improves the production processing and welding reliability of products.
Description
Technical Field
The invention relates to the technical field of circuit board edging processing, in particular to a circuit board local metallization edging layer compaction processing technology.
Background
The names of the circuit boards are: ceramic circuit boards, alumina ceramic circuit boards, aluminum nitride ceramic circuit boards, PCB boards, aluminum substrates, high frequency boards, thick copper plates, impedance boards, PCBs, ultra-thin circuit boards, printed (copper etching technology) circuit boards, and the like; the circuit board enables the circuit to be miniaturized and visualized, and plays an important role in mass production of fixed circuits and optimizing the layout of electrical appliances; the circuit board can be called a printed circuit board or a printed circuit board, and the English names are PCB, FPC circuit board, soft and hard combined board-FPC and the birth and development of PCB, so that a new product of the soft and hard combined board is generated; therefore, the soft and hard combined board is a circuit board which is formed by combining a flexible circuit board and a hard circuit board together according to related technological requirements through the procedures of pressing and the like and has FPC characteristics and PCB characteristics.
The circuit boards are divided into three major categories of single-panel boards, double-panel boards and multi-layer circuit boards according to the number of layers; firstly, a single panel, wherein on the most basic PCB, parts are concentrated on one surface, and wires are concentrated on the other surface; because the wires are only present on one side, such a PCB is known as a single-sided circuit board; single-sided boards are generally simple to manufacture and low in cost, but have the disadvantage of being not applicable to products that are too complex; the double-sided board is an extension of the single-sided board, and is used when the single-layer wiring cannot meet the requirements of the electronic product; the copper-clad wiring is arranged on both sides, and the circuit between the two layers can be conducted through the via hole so as to form the required network connection; the multi-layer board is a printed board which is formed by laminating more than three conductive pattern layers and insulating materials between the conductive pattern layers at intervals, and the conductive patterns between the conductive pattern layers are interconnected according to requirements; the multilayer circuit board is a product of the development of the electronic information technology in the directions of high speed, multifunction, large capacity, small volume, thinning and light weight; the circuit board is classified into a Flexible Printed Circuit (FPC), a rigid Printed Circuit (PCB), and a flexible-rigid printed circuit (FPCB) according to characteristics.
The prior patent (publication number: CN 114222420A) discloses a circuit board local metallization edging lamination structure and a processing technology thereof, comprising: the novel high-voltage power supply comprises a first core plate, a first non-flowability PP layer, a second core plate, a second non-flowability PP layer and a third core plate which are sequentially arranged from top to bottom, wherein conductive metal strips are formed on the first core plate, the second core plate and the third core plate, a first blind groove is formed on the surface of the first core plate, which faces one side of the second core plate, a second blind groove is formed on the surface of the third core plate, which faces one side of the second core plate, and a first through groove is formed on the first non-flowability PP layer. According to the method, all layers do not need to be subjected to metallization edging in advance, and then the depth control milling is performed to mill redundant layers of metallization edging and then etching is performed, so that the problems that the metallization edging layers are damaged by the milling depth caused by the depth control milling and the quality of unit sizes is affected are avoided, and meanwhile mass production can be realized. However, the traditional circuit board metal edge-covering process is simple to operate, and the metal edge-covering process is easy to fall off in the post-processing process of the circuit board after the metal edge-covering is formed, so that the metal coverage degree of the circuit board edge-covering is affected, and the defects of people's use requirements and the like can not be well met.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a circuit board local metallization edging layer compression processing technology, which solves the problems that the traditional circuit board metal edging technology is simpler to operate, and the metallization edging is easy to fall off in the post circuit board processing process after being molded, thereby influencing the metallization coverage degree of the circuit board edging.
In order to achieve the above purpose, the invention is realized by the following technical scheme: the local metallization binding layer pressing processing technology of the circuit board comprises the following specific steps of:
s1, arranging a plurality of layers of copper-clad plates on the edge of a circuit board up and down in the vertical direction according to a metallization edging process;
s2, performing edge milling processing operation according to the metalized edge covering;
s3, cutting edges according to the specific edge covering positions of the copper-clad layers, thereby obtaining a metalized edge covering area with an inward concave structure;
s4, adopting a plasma photoresist removing method and a fluoride glass fiber removing method for the inwards concave metalized edge covering area to expose the laid copper, and obtaining the inwards concave metalized edge covering area;
s5, sequentially carrying out copper deposition and full-plate electroplating procedures on the circuit board to metalize the plate edge groove and form a metalized plate edge groove;
s6, stacking the circuit boards in order, and placing cushion blocks at the edges of the adjacent circuit boards;
s7, utilizing a press to compress the edge metal wrapping of the circuit board, and improving the bonding degree between the metallized wrapping and the circuit board;
s8, sequentially performing outer layer circuit manufacture, solder mask manufacture and surface treatment on the circuit board;
s9, drilling a row of stamp holes in the connecting position of the circuit board;
s10, routing grooves at two ends of the metalized board edge groove to lengthen the length of the groove to form a target board edge groove, wherein two ends of the target board edge groove are respectively intersected with a stamp hole;
s11, performing molding and testing procedures on the circuit board to finish the manufacture of the PCB.
Optionally, in the step S1, in the metallized wrapping area, the copper-clad layer of the copper-clad plate is laid with copper-clad according to the layout parameters, and the layers of the copper-clad plate are bonded by using a prepreg.
Optionally, the width of the circuit board metallization edge in the step S1 is set to be 0.5-1.5mm, and the copper-clad width of the inner layer is set to be 0.3-1.2mm.
Optionally, the rotary machining diameter of the milling cutter in the step S3 is smaller than the width of the copper-clad edge of the circuit board.
Optionally, the spacer in S5 is a rectangular strip structure, and the stacking upper limit number of the circuit boards is five.
Optionally, the press in S6 is only in contact with the outer surface of the edge metal wrapping of the circuit board in the pressing process.
The invention provides a circuit board local metallization wrapping layer compression processing technology, which has the following beneficial effects:
the local metallization binding layer of the circuit board is pressed and processed,
the groove wall copper layer of the metalized board edge groove is not cut off after drilling, the groove length of the metalized board edge groove is lengthened at two ends of the metalized board edge groove to form a target board edge groove with the end part intersecting with a stamp hole, so that the groove wall copper layer of the metalized board edge groove is cut off, a copper-clad layer for reinforcing the metalized edge is arranged in a metalized edge-wrapping area according to arrangement rules, an embedded structure is formed by the arranged copper-clad structure and the edge-wrapping, the adhesive force of the metalized edge-wrapping plating layer is enhanced, a mechanical compression effect is increased after the original metalized edge-wrapping, the edge of the circuit board edge-wrapping is locally compressed, the adhesive force problem of the metalized edge-wrapping is solved, the side wall plating layer is effectively prevented from falling off when tin-lead blowing and welding are carried out, and the production processing and welding reliability of products are improved.
Detailed Description
The following description of the technical solutions in the embodiments of the present invention will be clear and complete, and it is obvious that the described embodiments are only some embodiments of the present invention, but not all embodiments.
In the description of the present invention, it should be noted that, unless explicitly specified and limited otherwise, the terms "connected," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium. The specific meaning of the above terms in the present invention will be understood in specific cases by those of ordinary skill in the art.
Example 1
The invention provides a technical scheme that: the local metallization binding layer pressing processing technology of the circuit board comprises the following specific steps of:
s1, arranging a plurality of layers of copper-clad plates on the edge of a circuit board up and down in the vertical direction according to a metallization edging process;
s2, performing edge milling processing operation according to the metalized edge covering;
s3, cutting edges according to the specific edge covering positions of the copper-clad layers, thereby obtaining a metalized edge covering area with an inward concave structure;
s4, adopting a plasma photoresist removing method and a fluoride glass fiber removing method for the inwards concave metalized edge covering area to expose the laid copper, and obtaining the inwards concave metalized edge covering area;
s5, sequentially carrying out copper deposition and full-plate electroplating procedures on the circuit board to metalize the plate edge groove and form a metalized plate edge groove;
s6, stacking the circuit boards in order, and placing cushion blocks at the edges of the adjacent circuit boards;
s7, utilizing a press to compress the edge metal wrapping of the circuit board, and improving the bonding degree between the metallized wrapping and the circuit board;
s8, sequentially performing outer layer circuit manufacture, solder mask manufacture and surface treatment on the circuit board;
s9, drilling a row of stamp holes in the connecting position of the circuit board;
s10, routing grooves at two ends of the metalized board edge groove to lengthen the length of the groove to form a target board edge groove, wherein two ends of the target board edge groove are respectively intersected with a stamp hole;
s11, performing molding and testing procedures on the circuit board to finish the manufacture of the PCB.
Example two
The invention provides a technical scheme that: the local metallization binding layer pressing processing technology of the circuit board comprises the following specific steps of:
s1, arranging a plurality of layers of copper-clad plates on the edge of a circuit board up and down in the vertical direction according to a metallization edging process;
s2, performing edge milling processing operation according to the metalized edge covering;
s3, cutting edges according to the specific edge covering positions of the copper-clad layers, thereby obtaining a metalized edge covering area with an inward concave structure;
s4, adopting a plasma photoresist removing method and a fluoride glass fiber removing method for the inwards concave metalized edge covering area to expose the laid copper, and obtaining the inwards concave metalized edge covering area;
s5, sequentially carrying out copper deposition and full-plate electroplating procedures on the circuit board to metalize the plate edge groove and form a metalized plate edge groove;
s6, stacking the circuit boards in order, and placing cushion blocks at the edges of the adjacent circuit boards;
s7, utilizing a press to compress the edge metal wrapping of the circuit board, and improving the bonding degree between the metallized wrapping and the circuit board;
s8, sequentially performing outer layer circuit manufacture, solder mask manufacture and surface treatment on the circuit board;
s9, drilling a row of stamp holes in the connecting position of the circuit board;
s10, routing grooves at two ends of the metalized board edge groove to lengthen the length of the groove to form a target board edge groove, wherein two ends of the target board edge groove are respectively intersected with a stamp hole;
s11, performing molding and testing procedures on the circuit board to finish the manufacture of the PCB.
In this embodiment, in the metallization border area in S1, the copper-clad layer of the copper-clad plate is laid according to the layout parameters, and the layers of the copper-clad plate are bonded by using the prepreg.
In this embodiment, the width of the circuit board metallization edge in S1 is set to 0.5-1.5mm, and the copper-clad width of the inner layer is set to 0.3-1.2mm.
In this embodiment, the rotary machining diameter of the milling cutter in S3 is smaller than the width of the copper clad edge of the circuit board.
In this embodiment, the pads in S5 are rectangular structures, and the upper stacking limit number of the circuit boards is five.
In this embodiment, the press in S6 is in contact with and bonded to only the outer surface of the edge metal covering of the circuit board during the pressing process
Example III
The invention provides a technical scheme that: the local metallization binding layer pressing processing technology of the circuit board comprises the following specific steps of:
s1, arranging a plurality of layers of copper-clad plates on the edge of a circuit board up and down in the vertical direction according to a metallization edging process, arranging copper-clad layers of the copper-clad plates according to arrangement parameters in a metallization edging area, bonding interlayer of the copper-clad plates by using prepreg, wherein the width of the metallization edging of the circuit board is set to be 0.8mm, and the copper-clad width of the inner layer is set to be 0.5mm;
s2, performing edge milling processing operation according to the metalized edge covering;
s3, cutting edges according to the specific edge-covering positions of the copper-clad layers, thereby obtaining a metalized edge-covering area with an inward concave structure, wherein the rotary processing diameter of the milling cutter is smaller than the width of the copper-clad edge of the circuit board;
s4, adopting a plasma photoresist removing method and a fluoride glass fiber removing method for the inwards concave metalized edge covering area to expose the laid copper, and obtaining the inwards concave metalized edge covering area;
s5, sequentially carrying out copper deposition and full-plate electroplating procedures on the circuit board to metalize the plate edge groove and form a metalized plate edge groove;
s6, stacking the circuit boards in order, placing cushion blocks at the edges of the adjacent circuit boards, wherein the cushion blocks are rectangular structures in strip shape, the circuit boards are stacked in four, and the cushion blocks are distributed in a staggered manner;
s7, utilizing a press to compress the edge metal wrapping of the circuit board, and improving the bonding degree between the metallized wrapping and the circuit board, wherein the press is only in contact bonding with the outer surface of the edge metal wrapping of the circuit board in the pressing process;
s8, sequentially performing outer layer circuit manufacture, solder mask manufacture and surface treatment on the circuit board;
s9, drilling a row of stamp holes in the connecting position of the circuit board;
s10, routing grooves at two ends of the metalized board edge groove to lengthen the length of the groove to form a target board edge groove, wherein two ends of the target board edge groove are respectively intersected with a stamp hole;
s11, performing molding and testing procedures on the circuit board to finish the manufacture of the PCB.
The foregoing is only a preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art, who is within the scope of the present invention, should make equivalent substitutions or modifications according to the technical scheme of the present invention and the inventive concept thereof, and should be covered by the scope of the present invention.
Claims (6)
1. The local metallization edging layer compaction processing technology of the circuit board is characterized in that: the circuit board local metallization wrapping layer pressing processing technology comprises the following specific steps:
s1, arranging a plurality of layers of copper-clad plates on the edge of a circuit board up and down in the vertical direction according to a metallization edging process;
s2, performing edge milling processing operation according to the metalized edge covering;
s3, cutting edges according to the specific edge covering positions of the copper-clad layers, thereby obtaining a metalized edge covering area with an inward concave structure;
s4, adopting a plasma photoresist removing method and a fluoride glass fiber removing method for the inwards concave metalized edge covering area to expose the laid copper, and obtaining the inwards concave metalized edge covering area;
s5, sequentially carrying out copper deposition and full-plate electroplating procedures on the circuit board to metalize the plate edge groove and form a metalized plate edge groove;
s6, stacking the circuit boards in order, and placing cushion blocks at the edges of the adjacent circuit boards;
s7, utilizing a press to compress the edge metal wrapping of the circuit board, and improving the bonding degree between the metallized wrapping and the circuit board;
s8, sequentially performing outer layer circuit manufacture, solder mask manufacture and surface treatment on the circuit board;
s9, drilling a row of stamp holes in the connecting position of the circuit board;
s10, routing grooves at two ends of the metalized board edge groove to lengthen the length of the groove to form a target board edge groove, wherein two ends of the target board edge groove are respectively intersected with a stamp hole;
s11, performing molding and testing procedures on the circuit board to finish the manufacture of the PCB.
2. The circuit board partial metallization hemming layer compaction process of claim 1 wherein: in the step S1, in the metallized wrapping area, copper-clad layers of the copper-clad plate are laid according to layout parameters, and the layers of the copper-clad plate are bonded by prepregs.
3. The circuit board partial metallization hemming layer compaction process of claim 1 wherein: the width of the circuit board metallization edge in the S1 is set to be 0.5-1.5mm, and the copper-clad width of the inner layer is set to be 0.3-1.2mm.
4. The circuit board partial metallization hemming layer compaction process of claim 1 wherein: and (3) the rotary machining diameter of the milling cutter in the step (S3) is smaller than the width of the copper-clad edge of the circuit board.
5. The circuit board partial metallization hemming layer compaction process of claim 1 wherein: the cushion block in the step S5 is a strip-shaped rectangular structural body, and the stacking upper limit number of the circuit boards is five.
6. The circuit board partial metallization hemming layer compaction process of claim 1 wherein: and the press in the step S6 is only in contact fit with the outer surface of the edge metal wrapping of the circuit board in the pressing process.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311374728.6A CN117119715A (en) | 2023-10-23 | 2023-10-23 | Circuit board local metallization binding layer compression processing technology |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311374728.6A CN117119715A (en) | 2023-10-23 | 2023-10-23 | Circuit board local metallization binding layer compression processing technology |
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| Publication Number | Publication Date |
|---|---|
| CN117119715A true CN117119715A (en) | 2023-11-24 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202311374728.6A Pending CN117119715A (en) | 2023-10-23 | 2023-10-23 | Circuit board local metallization binding layer compression processing technology |
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