CN117116963A - Micro light-emitting module, display device and preparation method of micro light-emitting module - Google Patents
Micro light-emitting module, display device and preparation method of micro light-emitting module Download PDFInfo
- Publication number
- CN117116963A CN117116963A CN202311164865.7A CN202311164865A CN117116963A CN 117116963 A CN117116963 A CN 117116963A CN 202311164865 A CN202311164865 A CN 202311164865A CN 117116963 A CN117116963 A CN 117116963A
- Authority
- CN
- China
- Prior art keywords
- light emitting
- groove structure
- driving unit
- unit
- emitting module
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000002360 preparation method Methods 0.000 title claims abstract description 24
- 239000000758 substrate Substances 0.000 claims abstract description 168
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 101
- 229910052710 silicon Inorganic materials 0.000 claims description 101
- 239000010703 silicon Substances 0.000 claims description 101
- 239000013078 crystal Substances 0.000 claims description 74
- 238000005530 etching Methods 0.000 claims description 50
- 238000004519 manufacturing process Methods 0.000 claims description 35
- 238000000034 method Methods 0.000 claims description 28
- 230000001154 acute effect Effects 0.000 claims description 13
- 238000004378 air conditioning Methods 0.000 claims description 4
- 239000010410 layer Substances 0.000 description 176
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 85
- 229910002601 GaN Inorganic materials 0.000 description 75
- 238000010586 diagram Methods 0.000 description 33
- 239000000243 solution Substances 0.000 description 24
- 229920002120 photoresistant polymer Polymers 0.000 description 9
- 210000004027 cell Anatomy 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 7
- 238000002161 passivation Methods 0.000 description 7
- 239000004065 semiconductor Substances 0.000 description 7
- 238000009792 diffusion process Methods 0.000 description 6
- 239000000463 material Substances 0.000 description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
- 238000006243 chemical reaction Methods 0.000 description 5
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 5
- 238000000347 anisotropic wet etching Methods 0.000 description 4
- 238000000206 photolithography Methods 0.000 description 4
- 229910052594 sapphire Inorganic materials 0.000 description 4
- 239000010980 sapphire Substances 0.000 description 4
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 4
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 description 4
- 230000003190 augmentative effect Effects 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 3
- 230000005669 field effect Effects 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 239000002096 quantum dot Substances 0.000 description 3
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 3
- 238000003860 storage Methods 0.000 description 3
- 229910002704 AlGaN Inorganic materials 0.000 description 2
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 238000004020 luminiscence type Methods 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 238000003892 spreading Methods 0.000 description 2
- PIICEJLVQHRZGT-UHFFFAOYSA-N Ethylenediamine Chemical compound NCCN PIICEJLVQHRZGT-UHFFFAOYSA-N 0.000 description 1
- 240000002329 Inga feuillei Species 0.000 description 1
- 108010075750 P-Type Calcium Channels Proteins 0.000 description 1
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000009194 climbing Effects 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000005566 electron beam evaporation Methods 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 230000006911 nucleation Effects 0.000 description 1
- 238000010899 nucleation Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 241000894007 species Species 0.000 description 1
- 229910002058 ternary alloy Inorganic materials 0.000 description 1
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
- H01L27/0922—Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Theoretical Computer Science (AREA)
- Led Devices (AREA)
Abstract
The application provides a miniature light-emitting module, a display device and a preparation method of the miniature light-emitting module. Based on the structure, the miniature light-emitting module can realize a CMOS circuit structure and a GaN-based LED unit on the same substrate, and has the advantages of simple structure, simple preparation process and smaller thickness.
Description
Technical Field
The present application relates to the field of semiconductor display devices, and more particularly, to a micro light emitting module, a display device and a method for manufacturing the micro light emitting module.
Background
With the gradual development of display technology, a Micro light emitting diode display (Micro Light Emitting Diode Display, abbreviated as Micro LED display) gradually becomes a novel display device due to the advantages of low power consumption, long service life, high brightness and the like.
However, with the development of electronic technology, light and thin Micro LED displays are more popular in the market. At present, the thickness of the Micro LED display in the related art is thicker, and how to realize a thinner Micro LED display becomes a difficult problem.
Disclosure of Invention
The application aims to provide a Micro light-emitting module, a display device and a preparation method of the Micro light-emitting module, wherein the Micro light-emitting module and the display device have smaller thickness and can solve the problem of large thickness of a Micro LED display in the related technology.
In a first aspect, the present application provides a micro light emitting module, comprising:
the substrate is provided with a first groove structure, the first groove structure comprises a bearing surface and a first side surface, and the first side surface is obliquely connected with the bearing surface;
the driving unit is arranged on the bearing surface; a kind of electronic device with high-pressure air-conditioning system
The display unit is arranged on the first side face and comprises an epitaxial structure and an electrode, and the epitaxial structure is electrically connected to the driving unit through the electrode so that the driving unit drives the display unit to emit light.
Optionally, the bearing surface includes at least two first connection surfaces, the first groove structure includes at least two first side surfaces, at least two first side surfaces are connected with each other, each first connection surface is connected with one first side surface in an inclined manner, and different first connection surfaces are connected with different first side surfaces in an inclined manner;
The driving unit is arranged on at least one first connecting surface.
Optionally, the bearing surface includes a bottom surface and a first connection surface, the first connection surface is parallel to the bottom surface, and the first side surface is obliquely connected with the bottom surface and the first connection surface respectively;
wherein, at least one of the first connecting surface and the bottom surface is provided with the driving unit.
Optionally, a second groove structure is further formed on the substrate, and the second groove structure includes at least two second connection surfaces and at least two second side surfaces, at least two second side surfaces are connected with each other, each second connection surface is obliquely connected with one second side surface, and different second connection surfaces are obliquely connected with different second side surfaces;
wherein the driving unit is arranged on at least one second connecting surface, and/or the display unit is arranged on at least one second side surface.
Optionally, the micro light emitting module includes a plurality of driving units and a plurality of display units, and the driving units are electrically connected with the display units by adopting at least one of the following electrical connection modes:
in one of the first groove structures, the epitaxial structure is electrically connected to at least one of the driving units through the electrode, so that the driving unit drives the display unit to emit light;
When a plurality of first groove structures are formed on the substrate, the epitaxial structure in one first groove structure is electrically connected with at least one driving unit in the other first groove structures through the electrode, so that the driving unit drives the display unit to emit light;
in one of the second groove structures, the epitaxial structure is electrically connected to at least one of the driving units through the electrode, so that the driving unit drives the display unit to emit light;
when a plurality of second groove structures are formed on the substrate, the epitaxial structure in one second groove structure is electrically connected with at least one driving unit in the other second groove structures through the electrode, so that the driving unit drives the display unit to emit light;
the epitaxial structure in one second groove structure is electrically connected with at least one driving unit in at least one first groove structure through the electrode, so that the driving unit drives the display unit to emit light;
the epitaxial structure in one first groove structure is electrically connected with at least one driving unit in at least one second groove structure through the electrode, so that the driving unit drives the display unit to emit light.
Optionally, the display unit includes a light emitting surface; the miniature light emitting module further comprises:
the first dimming unit is arranged in the second groove structure and comprises a first dimming surface, the first dimming surface and the light emitting surface are oppositely arranged in the second groove structure, and the included angle between the first dimming surface and the light emitting surface is an acute angle.
Optionally, the display unit includes a light emitting surface; the miniature light emitting module further comprises:
the second dimming unit is arranged in the first groove structure and comprises a second dimming surface, the second dimming surface and the light emitting surface are oppositely arranged in the first groove structure, and an included angle between the second dimming surface and the light emitting surface is an acute angle.
Optionally, the first side is a crystal orientation plane of the silicon wafer (111), and the bearing surface is a crystal orientation surface of the silicon wafer (100) or a crystal orientation surface of the silicon wafer (110).
Optionally, the epitaxial structure comprises an intrinsic GaN layer, an N-type GaN layer, a multiple quantum well layer and a P-type GaN layer which are sequentially stacked; the electrode comprises a P electrode and an N electrode, wherein the P electrode is electrically connected with the P-type GaN layer, and the N electrode is electrically connected with the N-type GaN layer; and/or the number of the groups of groups,
The driving unit is a PMOS unit or an NMOS unit.
In a second aspect, the present application also provides a display device, including:
a micro light emitting module as described above; a kind of electronic device with high-pressure air-conditioning system
And the control circuit is electrically connected with each driving unit so as to control the light-emitting state of the display unit through the driving units.
In a third aspect, the present application further provides a method for manufacturing a micro light emitting module, including:
forming a first groove structure on a substrate; the first groove structure comprises a bearing surface and a first side surface, and the first side surface is obliquely connected with the bearing surface;
forming a first insulating layer on the bearing surface;
epitaxially growing an epitaxial structure on the first side and forming an electrode to form a display unit;
removing the first insulating layer and forming a driving unit on the bearing surface;
and the epitaxial structure is electrically connected with the driving unit through the electrode so that the driving unit drives the display unit to emit light.
Optionally, the bearing surface includes at least two first connection surfaces, the first groove structure includes at least two first side surfaces, at least two first side surfaces are connected with each other, each first connection surface is connected with one first side surface in an inclined manner, and different first connection surfaces are connected with different first side surfaces in an inclined manner;
The forming of the driving unit on the bearing surface comprises:
a drive unit is formed on at least one of the first connection surfaces.
Optionally, the bearing surface includes a bottom surface and a first connection surface, the first connection surface is parallel to the bottom surface, and the first side surface is obliquely connected with the bottom surface and the first connection surface respectively;
said forming said drive unit on said bearing surface, comprising:
the driving unit is formed on at least one of the first connection surface and the bottom surface.
Optionally, the preparation method further comprises:
forming a second groove structure on the substrate; the second groove structure comprises at least two second connecting surfaces and at least two second side surfaces, wherein the at least two second side surfaces are connected with each other, each second connecting surface is obliquely connected with one second side surface, and different second connecting surfaces are connected with different second side surfaces;
forming a second insulating layer on the second connection surface;
epitaxially growing an epitaxial structure on the second side and forming electrodes to form a display unit;
removing the second insulating layer and forming a driving unit on the second connection surface;
And the epitaxial structure is electrically connected with the driving unit through the electrode so that the driving unit drives the display unit to emit light.
Optionally, the forming a first groove structure on the substrate includes:
forming a first mask layer with an opening on the substrate; etching the substrate through an anisotropic etching solution; removing the first mask layer to form a first groove structure on the substrate;
and/or the number of the groups of groups,
the forming a second groove structure on the substrate comprises the following steps:
forming a second mask layer with an opening on the substrate; etching the substrate through an anisotropic etching solution; and removing the second mask layer to form a second groove structure on the substrate.
Optionally, the display unit includes a light emitting surface; the preparation method further comprises the following steps:
providing a first dimming unit in at least one of the second groove structures; the first dimming unit comprises a first dimming surface, the first dimming surface and the light-emitting surface are oppositely arranged in the second groove structure, and an included angle between the first dimming surface and the light-emitting surface is an acute angle.
Optionally, the display unit includes a light emitting surface; the preparation method further comprises the following steps:
Providing a second dimming unit in at least one of the first groove structures; the second dimming unit comprises a second dimming surface, the second dimming surface and the light-emitting surface are oppositely arranged in the first groove structure, and an included angle between the second dimming surface and the light-emitting surface is an acute angle.
Optionally, the first side is a crystal orientation plane of the silicon wafer (111), and the bearing surface is a crystal orientation surface of the silicon wafer (100) or a crystal orientation surface of the silicon wafer (110).
Optionally, the driving unit is a PMOS unit or an NMOS unit;
and/or the number of the groups of groups,
the epitaxially growing an epitaxial structure on the first side includes:
and sequentially epitaxially growing an intrinsic GaN layer, an N-type GaN layer, a multiple quantum well layer and a P-type GaN layer on the first side surface.
Based on the above technical scheme, the Micro light emitting module of the present application forms the first groove structure on the substrate, the bearing surface of the first groove structure is obliquely connected with the first side, the driving unit can be arranged on the bearing surface, and the display unit can be arranged on the first side, so that the Micro light emitting module of the present application can form the driving unit and the display unit on the same substrate, the driving unit and the display unit do not need to be arranged on two substrates, and compared with the scheme that the Micro LED display of the related art forms the CMOS circuit structure and the GaN-based LED unit on two substrates respectively, the thickness of the driving unit and the display unit of the present application does not need to be arranged on two substrates, and the thickness of the Micro light emitting module is significantly smaller than that of the Micro LED display of the related art. Therefore, the thickness of the miniature light-emitting module is thinner, and the miniature light-emitting module can realize light and thin design. In addition, as the first side surface of the first groove structure is obliquely connected with the bearing surface, the display unit arranged on the first side surface can be positioned in the first groove structure, and the display unit does not additionally increase the size of the Micro light-emitting module in the thickness direction.
Drawings
In order to more clearly illustrate the technical solutions of the present application, the drawings that are used in the description of the embodiments will be briefly described below. It is evident that the drawings in the following description are only some embodiments of the application and that other drawings may be obtained from these drawings without inventive effort for a person skilled in the art.
For a more complete understanding of the present application and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which like reference numerals represent like parts throughout the following description.
Fig. 1 is a schematic diagram of a first structure of a micro light emitting module according to an embodiment of the present application.
Fig. 2 is a schematic structural diagram of a substrate of a micro light emitting module according to an embodiment of the present application forming different silicon wafer crystal orientation planes.
Fig. 3 is a schematic diagram of a manufacturing process of forming a first groove structure on a substrate of a micro light emitting module according to an embodiment of the present application.
Fig. 4 is a schematic diagram of a first structure of a first groove structure formed on a substrate of a micro light emitting module according to an embodiment of the present application.
Fig. 5 is a schematic cross-sectional view of the first groove structure shown in fig. 4 along A1-A2 direction.
Fig. 6 is a schematic diagram of a second structure of a first groove structure formed on a substrate of a micro light emitting module according to an embodiment of the present application.
Fig. 7 is a schematic cross-sectional view of the first groove structure shown in fig. 6 along the direction B1 to B2.
Fig. 8 is a schematic structural diagram of a display unit of a micro light emitting module according to an embodiment of the application.
Fig. 9 is a schematic diagram of a second structure of a micro light emitting module according to an embodiment of the application.
Fig. 10 is a schematic view of an optical path of the micro light emitting module shown in fig. 9.
Fig. 11 is a schematic diagram of a third structure of a micro light emitting module according to an embodiment of the application.
Fig. 12 is a schematic structural diagram of a second groove structure of a micro light emitting module according to an embodiment of the present application.
Fig. 13 is an electrical connection schematic diagram of a micro light emitting module according to an embodiment of the application.
Fig. 14 is a schematic diagram of a fourth structure of a micro light emitting module according to an embodiment of the application.
Fig. 15 is a schematic diagram of a fifth structure of a micro light emitting module according to an embodiment of the application.
Fig. 16 is a schematic structural diagram of a display device according to an embodiment of the present application.
Fig. 17 is a schematic flow chart of a first method for manufacturing a micro light emitting module according to an embodiment of the present application.
Fig. 18 is a schematic diagram of a manufacturing process of a display unit of a micro light emitting module according to an embodiment of the application.
Fig. 19 is a schematic diagram of a manufacturing process of a driving unit of a micro light emitting module according to an embodiment of the application.
Fig. 20 is a schematic structural diagram of two driving units of the micro light emitting module according to an embodiment of the present application.
The reference numerals are expressed as:
10. a display device; 100. A micro light emitting module; 200. A control circuit;
110. a substrate; 120. A driving unit; 130. A display unit;
140. a second dimming unit; 150. A first dimming unit; 111. A first groove structure;
112. a second groove structure; 131. An epitaxial structure; 132. An electrode;
161. a first mask layer; 162. Opening holes; 163. A first insulating layer;
171. a photoresist layer; 172. SiO (SiO) 2 A layer; 173. SiN (SiN) x A layer;
174. a gate layer; 175. An electrode layer; 1110. A bearing surface;
1111. a bottom surface; 1112. A first side; 1113. A first connection surface;
1121. a second side; 1122. A second connection surface; 1311. An intrinsic GaN layer;
1312. An N-type GaN layer; 1313. A multiple quantum well layer; 1314. A P-type GaN layer;
1315. a current diffusion layer; 1316. A passivation layer; 1321. A P electrode;
1322. and an N electrode.
Detailed Description
The technical solutions of the present application will be clearly and completely described below with reference to fig. 1 to 20 of the present application. It will be apparent that the described embodiments are only some, but not all, embodiments of the application. All other embodiments, which can be made by a person skilled in the art without any inventive effort, are intended to be within the scope of the present application based on the embodiments of the present application.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
The embodiment of the application provides a micro light emitting module 100, a display device 10 and a manufacturing method of the micro light emitting module 100, wherein the display device 10 comprises the micro light emitting module 100, and the micro light emitting module 100 can emit light so that the display device 10 can display information such as images, texts and the like. The Micro Light Emitting module 100 may be, but not limited to, a gallium nitride (GaN) -based LED Light Emitting module, and the display device 10 may be, but not limited to, a Micro LED display device or an Organic Light-Emitting Diode (OLED) display device.
Referring to fig. 1, fig. 1 is a schematic diagram of a first structure of a micro light emitting module 100 according to an embodiment of the application. The micro light emitting module 100 includes a substrate 110, a driving unit 120, and a display unit 130.
The substrate 110 may have a first groove structure 111 formed thereon, the first groove structure 111 including a bearing surface 1110 and a first side surface 1112, the first side surface 1112 being obliquely connected to the bearing surface 1110. The driving unit 120 is disposed on the supporting surface 1110, and the display unit 130 is disposed on the first side surface 1112. The display unit 130 includes an epitaxial structure and electrodes (e.g., an epitaxial structure 131 and an electrode 132 as shown in fig. 8 hereinafter), and the epitaxial structure 131 is electrically connected to the driving unit 120 through the electrode 132 to cause the driving unit 120 to drive the display unit 130 to emit light. Wherein, the epitaxial structure 131 may be a GaN epitaxial structure; of course, epitaxial structure 131 may also be other structures such as, but not limited to, a silicon dioxide epitaxial structure.
It is appreciated that one or more (a plurality of two or more) first groove structures 111 may be formed on the substrate 110, and each first groove structure 111 may include a bearing surface 1110 and a first side surface 1112. The micro light emitting module 100 may further include one or more driving units 120 and one or more display units 130. One or more driving units 120 may form a driving structure of the micro light emitting module 100, and at least one driving unit 120 may be disposed on the carrying surface 1110. One or more display units 130 may form a display structure of the micro light emitting module 100, and at least one display unit 130 is disposed on the first side 1112. Each display unit 130 may include an epitaxial structure 131 and an electrode 132, and the epitaxial structure 131 is electrically connected to at least one driving unit 120 through the electrode 132, so that the driving unit 120 drives the display unit 130 to emit light.
It will be appreciated that, as shown in fig. 1, the bearing surface 1110 of each first groove structure 111 may include a bottom surface 1111 and one or more first connection surfaces 1113, each first connection surface 1113 is parallel to the bottom surface 1111, all the first connection surfaces 1113 may be coplanar, and each first side 1112 (e.g., two ends of each first side 1112) may be respectively connected with the bottom surface 1111 and one first connection surface 1113 in an inclined manner, so that the bottom surface 1111 may be a bottom wall of the first groove structure 111, and the first side 1112 may be a side wall of the first groove structure 111.
It is understood that the substrate 110 may have an epitaxial layer thereon, which may include a silicon wafer (100) wafer oriented surface, or which may include a silicon wafer (110) wafer oriented surface, or which may include both a silicon wafer (100) wafer oriented surface and a silicon wafer (110) wafer oriented surface. The first recess structure 111 may be formed on the epitaxial layer and the substrate 110 (it should be noted that the substrate 110 illustrated in the drawings of the present application may be the substrate 110 including the epitaxial layer).
It is appreciated that the first side 1112 is the wafer (111) orientation plane of the silicon wafer. The bearing surface 1110 may have the same crystal orientation as the epitaxial layer of the substrate 110, and the bearing surface 1110 may be a silicon wafer (100) crystal orientation plane or a silicon wafer (110) crystal orientation plane. For example, the first connection surface 1113 and the bottom surface 1111 may each be a silicon wafer (100) orientation plane or a silicon wafer (110) orientation plane. When the substrate 110 has a silicon wafer (100) orientation surface formed thereon, the first connection surface 1113 and the bottom surface 1111 of the first groove structure 111 may be a silicon wafer (100) orientation plane, and the first side surface 1112 may be a silicon wafer (111) orientation plane. When the silicon wafer (110) is formed on the substrate 110, the first connection surface 1113 and the bottom surface 1111 of the first groove structure 111 are the silicon wafer (110) crystal orientation planes, and the first side surface 1112 is still the silicon wafer (111) crystal orientation plane.
It is understood that a silicon wafer refers to a long silicon ingot made of pure silicon after purifying (99.999%) silicon element, and is subjected to photolithography, grinding, polishing, slicing, etc. to melt polycrystalline silicon into a single crystal silicon ingot, which is then cut into thin wafer structures. The direction of a silicon wafer is also known as crystal orientation (Direction orientation of the crystal) or crystal orientation (crystallographic orientation), and generally refers to the family direction of the unit cell planes such as (100), (110) or (111). The three numbers in brackets are miller indices. As shown in fig. 2, fig. 2 is a schematic structural diagram of forming different silicon wafer orientation planes on a substrate 110 of a micro light emitting module 100 according to an embodiment of the present application, and as shown in a substrate 110a in fig. 2, a silicon wafer (100) orientation plane may be formed on the substrate 110a, where a unit cell surface of a silicon crystal of the silicon wafer (100) orientation plane is a prismatic surface parallel to a surface of the substrate 110a, and the oriented silicon crystal has the highest electron conductivity and is most commonly used for manufacturing components with high electron compliance in an integrated circuit. As shown in the substrate 110b in fig. 2, a crystal orientation plane of the silicon wafer (110) may be formed on the substrate 110b, and a prismatic surface of a unit cell surface in the silicon crystal of the crystal orientation plane of the silicon wafer (110) forms an angle of 45 degrees with the crystal orientation plane of the silicon wafer (100), and the oriented silicon crystal has a higher leakage current density and is generally used for manufacturing MOS field effect transistors and photoelectric converters. As shown in the substrate 110c in fig. 2, a crystal orientation plane of the silicon wafer (111) may be formed on the substrate 110c, and a prismatic surface of a unit cell surface in a silicon crystal of the crystal orientation plane of the silicon wafer (111) forms an angle of 54.7 degrees with the crystal orientation plane of the silicon wafer (100), so that the dissipation factor of the oriented silicon crystal is smaller, which is generally used for manufacturing devices such as solar cells.
It will be appreciated that in the related art, silicon carbide (SiC), sapphire and silicon wafer substrates are typically selected for GaN epitaxial growth to form the LED pixel array structure. Wherein, the lattice structures of the SiC structure and the GaN structure are most similar, so that the SiC structure and the GaN structure are most suitable for growing the GaN structure; however, siC structures are expensive and difficult to form into large area substrates. The lattice structures of the sapphire structure and the GaN structure are similar, but the similarity of the sapphire structure and the GaN structure is lower than that of the SiC structure and the GaN structure, and the sapphire structure has poor heat dissipation. The difference between the lattice structures of the silicon wafer and the GaN structure is the largest, so that the grown GaN structure is easy to generate stress and defects, but the silicon wafer has the advantages of low cost, good heat dissipation and capability of being used as a large-area substrate, and the silicon wafer can be used for manufacturing a CMOS circuit at the same time. The difference between the crystal orientation plane of the silicon wafer (111) and the lattice parameter of the GaN structure is the smallest, and in the related art, the GaN structure is epitaxially grown on the crystal orientation plane of the silicon wafer (111) to form the LED pixel array structure. However, from the viewpoint of CMOS circuits, a silicon wafer substrate in the crystal orientation of the silicon wafer (100) or a silicon wafer substrate in the crystal orientation of the silicon wafer (110) is generally selected to produce and process CMOS circuits.
It will be appreciated that the related art Micro LED type display device often forms a Micro LED pixel array on a substrate in a wafer (111) direction of a silicon wafer, forms a CMOS circuit on a substrate in a wafer (100) direction of a silicon wafer or a substrate in a wafer (110) direction of a silicon wafer, and then inverts one of the substrates and electrically connects the Micro LED pixel arrays on the two substrates with the CMOS circuit, so that the Micro LED pixel array can emit light under the driving of the CMOS circuit. However, in the production process of the Micro LED display device in the related art, two substrates are required to be combined, which not only makes the process flow of the Micro LED display device more complex, but also makes the thickness of the Micro LED display device larger, which is not beneficial to the production of the Micro LED display device and the miniaturization design of the Micro LED display device.
In the Micro light emitting module 100 of the present application, at least one first groove structure 111 may be formed on the substrate 110, the bearing surface 1110 of the first groove structure 111 is obliquely connected to the first side 1112, at least one driving unit 120 may be disposed on the bearing surface 1110, and at least one display unit 130 may be disposed on the first side 1112, so that the Micro light emitting module 100 of the present application may form the driving unit 120 and the display unit 130 on the same substrate 110, the driving unit 120 and the display unit 130 do not need to be disposed on two substrates, and compared with the solution that Micro LED displays of the related art form CMOS circuit structures and GaN-based LED units on two substrates, the driving unit 120 and the display unit 130 of the present application do not need to be disposed on two substrates, and the thickness of the Micro light emitting module 100 is significantly smaller than that of Micro LED displays of the related art. Thus, the thickness of the micro light emitting module 100 is smaller, and the micro light emitting module 100 can be designed to be light and thin. In addition, since the first side 1112 of the first groove structure 111 is obliquely connected with the carrying surface 1110, the display unit 130 disposed on the first side 1112 can be located inside the first groove structure 111, and the display unit 130 does not additionally increase the dimension of the Micro light emitting module 100 in the thickness direction, compared with the scheme of the Micro LED display in the related art, the layout of the first groove structure 111 and the display unit 130 in the present application can reduce the thickness of the Micro light emitting module 100, and the Micro light emitting module 100 can realize a light and thin design.
The micro light emitting module 100 according to the embodiment of the present application may be formed by etching one or more first recess structures 111 on the substrate 110 (and an epitaxial layer formed on the substrate 110) by using a single crystal silicon anisotropic wet etching method. For example, as shown in fig. 3, fig. 3 is a schematic diagram illustrating a process for forming the first groove structure 111 on the substrate 110 of the micro light emitting module 100 according to an embodiment of the present application, a layer of first mask layer 161 may be formed on the surface of the substrate 110, then an opening 162 is formed on the first mask layer 161, then one or more first groove structures 111 are etched on the substrate 110 at the opening 162 by using an anisotropic etching solution, and finally the remaining first mask layer 161 is removed, so that one or more first groove structures 111 may be etched on the substrate 110, and each first groove structure 111 may be a groove structure formed on the substrate 110 by using the anisotropic etching solution.
It is to be appreciated that the first mask layer 161 can be, but is not limited to, silicon dioxide (SiO 2 ) The mask structure, the first mask layer 161 may be provided with openings 162 by, but not limited to, photolithographic etching techniques. The photolithography technique is a technique of transferring a pattern on the first mask layer 161 to the substrate 110 by a photoresist (also called photoresist) under light irradiation. The main process is as follows: ultraviolet light is irradiated to the surface of the substrate 110 attached with a photoresist film through the first mask layer 161, causing a chemical reaction of the photoresist in the exposed area; then the photoresist in the exposed area or the unexposed area is dissolved and removed by a developing technology, so that the pattern on the mask plate is copied to the photoresist film; finally, the pattern is transferred to the substrate 110 using an etching technique, thereby forming one or more first recess structures 111 on the substrate 110.
It will be appreciated that anisotropic wet etching is also known as anisotropic etching, i.e. a scheme in which etching is performed at different rates in different crystallographic directions. The etching speeds of various crystal faces of the monocrystalline silicon in the etching solution are different, and the etching speeds of certain crystal faces are high and the etching speeds of certain crystal faces are low. For example, the etching solution has a greater etching rate in the crystal plane of the silicon wafer (110) than in the crystal plane of the silicon wafer (100), and the etching solution has a greater etching rate in the crystal plane of the silicon wafer (100) than in the crystal plane of the silicon wafer (111). The first groove structure 111 having different crystal orientation crystal planes may be etched on the substrate 110 by using the characteristic that etching solutions have different etching speeds at different crystal planes.
It is understood that the anisotropic etching solution may be, but is not limited to, an etching solution including tetramethylammonium hydroxide (TMAH), ethylene Diamine (EDP), potassium hydroxide (KOH), ammonia (NH) 4 OH) one or more of the etching solutions; the substrate 110 may be etched by one of the above-mentioned etching solutions to form a first groove structure 111; alternatively, the substrate 110 may be etched for a certain period of time by one etching solution, and then etched for another period of time by another etching solution, and finally the first groove structure 111 is formed.
It is understood that when one or more first groove structures 111 are etched into the substrate 110, each first groove structure 111 may include a plurality of first sides 1112 and a plurality of first connection surfaces 1113. For example, referring to fig. 4 and fig. 5, fig. 4 is a schematic structural diagram of a first groove structure 111 formed on a substrate 110 of a micro light emitting module according to an embodiment of the present application, fig. 5 is a schematic sectional view of the first groove structure 111 along A1-A2 direction shown in fig. 4, when at least one first groove structure 111 is formed on the substrate 110 with an epitaxial layer on a crystal orientation surface of a silicon wafer (100) formed thereon, the first groove structure 111 may include a bottom surface 1111, four first side surfaces 1112 and four first connection surfaces 1113, and a bearing surface 1110 of the first groove structure 111 may include the bottom surface 1111 and four first connection surfaces 1113; the bottom surface 1111 may be a rectangular structure, four first side surfaces 1112 may be connected to four edges of the bottom surface 1111 in a one-to-one correspondence, and four first connection surfaces 1113 are connected to four first side surfaces 1112 in a one-to-one correspondence, such that one end of each first side surface 1112 is obliquely connected to one edge of the bottom surface 1111, the other end of each first side surface 1112 is obliquely connected to one first connection surface 1113, different first side surfaces 1112 are obliquely connected to different edges of the bottom surface 1111, and different first side surfaces 1112 are also obliquely connected to different first connection surfaces 1113. Wherein the bottom surface 1111 and the four first connection surfaces 1113 may be parallel to each other and be a crystal orientation plane of the silicon wafer (100), and an inclination angle between each of the first side surfaces 1112 and the bottom surface 1111 may be 54.7 °, such that the first side surfaces 1112 may be crystal orientation planes of the silicon wafer (111).
For another example, referring to fig. 6 and fig. 7, fig. 6 is a schematic diagram illustrating a second structure of the first groove structure 111 formed on the substrate 110 of the micro light emitting module 100 according to the embodiment of the application, and fig. 7 is a schematic diagram illustrating a cross section of the first groove structure 111 along the direction B1 to B2 shown in fig. 6. When at least one first groove structure 111 is formed on the substrate 110 on which the epitaxial layer of the crystal orientation surface of the silicon wafer (110) is formed, the first groove structure 111 may include a bottom surface 1111, six first side surfaces 1112, and six first connection surfaces 1113, and the bearing surface 1110 of the first groove structure 111 may include the bottom surface 1111 and six first connection surfaces 1113; the bottom surface 1111 may be a hexagonal structure, six first sides 1112 are connected to six edges of the bottom surface 1111 (four first sides 1112 and four first connecting surfaces 1113 are illustrated in fig. 6 and 7 due to the drawing angle), and six first connecting surfaces 1113 are connected to six first sides 1112 in a one-to-one correspondence manner, such that one end of each first side 1112 is obliquely connected to one edge of the bottom surface 1111, the other end of each first side 1112 is obliquely connected to one first connecting surface 1113, different first sides 1112 are obliquely connected to different edges of the bottom surface 1111, and different first sides 1112 are also obliquely connected to different first connecting surfaces 1113. Wherein, the bottom surface 1111 and the six first connection surfaces 1113 may be parallel to each other and be a crystal orientation plane of the silicon wafer (110), and an inclination angle between each of the first side surfaces 1112 and the bottom surface 1111 may be 35.3 °, so that the first side surfaces 1112 may be crystal orientation planes of the silicon wafer (111).
At least one of the at least one bottom surface 1111 and the at least one first connection surface 1113 may be provided with one driving unit 120 (each driving unit 120 is disposed on one surface in the embodiment of the present application), so that each driving unit 120 may be disposed on one wafer (100) or one wafer (110) in the wafer direction. For example, referring again to fig. 1, in one first groove structure 111, the driving unit 120 may be disposed on each of the plurality of first connection surfaces 1113, and in this case, the driving unit 120 may not be disposed on the bottom surface 1111. Of course, in one first groove structure 111, the driving unit 120 may be provided on the bottom surface 1111 instead of the driving unit 120 on the first connection surface 1113, or the driving unit 120 may be provided on both the bottom surface 1111 and the first connection surface 1113. Also, when a plurality of first groove structures 111 are formed on the substrate 110, driving structures may be provided in one, several, or all of the first groove structures 111.
It is understood that the driving structure of the micro light emitting module 100 can provide an electrical signal to the display structure to drive the display structure to emit light. All driving units 120 of the driving structure of the micro light emitting module 100 may be PMOS (P-type channel Metal Oxide Semiconductor) units, so that the driving structure may be a PMOS driving structure. The PMOS unit is a metal-oxide-semiconductor field effect transistor in which an n-type substrate, a p-channel, and a current flow by holes are used. Of course, all the driving units 120 of the driving structure of the micro light emitting module 100 may be NMOS (N-type Metal-Oxide-Semiconductor) units, and the NMOS units may be N-type Metal-Oxide-Semiconductor field effect transistors, and the driving structure may be NMOS driving structure. Alternatively, when the driving structure of the micro light emitting module 100 includes at least two driving units 120, all of the driving units 120 may be PMOS units or NMOS units, or at least one driving unit 120 may be a PMOS unit, at least another driving unit 120 may be an NMOS unit, and at this time, the driving structure formed by the driving units 120 may be a CMOS driving circuit.
The display units 130 may be disposed on at least one first side 1112 of the at least one first groove structure 111 (each display unit 130 in the embodiment of the present application is disposed on one surface), so that each display unit 130 may be disposed on a crystal orientation plane of a silicon wafer (111). For example, as shown in fig. 1, in one first groove structure 111, the display units 130 may be disposed on one, several or all of the first sides 1112, and it should be noted that only two first sides 1112 are illustrated in fig. 1, but in actual production, the display units 130 may be disposed on a plurality of first sides 1112.
The display unit 130 may be, but is not limited to, a GaN-based LED unit, as shown in fig. 8, fig. 8 is a schematic structural diagram of the display unit 130 of the micro light emitting module 100 according to an embodiment of the present application, and the display unit 130 may include an epitaxial structure 131 and an electrode 132. Each epitaxial structure 131 may include at least an intrinsic GaN layer 1311, an N-type GaN layer 1312, a multiple quantum well layer 1313, and a P-type GaN layer 1314 sequentially disposed on one first side 1112 of the first recess structure 111. The GaN material series is a wide forbidden band semiconductor material, comprises GaN, inN and AIN and ternary alloy formed by the GaN, inN and AIN, and can be used as a light-emitting device. The intrinsic GaN layer 1311 is a pure GaN semiconductor completely free of impurities and lattice defects, and the intrinsic GaN layer 1311 may be a nucleation layer of the epitaxial structure 131, which may improve crystal quality and reduce reverse leakage. The N-type GaN layer 1312 and the P-type GaN layer 1314 are formed by doping other elements on the basis of the intrinsic GaN layer 1311, the N-type GaN layer 1312 is formed on the intrinsic GaN layer 1311, and the P-type GaN layer 1314 may be formed on the N-type GaN layer 1312 and may form a PN junction with the N-type GaN layer 1312. Multiple quantum well layers (multiple quantum well, MQW) 1313 may be formed between the N-type GaN layer 1312 and the P-type GaN layer 1314, the multiple quantum well layers 1313 referring to a structure in which a plurality of quantum wells are combined together, and the multiple quantum well layers 1313 may include a plurality of stacked structures so that coupling between potential wells of the multiple layers is strong, and the multiple quantum well layers 1313 serve as active layers for emitting light. The electrode 132 of the display unit 130 may include a P electrode 1321 and an N electrode 1322, where the P electrode 1321 may be electrically connected to the P-type GaN layer 1314, and the N electrode 1322 may be electrically connected to the N-type GaN layer 1312, and when the P electrode 1321 and the N electrode 1322 apply voltages to the P-type GaN layer 1314 and the N-type GaN layer 1312, the multiple quantum well structure seals electrons, holes and quantum wells, and increases the combination of electron holes and the probability of luminescence, thereby improving the luminescence efficiency.
It is understood that multiple quantum well layer 1313 and P-type GaN layer 1314 (or a portion of N-type GaN layer 1312) may be etched to expose a portion of N-type GaN layer 1312, where exposed N-type GaN layer 1312 may be electrically connected to N-electrode 1322.
It is appreciated that the N-type GaN layer 1312, the multiple quantum well layer 1313, and the P-type GaN layer 1314 are not necessarily single layer structures, for example, the N-type GaN layer 1312 may be, but is not limited to including, an N-AlGaN sub-layer and an InGa/GaN superlayer sub-layer; the P-type GaN layer 1314 may be, but is not limited to including, a P-AlGaN sub-layer, a P-GaN sub-layer, a p+ GaN sub-layer. In addition, the epitaxial structure 131 of the embodiment of the present application may further include other layered structures, for example, a current diffusion layer 1315 (CSL layer) may be further disposed on a side of the P-type GaN layer 1314 away from the multiple quantum well layer 1313, a passivation layer 1316 (insulating layer) may be disposed on an outer surface of the entire epitaxial structure 131, and an electrical connection between the P-electrode 1321 and the P-type GaN layer 1314 and an electrical connection between the N-electrode 1322 and the N-type GaN layer 1312 may be achieved by hole digging in the passivation layer 1316.
It should be noted that the above is only an exemplary illustration of the epitaxial structure 131 and the display unit 130 of the present application, and the above components may be other structures, and all the structures of the epitaxial structure 131 and the display unit 130 of the GaN-based LED unit capable of emitting light, which can be epitaxially grown on the crystal orientation plane of the silicon wafer (111), are within the protection scope of the embodiments of the present application.
In the micro light emitting module 100 according to the embodiment of the present application, at least one first groove structure 111 is formed on the substrate 110 formed with the epitaxial layer on the wafer (100) orientation surface and/or the wafer (110) orientation surface, the bottom surface 1111 and the first connection surface 1113 of the first groove structure 111 may be the same wafer (100) orientation plane or the wafer (110) orientation plane as the epitaxial layer of the substrate 110, and the first side surface 1112 may be the wafer (111) orientation plane. The driving unit 120 may be disposed on at least one of the first connection surface 1113 and the bottom surface 1111, and the display unit 130 may be disposed on at least one first side 1112, so that the micro light emitting module 100 of the present application may integrate the driving unit 120 of the CMOS circuit structure and the display unit 130 of the GaN-based LED unit on the same substrate 110, and compared with the scheme that the CMOS circuit structure and the GaN-based LED unit are formed on two substrates respectively in the related art, the micro light emitting module 100 of the present application may save the cost of one substrate, and may omit the substrate inversion to implement the production process of electrically connecting the CMOS circuit structure and the GaN-based LED unit, which makes the micro light emitting module 100 of the present application simpler in structure and simpler in manufacturing process; meanwhile, the first side 1112 of the crystal orientation plane of the silicon wafer (111) is etched on the substrate 110, so that the flatness of the surface of the substrate 110 can be controlled to a certain extent to reduce the climbing distance, and the thickness of the micro light emitting module 100 can be further reduced.
Referring to fig. 9 and fig. 10, fig. 9 is a schematic diagram of a second structure of the micro light emitting module 100 according to the embodiment of the application, and fig. 10 is a schematic diagram of an optical path of the micro light emitting module 100 shown in fig. 9. The micro light emitting module 100 may further include one or more dimming units such as a second dimming unit 140.
One or more second dimming units 140 may form a second dimming structure of the micro light emitting module 100, each second dimming unit 140 may be disposed on one first groove structure 111, for example, each second dimming unit 140 may be disposed on a bottom surface 1111 of one first groove structure 111. Within a first recess structure 111, the second dimming unit 140 may adjust the light emitting direction of the epitaxial structure 131 of the one or more display units 130 such that the light emitting direction of the one or more display units 130 is perpendicular to the first connection surface 1113 (or perpendicular to the bottom surface 1111 or the surface of the substrate 110).
It is understood that the display unit 130 may include a light emitting surface 133, the second dimming unit 140 may include a light emitting surface such as a second light emitting surface 141, in a first groove structure 111, the light emitting surface 133 of the display unit 130 disposed on a first side 1112 of the first groove structure 111 is disposed opposite to the second light emitting surface 141 of the second dimming unit 140 disposed on the first groove structure 111, and an included angle between the light emitting surface 133 and the second light emitting surface 141 is an acute angle, the light emitting surface 133 and the second light emitting surface 141 are not parallel, not coplanar, or not perpendicular, and at this time, the second dimming unit 140 may adjust a light emitting direction of the display unit 130 so that the light emitting direction is perpendicular to the first connection surface 1113.
It is understood that the second dimming unit 140 may be, but is not limited to, a structure of a reflecting mirror, a refracting mirror, or the like. All structures capable of adjusting light rays are within the protection scope of the embodiment of the application.
It is understood that the second dimming unit 140 may have one second dimming surface 141 to adjust the light emitting direction of one display unit 130, or the second dimming unit 140 may have a plurality of second dimming surfaces 141 to adjust the light emitting directions of a plurality of display units 130. For example, in fig. 9, the display units 130 are disposed on two (or four) first sides 1112 of one first groove structure 111, and at this time, the second dimming unit 140 may correspondingly have two (or four) second dimming surfaces 141 to adjust the light emitting directions of the two (or four) display units 130 at the same time.
The micro light emitting module 100 of the embodiment of the present application is provided with one or more second dimming units 140, so that the light emitting direction of the display unit 130 of the micro light emitting module 100 is perpendicular to the direction of the first connection surface 1113 and the bottom surface 1111 and propagates to the outside of the micro light emitting module 100 in a direction away from the bottom surface 1111. The second dimming unit 140 is integrated in the first groove structure 111 of the substrate 110, so that the thickness of the micro light emitting module 100 can be prevented from being increased by the second dimming unit 140, and the light and thin design of the micro light emitting module 100 can be further realized.
Referring to fig. 11, fig. 11 is a schematic diagram illustrating a third structure of a micro light emitting module 100 according to an embodiment of the application. One or more second recess structures 112 may also be formed in the substrate 110.
Each second groove structure 112 includes at least two second side surfaces 1121 and at least two second connecting surfaces 1122, wherein the at least two second side surfaces 1121 are connected to each other, and the at least two second connecting surfaces 1122 are connected to the at least two second side surfaces 1121 in a one-to-one inclined manner, such that each second connecting surface 1122 is connected to one second side surface 1121 in an inclined manner, and different second connecting surfaces 1122 are connected to different second side surfaces 1121 in an inclined manner. Wherein, the driving unit 120 is disposed on at least one second connecting surface 1122; alternatively, at least one second side 1121 is provided with a display unit 130, or at least one second connecting surface 1122 is provided with a driving unit 120 and at least one second side 1121 is provided with a display unit 130.
It is appreciated that the second side 1121 may be a silicon wafer (111) orientation plane and the second connection plane 1122 may be the same as the orientation of the epitaxial layers of the substrate 110, e.g., the second connection plane 1122 may be a silicon wafer (100) orientation plane or a silicon wafer (110) orientation plane.
It is understood that one second groove structure 112 may have more than two second side surfaces 1121 and more than two second connecting surfaces 1122. For example, referring to fig. 12, fig. 12 is a schematic structural diagram of a second groove structure 112 of a micro light emitting module 100 according to an embodiment of the present application, when at least one second groove structure 112 is formed on a substrate 110 on a crystal orientation surface of a silicon wafer (100), the second groove structure 112 may include four second side surfaces 1121 and four second connecting surfaces 1122, one ends of the four second side surfaces 1121 may be connected together, the other ends of the four second side surfaces 1121 extend obliquely toward a direction away from each other, and the four second connecting surfaces 1122 are connected with the four second side surfaces 1121 in a one-to-one and one corresponding oblique manner, so that each second connecting surface 1122 is connected with one second side surface 1121 in an oblique manner, and different second connecting surfaces 1122 are connected with different second side surfaces 1121 in an oblique manner. The four second connection surfaces 1122 may be parallel or coplanar with each other and may be a wafer (100) orientation plane, and the tilt angle between each second side 1121 and one second connection surface 1122 may be 54.7 °, such that the second side 1121 may be a wafer (111) orientation plane.
It will be appreciated that when at least one second groove structure 112 is formed on the substrate 110 having the epitaxial layer formed on the wafer (110) orientation surface, the second groove structure 112 may also include six second side surfaces 1121 and six second connection surfaces 1122, where the tilt angle between each second side surface 1121 and one second connection surface 1122 may be 35.3 °, such that the second side surface 1121 may be the wafer (111) orientation plane.
It is understood that the micro light emitting module 100 may also be etched on the substrate 110 by a single crystal silicon anisotropic wet etching method to form one or more second groove structures 112. Among them, one difference between the first groove structure 111 and the second groove structure 112 is that the second groove structure 112 does not have a structure like the bottom surface 1111. In actual processing, the first groove structure 111 with the bottom surface 1111 may be formed by controlling the type, the amount and the etching duration of the etching solution, and the second groove structure 112 without the bottom surface structure may be formed.
It will be appreciated that when the opening width of the groove structure is constant, the depth of the second groove structure 112 (in the direction perpendicular to the bottom surface 1111) is generally greater than the depth of the first groove structure 111, so that the length of the second side 1121 may also be longer than the length of the first side 1112, and more space may be available on the second side 1121 for epitaxial growth of the epitaxial structure 131. Of course, since the first groove structure 111 is formed with the bottom surface 1111, on one hand, the area of the crystal orientation plane of the silicon wafer (100) or the crystal orientation plane of the silicon wafer (110) of the first groove structure 111 is larger, and the setting position of the driving unit 120 is more flexible; on the other hand, the larger distance between the several first sides 1112 of the first groove structures 111 makes the light emitting routes of the several epitaxial structures 131 formed on the first sides 1112 less likely to interfere with each other. The first groove structure 111 and the second groove structure 112 according to the embodiment of the present application may be processed according to actual situations.
It is understood that the at least one second connection surface 1122 of the at least one second groove structure 112 may be provided with a drive unit 120. For example, within one second groove structure 112, one drive unit 120 may be provided on each of the plurality of second connection faces 1122. For another example, when a plurality of second groove structures 112 are formed on the substrate 110, driving structures may be disposed in the second connection surface 1122 of one, some, or all of the second groove structures 112. Thus, the driving unit 120 of the embodiment of the present application may be disposed on the second groove structure 112, at least one first connection surface 1113 of the first groove structure 111, the second connection surface 1122, and even the bottom surface 1111.
It will be appreciated that one display unit 130 may be disposed on at least one second side 1121 of at least one second recess structure 112, such that each display unit 130 may be disposed on a wafer (111) crystal orientation plane. For example, within one second groove structure 112, display units 130 may be disposed on one, a few, or all of the second sides 1121. For another example, when a plurality of second groove structures 112 are formed on the substrate 110, the display unit 130 may be disposed in the second side 1121 of one, several, or all of the second groove structures 112. Thus, the display unit 130 of the embodiment of the present application may be disposed on at least one of the first and second sides 1112, 1121 of the second and first groove structures 112, 111.
It is understood that when only one first recess structure 111 is formed on the substrate 110, the epitaxial structure 131 in the first recess structure 111 may be electrically connected to at least one driving unit 120 through the electrode 132, so that the driving unit 120 drives the display unit 130 to emit light. When a plurality of first groove structures 111 are formed on the substrate 110, the epitaxial structure 131 within one first groove structure 111 may be connected to one or several driving units 120 within that first groove structure 111 through electrodes 132. Of course, the epitaxial structure 131 in one first recess structure 111 may also be electrically connected to at least one driving unit 120 in another first recess structure 111 through the electrode 132, so that the driving unit 120 drives the display unit 130 to emit light.
It will be appreciated that when one or more first recess structures 111 and one or more second recess structures 112 are formed on the substrate 110 at the same time, there are a plurality of electrical connection manners between the epitaxial structure 131 and the driving unit 120. For example, the epitaxial structure 131 of one first recess structure 111 is electrically connected to at least one driving unit 120 in the first recess structure 111 through an electrode 132, so that the driving unit 120 drives the display unit 130 to emit light. For another example, when a plurality of first groove structures 111 are formed on the substrate 110, the epitaxial structure 131 in one first groove structure 111 is connected to at least one driving unit 120 in the other first groove structure 111 through an electrode 132, so that the driving unit 120 drives the display unit 130 to emit light. For another example, the epitaxial structure 131 in one second recess structure 112 is electrically connected to at least one driving unit 120 in the second recess structure 112 through an electrode 132, so that the driving unit 120 drives the display unit 130 to emit light. For another example, when a plurality of second groove structures 112 are formed on the substrate 110, the epitaxial structure 131 in one second groove structure 112 is electrically connected to at least one driving unit 120 in the other second groove structure 112 through the electrode 132, so that the driving unit 120 drives the display unit 130 to emit light. Also for example, the epitaxial structure 131 in one of the second recess structures 112 is electrically connected to at least one of the driving units 120 in at least one of the first recess structures 111 through the electrode 132, so that the driving unit 120 drives the display unit 130 to emit light. For another example, the epitaxial structure 131 in one of the first recess structures 111 is electrically connected to at least one of the driving units 120 in at least one of the second recess structures 112 through the electrode 132, so that the driving unit 120 drives the display unit 130 to emit light.
It is understood that the specific electrical connection relationship between the driving unit 120 and the display unit 130 may be determined according to an actual circuit. In some embodiments, one driving unit 120 may drive one display unit 130; in another embodiment, the plurality of driving units 120 may drive one display unit 130; in still another embodiment, one driving unit 120 may drive a plurality of display units 130; in another embodiment, the plurality of driving units 120 may drive the plurality of display units 130. For example, please refer to fig. 13, fig. 13 is a schematic diagram illustrating an electrical connection of the micro light emitting module 100 according to an embodiment of the present application. Taking two driving units 120, such as a PMOS1 tube and a PMOS2 tube, to drive one display unit 130, such as an LED, for example, the PMOS1 tube may include a source (S), a gate (G), and a drain (D), where the gate of one PMOS1 tube is connected to the scan signal Vscan, the source is connected to the data signal Vdata, the drain is connected to the gate of the other PMOS2 tube, the drain of the other PMOS2 tube is electrically connected to the power supply Vdd, the source of the other PMOS2 tube is electrically connected to the P electrode 1321 of the display unit 130 (LED), and the N electrode 1322 of the display unit 130 is grounded. A storage capacitor element C1 may be further disposed between the two PMOS transistors, where one end of the storage capacitor element C1 is electrically connected between the drain of one PMOS1 transistor and the gate of the other PMOS2 transistor, and the other end of the storage capacitor element C1 is electrically connected between the source of the other PMOS2 transistor and the P electrode 1321 of the display unit 130 (LED). Thus, the display unit 130 can realize light emitting display under the driving of the two driving units 120. It should be noted that the above is only an exemplary illustration of driving the display unit 130 by the driving unit 120 according to the embodiment of the present application, and other driving manners may be adopted in the embodiment of the present application.
It can be understood that the micro light emitting module 100 according to the embodiment of the present application may form only the first groove structure 111 and not the second groove structure 112 on the substrate 110, the micro light emitting module 100 may form only the second groove structure 112 and not the first groove structure 111 on the substrate 110, and the micro light emitting module 100 may form the first groove structure 111 and the second groove structure 112 on the substrate 110 at the same time.
The substrate 110 of the micro light emitting module 100 in the embodiment of the present application may form the first groove structure 111 and the second groove structure 112, and the driving unit 120 and the display unit 130 may be formed on different sides, connection surfaces, and bottom surfaces of different groove structures, so that the setting positions of the driving unit 120 and the display unit 130 in the embodiment of the present application are more flexible, the driving electrical connection scheme between the driving unit 120 and the display unit 130 is also more flexible, the micro light emitting module 100 may design different display schemes, and the design of the micro light emitting module 100 is more flexible.
Referring to fig. 14, fig. 14 is a schematic diagram illustrating a fourth structure of a micro light emitting module 100 according to an embodiment of the application. The micro light emitting module 100 may further include one or more dimming units such as a first dimming unit 150.
One or more first dimming units 150 may form a first dimming structure, each first dimming unit 150 is disposed in one second recess structure 112, for example, each first dimming unit 150 is disposed between two second sides 1121 of one second recess structure 112; in the second groove structure 112, the first dimming unit 150 is configured to adjust the light emitting direction of the epitaxial structure 131, so as to adjust the light emitting direction of the display unit 130, and make the light emitting direction perpendicular to the second connection surface 1122.
The display unit 130 may include a light emitting surface 133, the first light adjusting unit 150 may include a light emitting surface such as a first light emitting surface 151, in a second groove structure 112, the light emitting surface 133 of the display unit 130 disposed on the first side 1112 of the second groove structure 112 is disposed opposite to the first light emitting surface 151 of the first light adjusting unit 150 disposed on the second groove structure 112, and an included angle between the light emitting surface 133 and the first light emitting surface 151 is an acute angle, and the light emitting surface 133 and the first light emitting surface 151 are not parallel, not coplanar, or not perpendicular, at this time, the first light adjusting unit 150 may adjust a light emitting direction of the display unit 130 so that the light emitting direction is perpendicular to the first connection surface 1113.
It is understood that the first dimming unit 150 may be, but is not limited to, a reflecting mirror, a refracting mirror, etc., and any structure capable of adjusting light is within the scope of the embodiments of the present application.
It is understood that the first dimming unit 150 may have one first dimming surface 151 to adjust the light emitting direction of one display unit 130, or the first dimming unit 150 may have a plurality of first dimming surfaces 151 to adjust the light emitting directions of a plurality of display units 130.
The micro light emitting module 100 of the embodiment of the present application is provided with the first dimming unit 150, so that the light emitting direction of the display unit 130 in the second groove structure 112 of the micro light emitting module 100 is perpendicular to the direction of the second connection surface 1122 and propagates to the outside of the micro light emitting module 100 in a direction away from the substrate 110. The first dimming unit 150 is integrated in the second groove structure 112 of the substrate 110, so that the thickness of the micro light emitting module 100 can be prevented from being increased by the first dimming unit 150, and the micro light emitting module 100 can be designed to be light and thin.
Referring to fig. 15, fig. 15 is a schematic diagram of a fifth structure of a micro light emitting module 100 according to an embodiment of the application. The first groove structures 111 formed on the substrate 110 may also not include the bottom surface 1111 like the second groove structures 112, where each first groove structure 111 includes at least two first side surfaces 1112 and the bearing surface 1110 of each first groove structure 111 includes at least two first connection surfaces 1113.
It will be appreciated that at least two first sides 1112 are connected to each other, and at least two first connecting surfaces 1113 are connected to at least two first sides 1112 in a one-to-one tilting manner, such that each first connecting surface 1113 is connected to one first side 1112 in a tilting manner, and different first connecting surfaces 1113 are connected to different first sides 1112 in a tilting manner. At least one driving unit 120 is disposed on a first connection surface 1113 of one first recess structure 111, at least one display unit 130 is disposed on a first side surface 1112 of one first recess structure 111, each display unit 130 includes an epitaxial structure 131 and an electrode 132, and the epitaxial structure 131 is electrically connected to at least one driving unit 120 through the electrode 132, so that the driving unit 120 drives the display unit 130 to emit light.
It can be appreciated that the micro light emitting module 100 may also be etched on the substrate 110 by using a monocrystalline silicon anisotropic wet etching method to form one or more first groove structures 111, where the first groove structures 111 are groove structures formed by etching the substrate 110 with an anisotropic etching solution. Of course, the first recess structure 111 may also be formed by other means, such as, but not limited to, by dry etching.
It is understood that the epitaxial structure 131 in one first recess structure 111 is electrically connected to at least one driving unit 120 of the first recess structure 111 through an electrode 132, so that the driving unit 120 drives the display unit 130 to emit light. When a plurality of first groove structures 111 are formed on the substrate 110, the epitaxial structure 131 in one first groove structure 111 is connected to at least one driving unit 120 in the first groove structure 111 through an electrode 132, or the epitaxial structure 131 in one first groove structure 111 is electrically connected to at least one driving unit 120 in the other first groove structure 111 through an electrode 132, so that the driving unit 120 drives the display unit 130 to emit light. Wherein the one or more driving units 120 may drive the one or more display units 130 to emit light.
It is understood that the driving unit 120 disposed in the first recess structure 111 may be a PMOS unit or an NMOS unit; when a plurality of driving units 120 are included, all of the driving units 120 may be PMOS units or NMOS units, or at least one driving unit 120 may be PMOS units and at least another driving unit 120 may be NMOS units.
It is understood that the epitaxial structure 131 disposed on the first recess structure 111 may include an intrinsic GaN layer 1311, an N-type GaN layer 1312, a multiple quantum well layer 1313, and a P-type GaN layer 1314 disposed on the first side 1112 in this order; each electrode 132 includes a P electrode 1321 and an N electrode 1322, the P electrode 1321 being electrically connected to the P-type GaN layer 1314, and the N electrode 1322 being electrically connected to the N-type GaN layer 1312.
It is understood that, as shown in fig. 15, the micro light emitting module 100 may further include one or more second dimming units 140, where each second dimming unit 140 is disposed in one of the first groove structures 111, for example, each second dimming unit 140 is disposed between two first sides 1112 of one of the first groove structures 111. In one first groove structure 111, the second dimming unit 140 is configured to adjust the light emitting direction of the display unit 130, so that the light emitting direction is perpendicular to the first connection surface 1113. The display unit 130 may include a light emitting surface 133, the second dimming unit 140 may include a light emitting surface such as a second light emitting surface 141, in one first groove structure 111, the light emitting surface 133 of the display unit 130 disposed in the first groove structure 111 is disposed opposite to the second light emitting surface 141 of the second dimming unit 140 disposed in the first groove structure 111, and an included angle between the light emitting surface 133 and the second light emitting surface 141 is an acute angle, where the light emitting surface 133 is not parallel, not coplanar, or not perpendicular to the second light emitting surface 141, and at this time, the second dimming unit 140 may adjust a light emitting direction of the display unit 130 so that the light emitting direction is perpendicular to the first connection surface 1113.
It should be noted that, in the embodiment shown in fig. 15, the substrate 110, the first groove structure 111, the display unit 130, the driving unit 120, and the second dimming unit 140 of the micro light emitting module 100 have the same relevant features as those of the embodiment shown in fig. 1 to 14, and a solution not described in detail in fig. 15 may be referred to the description in the foregoing embodiment.
When the plurality of first groove structures 111 are formed on the substrate 110, the plurality of first groove structures 111 may form an array arrangement, so that the micro light emitting module 100 according to the embodiment of the application may form a groove array and form an LED array. When the plurality of second groove structures 112 are formed on the substrate 110, the plurality of second groove structures 112 may also form an array arrangement; when the plurality of first groove structures 111 and the plurality of second groove structures 112 are formed on the substrate 110, the plurality of first groove structures 111 and the plurality of second groove structures 112 may collectively form an array arrangement; of course, the plurality of first groove structures 111 may be arranged in an array alone, and the plurality of second groove structures 112 may be arranged in an array alone. Of course, the first groove structures 111 and the second groove structures 112 of the present application may be arranged in other non-array manners.
Based on the above-mentioned structure of the micro light emitting module 100, the embodiment of the present application further provides a display device 10, where the display device 10 may be applied to an electronic apparatus to implement augmented Reality (XR) technologies such as augmented Reality (Augmented Reality, AR), virtual Reality (VR), mixed Reality (MR) and the like. In practice, the Display device 10 may be a projection part of an electronic apparatus, such as a projector, head Up Display (HUD), or the like; for another example, the display device 10 may be a display portion of an electronic apparatus, and for example, the electronic apparatus may include: any device with a display screen, such as a smart phone, a smart watch, a notebook computer, a tablet computer, a vehicle recorder, a navigator, a head-mounted device, and the like; also for example, the display device 10 may be an illumination portion of an electronic apparatus, which may include, for example: vehicles, street lamps, etc. any device having a lighting assembly.
Referring to fig. 16, fig. 16 is a schematic structural diagram of a display device 10 according to an embodiment of the application. The display device 10 may include a control circuit 200 and the micro light emitting module 100 in any of the above embodiments, and the control circuit 200 may be electrically connected to each driving unit 120 to control the light emitting state of the display unit 130 through the driving unit 120.
It is understood that all the display units 130 of the micro light emitting module 100 may emit light of a single color, for example, all the display units 130 may emit blue light, and in this case, the micro light emitting module 100 and the display apparatus 10 may be blue light display devices. Of course, the micro light emitting module 100 and the display unit 130 may emit other light with a single color.
It can be appreciated that all the display units 130 of the micro light emitting module 100 can be prepared into units with a single light emitting color, and then the light with the single color emitted by the display units 130 is converted into red light, blue light and green light by the color conversion quantum dot material, so that the full-color display of the display device 10 can be realized. For example, in a general production process, the epitaxial structures 131 of all the display units 130 of the micro light emitting module 100 may first prepare a Cheng Falan light structure, and at this time, the micro light emitting module 100 or the display device 10 may further be provided with a quantum dot color conversion sheet (QDCC) disposed on the light emitting surface side of the substrate 110, and the quantum dot color conversion sheet (QDCC) may convert blue light into red/green with very high color purity, thereby realizing full color display. Of course, the micro light emitting module 100 may also be provided with the display unit 130 emitting different colors, so that the micro light emitting module 100 and the display device 10 may realize a full-color display.
It will be appreciated that the display device 10 may also include other structures such as, but not limited to, a housing, a circuit interface, an acousto-electric conversion device, etc.
The display device 10 according to the embodiment of the present application includes the micro light emitting module 100 in which the driving circuit and the GaN-based LED units are integrated on the same substrate 110, and the display device 10 may have a thinner thickness, and the display device 10 may be thinner.
Based on the micro light emitting module 100 and the display device 10, the embodiment of the application further provides a manufacturing method of the micro light emitting module 100. Referring to fig. 17, fig. 17 is a schematic flow chart of a first method for manufacturing a micro light emitting module 100 according to an embodiment of the application. The preparation method of the micro light emitting module 100 comprises the following steps:
in 101, a first recess structure 111 is formed on a substrate 110.
One or more first groove structures 111 may be formed on the substrate 110, each first groove structure 111 including a bearing surface 1110 and a first side surface 1112, the first side surface 1112 being obliquely connected to the bearing surface 1110. The substrate 110 is provided with an epitaxial layer comprising at least one of a wafer oriented surface of the silicon wafer (100) and a wafer oriented surface of the silicon wafer (110). The bearing surface 1110 of the first recess structure 111 may be parallel to one surface of the substrate 110 such that the bearing surface 1110 of the first recess structure 111 may have the same crystal orientation as one surface of the epitaxial layer formed on the substrate 110. Illustratively, the bearing surface 1110 of the first recess structure 111, e.g., the first connection surface 1113, the bottom surface 1111, has the same crystal orientation as one of the epitaxial layers of the substrate 110, such that the bearing surface 1110 of the first recess structure 111, e.g., the first connection surface 1113, the bottom surface 1111, is a silicon wafer (100) crystal orientation plane or a silicon wafer (110) crystal orientation plane, and the first side 1112 is a silicon wafer (111) crystal orientation plane.
It will be appreciated that referring again to fig. 3, in step 101, a specific method for forming the first groove structure 111 on the substrate 110 includes: forming a first mask layer 161 having an opening 162 on a substrate 110; etching the substrate 110 by the anisotropic etching solution; the first mask layer 161 is removed to form one or more first recess structures 111 on the substrate 110. Wherein the first mask layer 161 is formed on the substrate 110 by, but not limited to, metal organic chemical vapor deposition, and then an opening 162 penetrating the entire first mask layer 161 in a thickness direction of the first mask layer 161 may be formed on a partial region of the first mask layer 161 by an etching technique to form the first mask layer 161 having the opening 162 on the substrate 110. Finally, the first mask layer 161 after the first groove structure 111 is formed may be removed by etching.
It should be noted that the first groove structures 111 may be formed on the substrate 110 in other manners, for example, but not limited to, one or more first groove structures 111 may be formed by dry etching.
At 102, forming a first insulating layer 163 on a bearing surface 1110;
in 103, epitaxial structure 131 is epitaxially grown on first side 1112 and electrode 132 is formed to form a display cell 130;
The manufacturing method of the micro light emitting module 100 of the present application may form the first insulating layer 163 on the carrying surface 1110 of each first groove structure 111, and may epitaxially grow the epitaxial structure 131 on the first side 1112 of at least one first groove structure 111 and form the electrode 132. As shown in fig. 18, fig. 18 is a schematic diagram of a manufacturing process of the display unit 130 of the micro light emitting module 100 according to the embodiment of the present application, after one or more first groove structures 111 are formed on the substrate 110, in order to avoid that the epitaxial structure 131 is also grown on the bearing surface 1110 of the first groove structures 111, such as the first connection surface 1113 and the bottom surface 1111, a first insulating layer 163 may be formed on the bearing surface 1110 of each first groove structure 111, such as the first connection surface 1113 and the bottom surface 1111, and the first insulating layer 163 does not cover the first side surface 1112; then, the epitaxial structure 131 may be selectively epitaxially grown on the first side 1112 of the first groove structure 111 and the electrode 132 may be formed to form one display unit 130, so that the epitaxial structure 131 and the display unit 130 may be grown only on the first side 1112 of the first groove structure 111 and not on the bottom surface 1111 and the first connection surface 1113 of the first groove structure 111.
It is understood that the first insulating layer 163 may be, but is not limited to, a silicon oxide insulating layer. Of course, the first insulating layer 163 may be a layered structure formed of other materials that are not easy to grow the epitaxial structure 131.
It will be appreciated that after forming one or more first recess structures 111 on the substrate 110, all regions of the first recess structures 111 (including the bottom surface 1111, the first side 1112 and the first connection surface 1113) may be covered with an insulating structure, and then the insulating layer on the first side 1112 may be etched away to expose the first side 1112 by patterning (photolithography) technology, so as to prepare for epitaxial growth of the epitaxial structure 131.
It is appreciated that epitaxially growing epitaxial structure 131 on first side 1112 includes: an intrinsic GaN layer 1311, an N-type GaN layer 1312, a multiple quantum well layer 1313, and a P-type GaN layer 1314 are epitaxially grown in sequence on the first side 1112 of the at least one first recess structure 111 to form an epitaxial structure 131 on the first side 1112 of the at least one first recess structure 111.
It is understood that the electrode 132 includes a P-type electrode (e.g., P-electrode 1321) and an N-type electrode (e.g., N-electrode 1322), wherein the P-type electrode may be electrically connected to the P-type GaN layer 1314 and the N-type electrode may be electrically connected to the N-type GaN layer 1312.
It can be appreciated that referring again to fig. 8 and 18, the preparation method of the present application may first deposit a current diffusion layer 1315 on the first side 1112 of the first groove structure 111, and perform high temperature annealing; then, photoetching and etching can be carried out on the epitaxial structure of the current diffusion layer 1315 to obtain a single-chip vertical integrated light-emitting device structure; in the monolithic vertically integrated light emitting device structure, as seen in cross section, one portion carries the current spreading layer 1315 and the other portion does not carry the current spreading layer 1315; the portion of the non-current carrying diffusion layer 1315 includes an intrinsic GaN layer 1311, an N-type GaN layer 1312, a multiple quantum well layer 1313, and a P-type GaN layer 1314; depositing an electrical insulating layer (passivation layer 1316) on the monolithic vertically integrated light emitting device structure, exposing the device openings 162 by photolithography and etching, and simultaneously obtaining a gate insulating layer; wherein, one opening 162 position may be located at a position on the current diffusion layer 1315, and one opening 162 position may be located at a position on the N-type GaN layer 1312 and not covered with an electrically insulating layer; then, P-type electrode and N-type electrode are deposited at the position of the opening 162 by photoetching, electron beam evaporation and other modes; finally, the epitaxial structure 131 and the electrode 132 are formed by annealing.
At 104, the first insulating layer 163 is removed and a drive unit 120 is formed on the carrying surface 1110.
It will be appreciated that after removal of the first insulating layer 163, a drive unit 120 may be formed on the bearing surface 1110 of the at least one first recess structure 111. When the carrying surface 1110 of each first groove structure 111 includes a bottom surface 1111 and one or more first connection surfaces 1113, each first connection surface 1113 is parallel to the bottom surface 1111, all the first connection surfaces 1113 may be coplanar, and each first side 1112 (e.g., two ends of each first side 1112) may be obliquely connected to the bottom surface 1111 and one first connection surface 1113, respectively, so that the bottom surface 1111 may be a bottom wall of the first groove structure 111, and the first side 1112 may be a side wall of the first groove structure 111. At this time, a driving unit is formed on the bearing surface 1110 of the at least one first groove structure 111, including: a driving unit 120 is formed on at least one of the first connection surface 1113 and the bottom surface 1111 of the at least one first groove structure 111.
It is understood that the bearing surface 1110 of each first groove structure 111 may also include at least two first connection surfaces 1113, where each first groove structure 111 may include at least two first connection surfaces 1113 and at least two first side surfaces 1112, the at least two first side surfaces 1112 are connected to each other, and the at least two first connection surfaces 1113 are connected to the at least two first side surfaces 1112 in a one-to-one corresponding and inclined manner, such that each first connection surface 1113 is connected to one first side surface 1112 in an inclined manner, and different first connection surfaces 1113 are connected to different first side surfaces 1112 in an inclined manner. A drive unit is formed on the bearing surface 1110 of at least one first groove structure 111, comprising: a drive unit 120 is formed on the at least one first connection surface 1113 of the at least one first groove structure 111.
As shown in fig. 18, after epitaxially growing the epitaxial structure 131 on at least one first side 1112 of the substrate 110 and forming the electrode 132 to form a display unit 130, the preparation method of the present application may remove the first insulating layer 163 and form a driving unit 120 on the bearing surface 1110 (e.g., at least one of the first connection surface 1113 and the bottom surface 1111) of the at least one first recess structure 111.
It is understood that at least one of the driving units 120 may be a PMOS unit or an NMOS unit; when the micro light emitting module 100 includes at least two driving units 120, all of the driving units 120 may be PMOS units or NMOS units, or at least one driving unit 120 may be PMOS units and at least another driving unit 120 may be NMOS units.
It is understood that the process for preparing the PMOS unit or the NMOS unit may be as in the related art. For example, referring to fig. 19, fig. 19 is a schematic view illustrating a manufacturing process of the driving unit 120 of the micro light emitting module 100 according to an embodiment of the application. Taking the example of manufacturing an NMOS on the P-type (100) silicon wafer 110d, the photoresist layer 171 may be patterned and formed on the P-type (100) silicon wafer 110d (e.g., the bottom surface 1111 and the first side surface 1112), and then P-type ion implantation is performed to form the bulk electrode region; then removing the photoresist, and performing local oxidation isolation (Local Oxidation of Silicon, LOCOS for short) on the silicon Process of forming SiO on P-type (100) silicon wafer 110d 2 Layer 172 and SiN x Layer 173 (silicon nitride layer) and defines a device region; followed by removal of SiN x Layer 173, growing a gate oxide; a gate layer 174 (which may be a Poly-Si material in general) is then deposited and patterned to form a gate; then, n-type ion implantation is carried out to form a source electrode and a drain electrode of the NMOS tube; then, a passivation layer 1316 is deposited, the passivation layer 1316 may be SiO 2 A material; next, a contact hole is formed in the passivation layer 1316; finally, a metal layer is deposited and patterned to form electrode layers 175 (including gate electrode-G electrode, source electrode-S electrode, drain electrode-D electrode, substrate electrode-B electrode).
It should be noted that the above is only an exemplary illustration of manufacturing an NMOS on a P-type silicon wafer, and the specific preparation process is not limited to the above illustration, and all the schemes of forming an NMOS on the crystal orientation surface of the silicon wafer (100) are within the scope of the embodiments of the present application.
It should be noted that the PMOS structure is similar to the NMOS structure, and the difference is that the ion species implanted in the B region, the S region, and the D region are different. If the PMOS transistor is made on the P-type silicon wafer, an N-type region needs to be formed by injection first (the N-type substrate is made into PMOS, and the N-type region does not need to be formed). For example, referring to fig. 20, fig. 20 is a schematic structural diagram of two driving units 120 of the micro light emitting module 100 according to an embodiment of the present application, fig. 20 (a) shows a PMOS device 120a on a P-type wafer, and fig. 20 (b) shows a PMOS device 120b on an N-type wafer.
It will be appreciated that, considering that some steps in the selective epitaxial growth of the epitaxial structure need to be performed at a high temperature, the method for manufacturing the micro light emitting module 100 according to the embodiment of the present application may selectively and epitaxially grow the epitaxial structure 131 on the first side 1112 of the at least one first recess structure 111 and form the electrode 132 to form the display unit 130, and then form the driving unit 120 on at least one plane of the bearing surface 1110 of the at least one first recess structure 111, such as the first connection surface 1113 and the bottom surface 1111. Of course, the manufacturing method of the micro light emitting module 100 according to the embodiment of the present application may also form the driving unit 120 first and then form the display unit 130, and at this time, the manufacturing process may be improved to avoid the influence of high temperature on the driving unit 120.
In 105, the epitaxial structure 131 is connected to the driving unit 120 through the electrode 132, so that the driving unit 120 drives the display unit 130 to emit light.
It is understood that the manufacturing method of the micro light emitting module 100 of the present application may connect the epitaxial structure 131 to at least one driving unit 120 through the electrode 132. The specific electrical connection relationship between the driving unit 120 and the display unit 130 may be determined according to an actual circuit. In some embodiments, one driving unit 120 may drive one display unit 130; in another embodiment, the plurality of driving units 120 may drive one display unit 130; in still another embodiment, one driving unit 120 may drive a plurality of display units 130; in another embodiment, the plurality of driving units 120 may drive the plurality of display units 130.
According to the manufacturing method of the micro light emitting module 100 of the embodiment of the application, at least one first groove structure 111 is manufactured on the substrate 110 on which the crystal orientation surface of the silicon wafer (100) and/or the epitaxial layer of the crystal orientation surface of the silicon wafer (110) is formed, the bottom surface 1111 and the first connecting surface 1113 of the first groove structure 111 can be the same crystal orientation plane of the silicon wafer (100) or the crystal orientation plane of the silicon wafer (110) as the crystal orientation of the substrate 110, and the first side surface 1112 can be the crystal orientation plane of the silicon wafer (111); the driving unit 120 is prepared on at least one plane of the first connection surface 1113 and the bottom surface 1111, and the display unit 130 is prepared on at least one first side surface 1112, so that the preparation method of the micro light emitting module 100 of the present application can realize the CMOS circuit structure and the GaN-based LED unit on the same silicon wafer substrate 110, and compared with the scheme that the CMOS circuit structure and the GaN-based LED unit are respectively formed on two substrates in the related art, the micro light emitting module 100 of the present application can omit the production process that the substrate is reversed to realize the electrical connection of the CMOS circuit structure and the GaN-based LED unit, which makes the preparation process of the micro light emitting module 100 of the present application simpler, and simultaneously, the prepared micro light emitting module 100 has smaller thickness.
The preparation method of the application further comprises the following steps: the second dimming unit 140 is disposed at the first groove structure 111 (the bottom surface 1111 of the first groove structure 111). A second dimming unit 140 may be disposed on the at least one first groove structure 111. In one first groove structure 111, the second dimming unit 140 is configured to adjust the light emitting direction of the epitaxial structure 131, and adjust the light emitting direction of the display unit 130 to be perpendicular to the bearing surface 1110 (e.g. the first connecting surface 1113, the bottom surface 1111) of the first groove structure 111. It is understood that the display unit 130 may include a light emitting surface 133, the second dimming unit 140 may include a light emitting surface such as a second light emitting surface 141, in a first groove structure 111, the light emitting surface 133 of the display unit 130 disposed on a first side 1112 of the first groove structure 111 is disposed opposite to the second light emitting surface 141 of the second dimming unit 140 disposed on the first groove structure 111, and an included angle between the light emitting surface 133 and the second light emitting surface 141 is an acute angle, the light emitting surface 133 and the second light emitting surface 141 are not parallel, not coplanar, or not perpendicular, and at this time, the second dimming unit 140 may adjust a light emitting direction of the display unit 130 so that the light emitting direction is perpendicular to the first connection surface 1113.
The preparation method of the application further comprises the following steps: forming one or more second recess structures 112 on the substrate 110; each second groove structure 112 includes at least two second connecting surfaces 1122 and at least two second side surfaces 1121, the at least two second side surfaces 1121 are connected to each other, the at least two second connecting surfaces 1122 are connected to the at least two second side surfaces 1121 in a one-to-one inclined manner, such that each second connecting surface 1122 is connected to one second side surface 1121 in an inclined manner, and different second connecting surfaces 1122 are connected to different second side surfaces 1121 in an inclined manner; forming a second insulating layer on the second connection surface 1122 of each second groove structure 112; selectively epitaxially growing an epitaxial structure 131 on the second side 1121 of the at least one second recess structure 112 and forming an electrode 132 to form one display cell 130; the second insulating layer is removed and a drive unit 120 is formed on the second connection surface 1122 of the at least one second recess structure 112.
It is appreciated that the second connection plane 1122 may have the same crystal orientation as one of the epitaxial layers of the substrate 110, such that the second connection plane 1122 may be a silicon wafer (100) crystal orientation plane or a silicon wafer (110) crystal orientation plane and the second side 1121 may be a silicon wafer (111) crystal orientation plane. At least one driving unit 120 may be disposed on a second connection surface 1122 of a second groove structure 112; at least one display unit 130 may be disposed on one second side 1121 of the second groove structure 112.
Wherein the step of forming one or more second groove structures 112 comprises: forming a second mask layer having an opening 162 on the substrate 110; etching the substrate 110 by the anisotropic etching solution; the second mask layer is removed to form one or more second recess structures 112 on the substrate 110. Wherein the second mask layer is formed on the substrate 110 by, but not limited to, metal Organic Chemical Vapor Deposition (MOCVD), and then an opening is formed through the entire second mask layer in a thickness direction of the second mask layer in a partial region of the second mask layer by etching technology to form a second mask layer having the opening on the substrate 110. Wherein the second mask layer after forming the second recess structure 112 may be removed by etching.
It is understood that when the first groove structure 111 and the second groove structure 112 are simultaneously formed on the substrate 110, a mask layer (which may be the first mask layer or the second mask layer) having openings is formed on the substrate 110; etching the substrate 110 by the anisotropic etching solution; the mask layer is removed to form one or more first recess structures 111 and second recess structures 112 on the substrate 110. The type of the anisotropic etching solution, the etching duration, and the size of the opening may be adjusted so that the first groove structure 111 and the second groove structure 112 may be formed on the substrate 110 at the same time, although the same anisotropic etching process is performed.
The preparation method of the application further comprises the following steps: a first dimming unit 150 is disposed in at least one second groove structure 112 (e.g., between two second side surfaces 1121 of the second groove structure 112), such that, in one second groove structure 112, the first dimming unit 150 is configured to adjust the light emitting direction of the display unit 130, and make the light emitting direction perpendicular to the second connection surface 1122. It is understood that the display unit 130 may include a light emitting surface 133, the first light adjusting unit 150 may include a light adjusting surface such as a first light adjusting surface 151, in a second groove structure 112, the light emitting surface 133 of the display unit 130 disposed on the first side 1112 of the second groove structure 112 is disposed opposite to the first light adjusting surface 151 of the first light adjusting unit 150 disposed on the second groove structure 112, and an included angle between the light emitting surface 133 and the first light adjusting surface 151 is an acute angle, the light emitting surface 133 is not parallel, not coplanar, or not perpendicular to the first light adjusting surface 151, and at this time, the first light adjusting unit 150 may adjust a light emitting direction of the display unit 130 so that the light emitting direction is perpendicular to the first connection surface 1113.
It is understood that the method of forming the second groove structure 112 on the substrate 110 and forming the driving unit 120 on the second connection surface 1122 of the second groove structure 112 and forming the display unit 130 on the second side surface 1121 of the second groove structure 112 can be referred to as a preparation method of the first groove structure 111, a preparation method of forming the driving unit 120 on the first connection surface 1113 and the bottom surface 1111 of the first groove structure 111, and a preparation method of the display unit 130.
It should be noted that, the manufacturing method of the micro light emitting module 100 and the micro light emitting module 100 according to the embodiment of the present application are different subject matters under the same inventive concept, and the related features in the micro light emitting module 100 may be manufactured by using the steps of the flow in the manufacturing method of the micro light emitting module 100, and the features of the manufacturing method of the micro light emitting module 100 that are not described in detail may be referred to the description in the micro light emitting module 100.
It should be understood that in the description of the present application, terms such as "first," "second," and the like are used merely to distinguish between similar objects and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated.
The micro light emitting module, the display device and the preparation method of the micro light emitting module provided by the application are described in detail. Specific examples are set forth herein to illustrate the principles and embodiments of the present application and are provided to aid in the understanding of the present application. Meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in light of the ideas of the present application, the present description should not be construed as limiting the present application.
Claims (19)
1. A miniature lighting module, comprising:
the substrate is provided with a first groove structure, the first groove structure comprises a bearing surface and a first side surface, and the first side surface is obliquely connected with the bearing surface;
the driving unit is arranged on the bearing surface; a kind of electronic device with high-pressure air-conditioning system
The display unit is arranged on the first side face and comprises an epitaxial structure and an electrode, and the epitaxial structure is electrically connected to the driving unit through the electrode so that the driving unit drives the display unit to emit light.
2. The micro light emitting module as set forth in claim 1, wherein the carrier surface comprises at least two first connection surfaces, the first groove structure comprises at least two first side surfaces, the at least two first side surfaces are connected to each other, each first connection surface is connected to one first side surface in an inclined manner, and different first connection surfaces are connected to different first side surfaces in an inclined manner;
the driving unit is arranged on at least one first connecting surface.
3. The micro light emitting module of claim 1, wherein the bearing surface comprises a bottom surface and a first connecting surface, the first connecting surface is parallel to the bottom surface, and the first side surface is obliquely connected with the bottom surface and the first connecting surface, respectively;
Wherein, at least one of the first connecting surface and the bottom surface is provided with the driving unit.
4. A micro light emitting module as claimed in claim 3, wherein a second groove structure is further formed on the substrate, the second groove structure comprises at least two second connection surfaces and at least two second side surfaces, the at least two second side surfaces are connected to each other, each second connection surface is connected to one second side surface in an inclined manner, and different second connection surfaces are connected to different second side surfaces in an inclined manner;
wherein the driving unit is arranged on at least one second connecting surface, and/or the display unit is arranged on at least one second side surface.
5. The micro light emitting module as set forth in claim 4, wherein the micro light emitting module comprises a plurality of driving units and a plurality of display units, the driving units are electrically connected with the display units by at least one of the following electrical connection modes:
in one of the first groove structures, the epitaxial structure is electrically connected to at least one of the driving units through the electrode, so that the driving unit drives the display unit to emit light;
When a plurality of first groove structures are formed on the substrate, the epitaxial structure in one first groove structure is electrically connected with at least one driving unit in the other first groove structures through the electrode, so that the driving unit drives the display unit to emit light;
in one of the second groove structures, the epitaxial structure is electrically connected to at least one of the driving units through the electrode, so that the driving unit drives the display unit to emit light;
when a plurality of second groove structures are formed on the substrate, the epitaxial structure in one second groove structure is electrically connected with at least one driving unit in the other second groove structures through the electrode, so that the driving unit drives the display unit to emit light;
the epitaxial structure in one second groove structure is electrically connected with at least one driving unit in at least one first groove structure through the electrode, so that the driving unit drives the display unit to emit light;
the epitaxial structure in one first groove structure is electrically connected with at least one driving unit in at least one second groove structure through the electrode, so that the driving unit drives the display unit to emit light.
6. The micro light emitting module as set forth in claim 4, wherein the display unit includes a light emitting surface; the miniature light emitting module further comprises:
the first dimming unit is arranged in the second groove structure and comprises a first dimming surface, the first dimming surface and the light emitting surface are oppositely arranged in the second groove structure, and the included angle between the first dimming surface and the light emitting surface is an acute angle.
7. The micro light emitting module according to any one of claims 1 to 5, wherein the display unit includes a light emitting surface; the miniature light emitting module further comprises:
the second dimming unit is arranged in the first groove structure and comprises a second dimming surface, the second dimming surface and the light emitting surface are oppositely arranged in the first groove structure, and an included angle between the second dimming surface and the light emitting surface is an acute angle.
8. The micro light emitting module as claimed in any one of claims 1 to 6, wherein the first side is a silicon wafer (111) crystal orientation plane and the carrying surface is a silicon wafer (100) crystal orientation surface or a silicon wafer (110) crystal orientation surface.
9. The miniature light emitting module of any one of claims 1-6 wherein the epitaxial structure comprises an intrinsic GaN layer, an N-type GaN layer, a multiple quantum well layer, and a P-type GaN layer stacked in that order; the electrode comprises a P electrode and an N electrode, wherein the P electrode is electrically connected with the P-type GaN layer, and the N electrode is electrically connected with the N-type GaN layer; and/or the number of the groups of groups,
the driving unit is a PMOS unit or an NMOS unit.
10. A display device, comprising:
the micro light emitting module of any one of claims 1 to 9; a kind of electronic device with high-pressure air-conditioning system
And the control circuit is electrically connected with the driving unit so as to control the light-emitting state of the display unit through the driving unit.
11. The preparation method of the miniature light-emitting module is characterized by comprising the following steps:
forming a first groove structure on a substrate; the first groove structure comprises a bearing surface and a first side surface, and the first side surface is obliquely connected with the bearing surface;
forming a first insulating layer on the bearing surface;
epitaxially growing an epitaxial structure on the first side and forming an electrode to form a display unit;
removing the first insulating layer and forming a driving unit on the bearing surface;
And the epitaxial structure is electrically connected with the driving unit through the electrode so that the driving unit drives the display unit to emit light.
12. The method of claim 11, wherein the bearing surface comprises at least two first connecting surfaces, the first groove structure comprises at least two first side surfaces, the at least two first side surfaces are connected with each other, each first connecting surface is obliquely connected with one first side surface, and different first connecting surfaces are obliquely connected with different first side surfaces;
the forming of the driving unit on the bearing surface comprises:
a drive unit is formed on at least one of the first connection surfaces.
13. The method of claim 11, wherein the bearing surface comprises a bottom surface and a first connecting surface, the first connecting surface is parallel to the bottom surface, and the first side surface is obliquely connected with the bottom surface and the first connecting surface, respectively;
said forming said drive unit on said bearing surface, comprising:
the driving unit is formed on at least one of the first connection surface and the bottom surface.
14. The method of manufacturing a micro light emitting module according to claim 11, further comprising:
forming a second groove structure on the substrate; the second groove structure comprises at least two second connecting surfaces and at least two second side surfaces, wherein the at least two second side surfaces are connected with each other, each second connecting surface is obliquely connected with one second side surface, and different second connecting surfaces are connected with different second side surfaces;
forming a second insulating layer on the second connection surface;
epitaxially growing an epitaxial structure on the second side and forming electrodes to form a display unit;
removing the second insulating layer and forming a driving unit on the second connection surface;
and the epitaxial structure is electrically connected with the driving unit through the electrode so that the driving unit drives the display unit to emit light.
15. The method of claim 14, wherein forming the first recess structure on the substrate comprises:
forming a first mask layer with an opening on the substrate; etching the substrate through an anisotropic etching solution; removing the first mask layer to form a first groove structure on the substrate;
And/or the number of the groups of groups,
the forming a second groove structure on the substrate comprises the following steps:
forming a second mask layer with an opening on the substrate; etching the substrate through an anisotropic etching solution; and removing the second mask layer to form a second groove structure on the substrate.
16. The method of claim 14, wherein the display unit includes a light emitting surface; the preparation method further comprises the following steps:
providing a first dimming unit in at least one of the second groove structures; the first dimming unit comprises a first dimming surface, the first dimming surface and the light-emitting surface are oppositely arranged in the second groove structure, and an included angle between the first dimming surface and the light-emitting surface is an acute angle.
17. The method of any one of claims 11 to 15, wherein the display unit includes a light-emitting surface; the preparation method further comprises the following steps:
providing a second dimming unit in at least one of the first groove structures; the second dimming unit comprises a second dimming surface, the second dimming surface and the light-emitting surface are oppositely arranged in the first groove structure, and an included angle between the second dimming surface and the light-emitting surface is an acute angle.
18. The method of any one of claims 11 to 16, wherein the first side is a wafer (111) orientation plane of a silicon wafer, and the carrier surface is a wafer (100) orientation surface or a wafer (110) orientation surface of the silicon wafer.
19. The method of any one of claims 11 to 16, wherein the driving unit is a PMOS unit or an NMOS unit;
and/or the number of the groups of groups,
the epitaxially growing an epitaxial structure on the first side includes:
and sequentially epitaxially growing an intrinsic GaN layer, an N-type GaN layer, a multiple quantum well layer and a P-type GaN layer on the first side surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311164865.7A CN117116963A (en) | 2023-09-07 | 2023-09-07 | Micro light-emitting module, display device and preparation method of micro light-emitting module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311164865.7A CN117116963A (en) | 2023-09-07 | 2023-09-07 | Micro light-emitting module, display device and preparation method of micro light-emitting module |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN117116963A true CN117116963A (en) | 2023-11-24 |
Family
ID=88802040
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202311164865.7A Pending CN117116963A (en) | 2023-09-07 | 2023-09-07 | Micro light-emitting module, display device and preparation method of micro light-emitting module |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN117116963A (en) |
-
2023
- 2023-09-07 CN CN202311164865.7A patent/CN117116963A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10153401B2 (en) | Passivated micro LED structures suitable for energy efficient displays | |
| US9666600B2 (en) | Direct bandgap substrates and methods of making and using | |
| JPH077223A (en) | Color semiconductor device | |
| US11961941B2 (en) | III-nitride multi-wavelength LED arrays with etch stop layer | |
| CN101339970A (en) | Gallium nitride-based semiconductor element, optical device using the same, and image display apparatus using optical device | |
| TWI738263B (en) | Display panel and manufacturing method thereof | |
| WO1993015589A1 (en) | Single crystal silicon arrayed devices for projection displays | |
| US20230223421A1 (en) | Monolithic led array and a precursor thereto | |
| TW202107695A (en) | Active matrix led array precursor | |
| US9773824B2 (en) | Active matrix light emitting diode array and projector display comprising it | |
| CN113644086A (en) | Preparation method of display panel and display panel | |
| TWI769622B (en) | Iii-nitride multi-wavelength led arrays | |
| US20210193731A1 (en) | III-Nitride Multi-Wavelength LED Arrays | |
| CN112382643B (en) | Transfer printing substrate, manufacturing method thereof, manufacturing method of display panel and transfer printing equipment | |
| CN117116963A (en) | Micro light-emitting module, display device and preparation method of micro light-emitting module | |
| CN112289899B (en) | Micro LED wafer structure and preparation method thereof | |
| WO2021245386A1 (en) | Optical device and method of manufacturing an optical device | |
| CN114242852B (en) | Preparation method and structure of full-color Micro LED | |
| CN116682843B (en) | Nanowire light-emitting device and preparation method thereof | |
| CN117832355A (en) | Micro LED chip, micro LED device and preparation method thereof | |
| US20230197693A1 (en) | Micro led display apparatus and method of manufacturing the same | |
| CN114823773A (en) | Device integration process for displaying red, green and blue based on micron LED transistor | |
| KR20180080932A (en) | Semiconductor Light Emitting Device | |
| CN116367663A (en) | Full-color micro-display device and preparation method thereof | |
| CN116897383A (en) | Method for manufacturing image display device and image display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |