TWI738263B - Display panel and manufacturing method thereof - Google Patents

Abstract

The present invention discloses a display panel and a manufacturing method thereof. The display panel includes a substrate and a plurality of first light-emitting elements, a plurality of second light-emitting elements, and a plurality of third light-emitting elements on the substrate. The light-emitting element and the third light-emitting element have different light-emitting colors; the first light-emitting element and the second light-emitting element are epitaxially grown on the substrate, and the third light-emitting element is bonded to the substrate. With the technical means of the present invention, the impact of the laser stripping process and the bonding process on the production yield of the display panel is reduced, and the difficulty of the bonding alignment during the mass transfer is reduced, and the colorization of the display panel, such as the micro display panel, is realized. show.

Description

Display panel and manufacturing method thereof

The embodiment of the present invention relates to the field of display technology, for example, to a display panel and a manufacturing method thereof.

Silicon-based microdisplay technology combines the display with a single crystal silicon integrated circuit. The display panel using silicon-based microdisplay technology has the advantages of higher display resolution, large viewing angle, fast response speed, high brightness and low power consumption, which makes Silicon-based microdisplay technology has broad application prospects in increasing the size and definition of image display, reducing the number of system chips to reduce the cost of the system and the space volume of products. At present, silicon-based microdisplay technology can be applied to military, medical, and aviation Aerospace and consumer electronics and other fields.

However, the laser peeling of the light-emitting chip and the welding process of the light-emitting chip and the backplane will greatly reduce the production yield of the display panel, and for the display panel using silicon-based microdisplay technology, the light-emitting chip can achieve high alignment accuracy. The mounting and welding technology is extremely difficult, further reducing the production yield of the display panel, and it is difficult to use the quantum dot color conversion technology in the related technology to realize the color display of the display panel.

The present invention provides a display panel and a manufacturing method thereof, which can reduce the influence of the laser stripping process and the bonding process on the production yield of the display panel, reduce the difficulty of bonding alignment during the mass transfer, and realize the display panel, such as a micro display Color display of the panel.

In a first aspect, in one embodiment, the present invention provides a display panel including:

A substrate and a plurality of first light-emitting elements, a plurality of second light-emitting elements, and a plurality of third light-emitting elements located on the aforementioned substrate, the light-emitting color of the aforementioned first light-emitting element, the aforementioned second light-emitting element, and the aforementioned third light-emitting element different;

The first light-emitting element and the second light-emitting element are epitaxially grown on the substrate, and the third light-emitting element is bonded to the substrate.

Optionally, the first light-emitting element and the second light-emitting element share an N-type semiconductor layer.

The display panel is simplified, and the utilization rate of the N-type semiconductor material in the light-emitting element is improved.

Optionally, the adjacent first light-emitting element and the second light-emitting element share a cathode structure, and all the cathode structures form a grid structure;

The cathode structure is located in the N-type semiconductor layer, and the N-type semiconductor layer includes a channel region located between the adjacent first light-emitting element and the second light-emitting element along the vertical direction In the direction of the plane where the aforementioned display panel is located, the aforementioned cathode structure is arranged corresponding to the aforementioned channel region.

The display panel is simplified, and the utilization rate of the cathode material in the light-emitting element is improved.

Optionally, the light-emitting function layer of each light-emitting element is located between the N-type semiconductor layer and the P-type semiconductor layer.

Effectively avoid the display abnormality problem caused by the short circuit of the anode structure and the cathode structure of the light-emitting element.

Optionally, the anode structure of the first light-emitting element and the anode structure of the second light-emitting element are both located on the side of the light-emitting function layer facing away from the substrate, and the anode structure of the third light-emitting element is located on the side facing the light-emitting function layer. One side of the aforementioned substrate;

The display panel further includes a plurality of pixel drive circuits located in the substrate, the anode structure of the first light-emitting element, the anode structure of the second light-emitting element, the anode structure of the third light-emitting element, and the corresponding pixel drive circuit Electrically connected, the cathode structure of the third light-emitting element is electrically connected to the cathode layer on the side of the third light-emitting element away from the substrate.

Realize active driving of the first light-emitting element, the second light-emitting element and the third light-emitting element.

Optionally, the area between the adjacent first light-emitting element and the second light-emitting element is provided with a pixel drive circuit corresponding to the first light-emitting element, a pixel drive circuit corresponding to the second light-emitting element, and a pixel drive circuit corresponding to the second light-emitting element. A pixel driving circuit of the third light-emitting element between the first light-emitting element and the second light-emitting element.

Make full use of the area between the adjacent first light-emitting element and the second light-emitting element to make the corresponding pixel drive circuit, so that the first light-emitting element, the second light-emitting element, and the third light-emitting element are easily connected to the corresponding pixel drive circuit to achieve For the first light-emitting element, the second light-emitting element Active driving of the third light-emitting element and the third light-emitting element.

Optionally, the aforementioned display panel further includes:

An insulating layer covering the first light emitting element and the second light emitting element, and a planarizing layer covering the first light emitting element, the second light emitting element, and the third light emitting element;

The anode structure of the first light-emitting element and the anode structure of the second light-emitting element penetrate the insulating layer and are electrically connected to the corresponding pixel drive circuit by penetrating part of the planarization layer, the insulating layer, and the through hole of the part of the substrate. connect;

The anode structure of the third light-emitting element is electrically connected to the corresponding pixel driving circuit through the through hole that penetrates the insulating layer and part of the substrate, and the cathode structure of the third light-emitting element is electrically connected to the corresponding pixel driving circuit through a portion of the planarization layer. The hole is electrically connected to the aforementioned cathode layer.

Realize active driving of the first light-emitting element, the second light-emitting element and the third light-emitting element.

Optionally, the aforementioned display panel further includes:

A plurality of pixel drive circuits, and the aforementioned pixel drive circuit is a digital drive circuit.

Avoiding the problem of susceptibility to interference of analog signals and low grayscale value adjustment accuracy in the use of analog driving circuits is beneficial to reduce the area occupied by the pixel driving circuit, for example, for silicon-based micro display panels, which is beneficial to improve the resolution of the display panel.

In a second aspect, an embodiment of the present invention further provides a manufacturing method of a display panel, which is used to manufacture the display panel as described in the first aspect, wherein the foregoing manufacturing method includes the following steps:

Provide substrate;

Epitaxially grow the first light-emitting element and the second light-emitting element on the substrate;

Epitaxially grow the aforementioned third light-emitting element on a temporary substrate;

The third light-emitting element is bonded to the substrate and the temporary substrate is peeled off.

Optionally, the manufacturing step of epitaxially growing the first light-emitting element and the second light-emitting element on the substrate includes:

A first crystal orientation is etched on the surface of the substrate corresponding to the first region; wherein, the first region is the region where the first light-emitting element and the second light-emitting element are located;

Forming an N-type semiconductor layer on the aforementioned substrate in a region corresponding to the aforementioned first region;

Forming a light-emitting functional layer of the first light-emitting element in a partial region of the N-type semiconductor layer; wherein the light-emitting functional layer of the first light-emitting element is a multi-quantum well layer;

Forming a light-emitting functional layer of the second light-emitting element in a partial region of the aforementioned N-type semiconductor layer; wherein the light-emitting functional layer of the second light-emitting element is a multi-quantum well layer;

P-type semiconductor layers are formed on the light-emitting functional layer of the first light-emitting element and the light-emitting functional layer of the second light-emitting element, respectively.

Realize the color display of the silicon-based micro-display panel.

The embodiment of the present invention provides a display panel and a manufacturing method thereof. The display panel includes a substrate and a plurality of first light-emitting elements, a plurality of second light-emitting elements, and a plurality of third light-emitting elements on the substrate. The first light-emitting element And the second light-emitting element is epitaxially grown on the substrate, and the third light-emitting element is bonded on the substrate to reduce the influence of the laser lift-off process and the bonding process on the production yield of the display panel, and reduce the bonding pair during mass transfer Bit-difficulty, to realize the display panel, for example, the color display of the micro-display panel.

1: The first light-emitting element

2: The second light-emitting element

3: The third light-emitting element

4: N-type semiconductor layer

5: Cathode structure

6: Light-emitting functional layer

7: P-type semiconductor layer

8: anode structure

9: Pixel drive circuit

10: Substrate

11: Cathode layer

12: Insulation layer

13: Planarization layer

14: Temporary substrate

15: cover

16: ITO current spreading layer

17: Bonding pad

18: The first mask

19: second mask

20: The third mask

91: The first pixel drive circuit

92: second pixel drive circuit

93: The third pixel drive circuit

By reading the detailed description of the non-limiting embodiments with reference to the following drawings, other features, purposes and advantages of the present invention will become more apparent:

[Fig. 1] is a schematic diagram of a cross-sectional structure of a display panel provided by an embodiment of the present invention.

[Fig. 2] is a schematic diagram of a top view structure of a display panel provided by an embodiment of the present invention.

[Fig. 3] is a schematic flowchart of a manufacturing method of a display panel provided by an embodiment of the present invention.

[Fig. 4] to [Fig. 14] are schematic diagrams of the cross-sectional structure corresponding to each step in Fig. 3.

The present invention will be further described in detail below with reference to the drawings and embodiments. It can be understood that the specific embodiments described here are only used to explain the present invention, but not to limit the present invention. In addition, it should be further noted that, for ease of description, only a part of the structure related to the present invention is shown in the drawings, but not all of the structure. Throughout this specification, the same or similar drawing symbols represent the same or similar structures, elements or processes. It should be noted that the embodiments of the present invention and the features in the embodiments can be combined with each other if there is no conflict.

1 is a schematic cross-sectional structure diagram of a display panel provided by an embodiment of the present invention; FIG. 2 is a schematic top view structure of a display panel provided by an embodiment of the present invention. 1 and 2, the display panel includes a substrate 10 and a plurality of first light-emitting elements 1, a plurality of second light-emitting elements 2 and a plurality of third light-emitting elements 3 on the substrate 10. The first light-emitting elements 1, Second luminous element The light-emitting color of the element 2 and the third light-emitting element 3 are different. The first light-emitting element 1 and the second light-emitting element 2 are epitaxially grown on the substrate 10, and the third light-emitting element 3 is bonded to the substrate 10.

Optionally, the first light-emitting element 1 can be set as a blue light-emitting element; the second light-emitting element 2 is a green light-emitting element; the third light-emitting element 3 is a red light-emitting element, and the first light-emitting element can be epitaxially grown on the substrate 10. 1 and the second light-emitting element 2, namely the blue light-emitting element and the green light-emitting element, the third light-emitting element 3, namely the red light-emitting element, is epitaxially grown on another substrate, and then the third light-emitting element is connected by flip-chip bonding technology. 3. That is, the red light-emitting element is bonded on the substrate 10 on which the first light-emitting element 1 and the second light-emitting element 2 are grown, that is, the substrate 10 on which the blue light-emitting element and the green light-emitting element are grown.

Optionally, the display panel can be a silicon-based microdisplay panel, and the light-emitting element can be a Micro LED. At present, when the silicon-based microdisplay panel is manufactured, if the silicon-based microdisplay panel contains three-color light-emitting elements, it needs to be transferred in batches at one time. One color of light-emitting element, using three laser peeling and bonding technology to complete the production of the display panel, but the laser peeling of the light-emitting element and the process of welding the light-emitting element and the backplane will damage the light-emitting element and greatly reduce the display panel. The production yield rate. In addition, for silicon-based micro display panels, the size of the light-emitting elements is extremely small, which makes it extremely difficult to achieve high-alignment precision flip-chip bonding technology for the light-emitting elements, that is, it is extremely difficult to align the light-emitting elements, which further reduces the production yield of the display panel.

1 and 2, by providing a display panel including a substrate 10 and a plurality of first light-emitting elements 1, a plurality of second light-emitting elements 2 and a plurality of third light-emitting elements 3 on the substrate 10, the first light-emitting element The element 1 and the second light-emitting element 2 are epitaxially grown on the substrate 10, and the third light-emitting element 3 is bonded to the substrate 10, eliminating the need for laser stripping and bonding processes for the first light-emitting element 1 and the second light-emitting element 2 , Thereby reducing the probability of damage to the light-emitting element by the laser lift-off process and the bonding process, and improve High display panel production yield. In addition, compared to the use of triple bond alignment, only the third light-emitting element 3 needs to be bonded and aligned, for example, for high-resolution display panels, such as silicon-based microdisplay panels. , Which greatly reduces the difficulty of bonding and alignment during mass transfer, and further improves the production yield of the display panel.

In addition, the related technologies for color display of display panels include quantum dot color conversion technology, that is, quantum dots of different colors are doped in the film layer to achieve color display. However, for high-resolution display panels, such as silicon-based micro In the display panel, the size of the light-emitting element is extremely small, and it is difficult to use the quantum dot color conversion technology in the related art to realize the color display. In the embodiment of the present invention, the first light-emitting element 1 and the second light-emitting element 2 can be epitaxially grown on the substrate 10, and the third light-emitting element 3 can be epitaxially grown on another temporary substrate. Therefore, multiple quantum well layers of different colors can be used to make Different light-emitting elements emit light of different colors, thereby realizing the color display of a display panel, such as a silicon-based microdisplay panel.

Optionally, in conjunction with Figures 1 and 2, the first light-emitting element 1 and the second light-emitting element 2 can be provided to share the N-type semiconductor layer 4, for example, the first light-emitting element 1 and the second light-emitting element can be provided on the substrate 10. 2. For example, a patterned N-type semiconductor layer 4 is formed on the position of the blue light-emitting element and the green light-emitting element. Take the matrix arrangement of the first light-emitting element 1, the second light-emitting element 2 and the third light-emitting element 3 as an example, the patterning The N-type semiconductor layer 4 covers the position on the substrate 10 where the first light-emitting element 1 and the second light-emitting element 2 are required, and exposes the position where the third light-emitting element 3 is required on the substrate 10, such as the position of the red light-emitting element. The light-emitting element 1 and the second light-emitting element 2, such as blue light-emitting elements and green light-emitting elements, share the N-type semiconductor layer 4, simplifying the manufacturing process of display panels, such as silicon-based microdisplay panels, and improving the utilization of N-type semiconductor materials in light-emitting elements Rate.

Optionally, in conjunction with FIG. 1 and FIG. 2, adjacent first light-emitting elements 1 may be provided And the second light-emitting element 2 share the cathode structure 5, all the cathode structures 5 form a grid structure, the cathode structure 5 is located in the N-type semiconductor layer 4, and the N-type semiconductor layer 4 includes adjacent first light-emitting elements 1 and The channel region a between the two light-emitting elements 2 is along the direction perpendicular to the display panel, and the cathode structure 5 is arranged corresponding to the channel region a.

1 and 2, the first light-emitting element 1 and the second light-emitting element 2, such as a blue light-emitting element and a green light-emitting element share a cathode structure 5, and the cathode structure 5 of the two is located in the N-type semiconductor layer 4 shared by both Among them, the N-type semiconductor layer 4 includes a channel region a located between the adjacent first light-emitting element 1 and the second light-emitting element 2, and the channel region a has an electron doping concentration relative to other positions of the N-type semiconductor layer 4 Smaller, a channel region a is formed, and the cathode structure 5 is arranged corresponding to the channel region a to realize the transmission of electrons to the light-emitting function layer 6 so that the first light-emitting element 1 and the second light-emitting element 2 emit light. In addition, a grid-like structure formed by the cathode structure 5 corresponding to the first light-emitting element 1 and the second light-emitting element 2 can be arranged to be electrically connected to the driving chip through the cathode signal line around the non-display area, thereby realizing the driving chip to emit light to the first The transmission of the cathode signal of the element 1 and the second light-emitting element 2 causes the first light-emitting element 1 and the second light-emitting element 2 to emit light. In addition, the adjacent first light-emitting element 1 and the second light-emitting element 2 are provided to share the cathode structure 5, which also simplifies the manufacturing process of display panels, such as silicon-based microdisplay panels, and improves the utilization of cathode materials in the light-emitting elements.

Optionally, in conjunction with FIG. 1 and FIG. 2, the light-emitting functional layer 6 of each light-emitting element can be located between the N-type semiconductor layer 4 and the P-type semiconductor layer 7, for example, a first light-emitting element 1 and a second light-emitting element can be provided. 2 is a Micro LED with a front-mounted structure, and the third light-emitting element 3 is a vertical Micro LED. The light-emitting functional layer 6 is located between the N-type semiconductor layer 4 and the P-type semiconductor layer 7, and the anode structure 8 of the light-emitting element is located in the P-type The side of the semiconductor layer 7 facing away from the light-emitting functional layer 6, and the cathode structure 5 is located on the side of the light-emitting functional layer 6 facing away from the P-type semiconductor layer 7, that is, each The anode structure 8 and the cathode structure 5 of each light-emitting element are located on both sides of the light-emitting function layer 6. For high-resolution display panels, such as silicon-based microdisplay panels, the size of the light-emitting element is extremely small. The anode structure 8 and the cathode structure 5 are located in the light-emitting The same side of the functional layer 6 will make the anode structure 8 and the cathode structure 5 of the light-emitting element easily short-circuit, which affects the normal display of the display panel. The anode structure 8 and the cathode structure 5 of each light-emitting element are located on both sides of the light-emitting functional layer 6. This effectively avoids the display abnormality problem caused by the short circuit of the anode structure 8 and the cathode structure 5 of the light-emitting element.

Optionally, in conjunction with FIG. 1 and FIG. 2, it can be arranged that the anode structure 8 of the first light-emitting element 1 and the anode structure 8 of the second light-emitting element 2 are both located on the side of the light-emitting function layer 6 facing away from the substrate 10, and the third light-emitting element The anode structure 8 of the element 3 is located on the side of the light-emitting functional layer 6 facing the substrate 10. The display panel further includes a plurality of pixel driving circuits 9 located in the substrate 10, the anode structure 8 of the first light-emitting element 1, and the second light-emitting element The anode structure 8 of 2 and the anode structure 8 of the third light-emitting element 3 are electrically connected to the corresponding pixel driving circuit 9.

1 and 2, the anode structure 8 of the first light-emitting element 1 and the anode structure 8 of the second light-emitting element 2 are both located on the side of the light-emitting function layer 6 facing away from the substrate 10, and the light-emitting function layer of each light-emitting element 6 is located between the N-type semiconductor layer 4 and the P-type semiconductor layer 7, and the cathode structure 5 of the first light-emitting element 1 and the cathode structure 5 of the second light-emitting element 2 are both located on the side of the light-emitting function layer 6 facing the substrate 10. The first light-emitting element 1 and the second light-emitting element 2 share the cathode structure 5 and all the cathode structures 5 form a grid-like structure. The grid-like cathode structure 5 is electrically connected to the cathode signal line in the non-display area. The first light-emitting element 1 and The cathode structure 5 of the second light-emitting element 2 receives the cathode signal, the anode structure 8 of the first light-emitting element 1 and the anode structure 8 of the second light-emitting element 2 are electrically connected to the corresponding pixel drive circuit 9 located in the substrate 10, and the pixel The driving circuit 9 provides anode signals to the first light-emitting element 1 and the second light-emitting element 2 to realize the first light-emitting Active driving of element 1 and second light-emitting element 2.

The anode structure 8 of the third light-emitting element 3 is located on the side of the light-emitting functional layer 6 facing the substrate 10, and the light-emitting functional layer 6 of each light-emitting element is located between the N-type semiconductor layer 4 and the P-type semiconductor layer 7, then the third The cathode structure 5 of the light-emitting element 3 is located on the side of the light-emitting function layer 6 facing away from the substrate 10, and the cathode structure 5 of the third light-emitting element 3 is electrically connected to the cathode layer 11 located on the side of the third light-emitting element 3 facing away from the substrate 10 The cathode layer 11 can be connected to the cathode signal line in the non-display area, and the driving chip transmits the cathode signal to the cathode layer 11 through the cathode signal line. The cathode structure 5 of the third light-emitting element 3 receives the cathode signal. In addition, the third light-emitting element 3 The anode structure 8 is electrically connected to the corresponding pixel driving circuit 9 located in the substrate 10, and the pixel driving circuit provides an anode signal to the third light-emitting element 3 to realize active driving of the third light-emitting element 3.

Optionally, with reference to FIGS. 1 and 2, the area a0 between the adjacent first light-emitting element 1 and the second light-emitting element 2 may be provided with corresponding first light-emitting element 1, this second light-emitting element 2 and correspondingly located The pixel driving circuit 9 of the third light-emitting element 3 between the first light-emitting element 1 and the second light-emitting element 2.

With reference to Figures 1 and 2, taking the matrix arrangement of the first light-emitting element 1, the second light-emitting element 2 and the third light-emitting element 3 as an example, it can correspond to the area between the adjacent first light-emitting element 1 and the second light-emitting element 2 Three pixel drive circuits 9 are provided in the substrate 10 of a0. Taking the first light-emitting element 1, the second light-emitting element 2 and the third light-emitting element 3 as examples, the first pixel drive circuit 91 and the first light-emitting element 1 can be provided. Connected, the second pixel driving circuit 92 is electrically connected to the second light-emitting element 2, and the third pixel driving circuit 93 is electrically connected to the third light-emitting element 3.

In addition, the surface of the substrate 10 used for epitaxial growth of the first light-emitting element 1 and the second light-emitting element 2 can be corroded into the first crystal orientation. The first crystal orientation can be, for example, the 111 crystal orientation. The surface is zigzag as shown in FIG. 1. The surface of the substrate 10 where the first light-emitting element 1 and the second light-emitting element 2 are not provided can maintain the second crystal orientation. The second crystal orientation may be, for example, 100 crystal orientation. As shown in FIG. 1 as a plane, the pixel driving circuit 9 can be arranged in the area where the substrate 10 with 100 crystal orientation is located, so that the first light-emitting element 1 and the second light-emitting element 1 and the second light-emitting element 1 and the second light-emitting element 1 and the second are epitaxially grown in the area where the substrate 10 with the 111 crystal orientation is located. The light-emitting element 2 realizes the monolithic integration of the first light-emitting element 1 and the second light-emitting element 2, and at the same time, makes full use of the area a0 between the adjacent first light-emitting element 1 and the second light-emitting element 2 to make a corresponding pixel drive circuit 9. Make the first light-emitting element 1, the second light-emitting element 2, and the third light-emitting element 3 easy to connect with the corresponding pixel driving circuit 9 to realize the connection of the first light-emitting element 1, the second light-emitting element 2 and the third light-emitting element 3. Active drive.

Optionally, in conjunction with FIGS. 1 and 2, the display panel can be arranged to further include an insulating layer 12 covering the first light-emitting element 1 and the second light-emitting element 2, and covering the first light-emitting element 1, the second light-emitting element 2, and the third light-emitting element. The planarization layer 13 of the element 3, the anode structure 8 of the first light-emitting element 1 and the anode structure 8 of the second light-emitting element 2 penetrate the insulating layer 12 and pass through a portion of the planarization layer 13, the insulating layer 12, and a portion of the substrate 10. The through hole is electrically connected to the corresponding pixel driving circuit 9. The anode structure 8 of the third light emitting element 3 is electrically connected to the corresponding pixel driving circuit 9 through the through hole penetrating the insulating layer 12 and part of the substrate 10, and the third light emitting element 3 The cathode structure 5 is electrically connected to the cathode layer 11 on the side of the third light-emitting element 3 facing away from the substrate 10 through a through hole penetrating part of the planarization layer 13.

1 and 2, the light-emitting element includes a light-emitting functional layer 6, an N-type semiconductor layer 4 and a P-type semiconductor layer 7 located on both sides of the light-emitting functional layer 6, an anode structure 8 and a cathode structure 5, the insulating layer 12 referred to here Covering the first light-emitting element 1 and the second light-emitting element 2 is an N-type semiconductor covering at least the first light-emitting element 1 and the second light-emitting element 2 with an insulating layer 12 Layer 4, light-emitting functional layer 6, and P-type semiconductor layer 7. The planarization layer 13 covers the first light-emitting element 1, the second light-emitting element 2, and the third light-emitting element 3, which can also be understood as planarization covering at least the first light-emitting element 1, The N-type semiconductor layer 4, the light-emitting functional layer 6, and the P-type semiconductor layer 7 of the second light-emitting element 2 and the third light-emitting element 3 are provided.

Holes can be punched at the position where the insulating layer 12 covers the first light-emitting element 1 and the second light-emitting element 2 to expose the anode structure 8 of the first light-emitting element 1 and the anode structure 8 of the second light-emitting element 2, and then by flattening the parts The formation layer 13, the insulating layer 12, and part of the substrate 10 are perforated to make wires connecting the anode structure 8 of the first light-emitting element 1, the anode structure 8 of the second light-emitting element 2 and the corresponding pixel driving circuit 9, as shown in Figure 1 The arc connecting the anode structure 8 of the first light-emitting element 1, the anode structure 8 of the second light-emitting element 2 and the corresponding pixel drive circuit 9 shown in the figure, that is, the anode structure 8 of the first light-emitting element 1 and the second light-emitting element 2 The anode structure 8 penetrates through the insulating layer 12 and is electrically connected to the corresponding pixel drive circuit 9 through the through holes that penetrate part of the planarization layer 13, the insulating layer 12, and part of the substrate 10, so that the pixel drive circuit 9 is connected to the first light-emitting element 1 The anode structure 8 and the anode structure 8 of the second light-emitting element 2 transmit anode signals.

It should be noted that FIG. 1 exemplarily shows the wires connecting the anode structure 8 of the first light-emitting element 1 and the anode structure 8 of the second light-emitting element 2 with the corresponding pixel driving circuit 9 in arcs. It can be understood that the wires are The process is compatible with the current semiconductor manufacturing process.

Optionally, a hole can be punched in the insulating layer 12 corresponding to the area a0 between the adjacent first light-emitting element 1 and the second light-emitting element 2 to expose the anode structure 8 on the substrate 10 for bonding the third light-emitting element 3 The bonding pad 17 of the substrate 10 corresponds to the area a0 between the adjacent first light-emitting element 1 and the second light-emitting element 2 to form a bonding pad 17 penetrating the insulating layer 12, and the bonding pad 17 is bonded The anode structure 8 of the third light-emitting element 3 is combined, and the bonding pad 17 is partially lined by penetrating The through hole of the bottom 10 is electrically connected to the pixel driving circuit 9 corresponding to the third light-emitting element 3. That is, the anode structure 8 of the third light-emitting element 3 is connected to the corresponding pixel driving circuit through the through hole penetrating the insulating layer 12 and part of the substrate 10 9 is electrically connected to realize that the pixel driving circuit 9 transmits the anode signal to the anode structure 8 of the third light-emitting element 3.

Optionally, a hole can be punched in the area of the planarization layer 13 corresponding to the third light-emitting element 3 to expose the cathode structure 5 of the third light-emitting element 3. The third light-emitting element 3 is provided with a cathode layer 11 on the side facing away from the substrate 10. The cathode layer 11 receives the cathode signal transmitted by the cathode signal line. The cathode structure 5 of the third light-emitting element 3 has a through hole penetrating part of the planarization layer 13 and the cathode layer 11 on the side of the third light-emitting element 3 facing away from the substrate 10 Electrically connected, the cathode structure 5 of the third light-emitting element 3 receives the cathode signal.

Optionally, in conjunction with Figures 1 and 2, the display panel includes a plurality of pixel drive circuits 9. The pixel drive circuit 9 is a digital drive circuit. The digital drive circuit uses a digital signal to drive the light-emitting element to emit light, by controlling the light-emitting time of the light-emitting element. Adjust the light-emitting brightness of the light-emitting element to avoid the problems of susceptibility to interference of analog signals and low grayscale value adjustment accuracy in the use of analog driving circuits, and the digital driving circuit does not include a capacitor structure, which is conducive to reducing the area occupied by the pixel driving circuit, for example For the silicon-based micro display panel, it is beneficial to improve the resolution of the display panel. For example, the digital driving circuit can adopt an SRAM (Static Random Access Memory, static random access memory) circuit to realize the active driving of the display panel.

It should be noted that FIG. 1 only exemplarily uses one thin film transistor to represent one pixel driving circuit 9, and does not represent the actual number of thin film transistors in the pixel driving circuit 9. In addition, it should be noted that the drawings in the embodiments of the present invention are only illustrative of the size of each element, and do not represent the actual size of each element.

The embodiment of the present invention further provides a method for manufacturing a display panel. FIG. 3 is a schematic flowchart of a method for manufacturing a display panel provided by an embodiment of the present invention. The manufacturing method is used to manufacture the display panel of the above-mentioned embodiment, as shown in FIG. 3 , The manufacturing method of the display panel includes:

Step S101, providing a substrate;

Step S102, epitaxially grow the first light-emitting element and the second light-emitting element on the substrate;

Step S103, epitaxially grow a third light-emitting element on the temporary substrate;

Step S104, bonding the third light-emitting element to the substrate and peeling off the temporary substrate.

In the foregoing step S101, a substrate is provided.

In conjunction with FIG. 1, FIG. 2 and FIG. 4, a substrate 10 is provided. For example, the substrate 10 may be a silicon-based substrate 10.

In the foregoing step S102, the first light-emitting element and the second light-emitting element are epitaxially grown on the substrate.

With reference to Figures 1, 2 and 5, the first crystal orientation can be etched on the surface of the substrate 10 corresponding to the first area a1. The first area a1 is the area where the first light-emitting element 1 and the second light-emitting element 2 are located, for example, The area a1 where the first light-emitting element 1 and the second light-emitting element 2 need to be formed on a 4-inch or 8-inch silicon-based wafer with 100 crystal orientations is imaged and etched with a wet method to form 111 crystal orientations, that is, the first Crystal direction.

With reference to Figure 1, Figure 2 and Figure 6, an N-type semiconductor layer 4 is formed on the substrate 10 in a region corresponding to the first region a1. The first light-emitting element 1 and the second light-emitting element 2 share the N-type semiconductor layer 4. An N-type semiconductor layer 4 is formed on the bottom 10 in regions corresponding to the first light-emitting element 1 and the second light-emitting element 2, and the N-type semiconductor layer 4 forms a grid-like structure as shown in FIG. 2, for example, Use a first photomask 18 to grow a buffer layer (not shown in the figure) and an N-type made of ALN (aluminum nitride) material or GAN (gallium nitride) material in the MOCVD (metal organic compound chemical vapor deposition) chamber The semiconductor layer 4, for example, an N-GaN layer, that is, an N-type gallium nitride layer, can form a grid-like first light-emitting element 1 when forming the N-type semiconductor layer 4 of the first light-emitting element 1 and the second light-emitting element 2 And the cathode structure 5 of the second light-emitting element 2.

With reference to Figures 1, 2 and 7, the light-emitting functional layer 6 of the first light-emitting element 1 is formed in a partial area of the N-type semiconductor layer 4. The light-emitting functional layer 6 of the first light-emitting element 1 is a multi-quantum well layer. For example, the element 1 can be a blue light-emitting element, and the second photomask 19 can be used to grow the light-emitting function layer 6 of the first light-emitting element 1, that is, a blue multi-quantum well layer. Nitrogen can be used as a carrier gas in this process.

With reference to Figures 1, 2 and 8, the light-emitting functional layer 6 of the second light-emitting element 2 is formed in another part of the N-type semiconductor layer 4. The light-emitting functional layer 6 of the second light-emitting element 2 is a multi-quantum well layer, and the second The light-emitting element 2 can be a green light-emitting element, for example, and the second mask 19 for growing the first light-emitting element 1 can be used to continue to grow the light-emitting functional layer 6 of the second light-emitting element 2, that is, a green light multi-quantum well layer. The process can also use nitrogen as a carrier gas.

With reference to Figures 1, 2 and 9, a P-type semiconductor layer 7 is formed on the light-emitting functional layer 6 of the first light-emitting element 1 and the light-emitting functional layer 6 of the second light-emitting element 2, for example, the light-emitting function of the first light-emitting element 1 The functional layer 6 and the light-emitting functional layer 6 of the second light-emitting element 2 are respectively grown on a P-type GaN layer, and then the ITO current spreading layer 16 can be further grown to be formed on the P of the first light-emitting element 1 and the second light-emitting element 2 respectively. Above the type semiconductor layer 7, the ITO current spreading layer 16 is beneficial to improve the uniformity of the carrier distribution in the light-emitting function layer 6, and optimize the light-emitting effect of the light-emitting element. The P-type semiconductor layer 7 and the ITO current spreading layer 16 can share the third Mask 20 form.

With reference to Figures 1, 2 and 10, after the ITO current spreading layer 16 is formed, the third mask 20 is removed, and the entire silicon oxide insulating layer 12 is grown to cover the first light-emitting element 1 and the second light-emitting element grown before 2.

1, 2 and 11, after forming the above-mentioned insulating layer 12, a pixel driving circuit 9 can be fabricated on the 100 crystal plane of the substrate 10 by using a semiconductor process. The pixel driving circuit 9 can be a capacitorless digital driving circuit, such as SRAM The driving circuit, the pixel driving circuit 9 can be completed on the limited space of the silicon-based backplane. Exemplarily, after the insulating layer 12 is fabricated, the insulating layer 12 and part of the substrate 10 can be etched to form a groove corresponding to the area between the adjacent first light-emitting element 1 and the second light-emitting element 2. The corresponding pixel driving circuit 9 is formed in the groove by the semiconductor manufacturing process of the thin film transistor, and finally the structure shown in FIG. 11 is formed.

With reference to Figure 1, Figure 2 and Figure 12, a hole can be opened at the position where the insulating layer 12 covers the first light-emitting element 1 and the second light-emitting element 2, and the anode structure of the first light-emitting element 1 and the second light-emitting element 2 can be fabricated by a deposition process 8. The material constituting the anode structure 8 can include chromium platinum, and the insulating layer 12 between the adjacent first light-emitting element 1 and the second light-emitting element 2 is etched at the same time to reserve for bonding the third light-emitting element 3, For example, the bonding pad 17 of the anode structure 8 of the red light-emitting element.

In the foregoing step S103, the third light-emitting element is epitaxially grown on the temporary substrate.

1, 2 and 13, the temporary substrate 14 may be, for example, a GaAs (gallium arsenide) substrate, and a third light-emitting element 3, such as a red light-emitting element, is epitaxially grown on the temporary substrate 14, such as a red light-emitting element. The N-type semiconductor layer 4, the light-emitting functional layer 6, the P-type semiconductor layer 7 and the anode structure 8 of the third light-emitting element 3 are sequentially formed on the 14th. The light-emitting functional layer 6 is a red light quantum well layer, which is beneficial to realize the color display of the display panel. , To solve the difficulty of color display for micro-display panels The problem.

In the foregoing step S104, the third light-emitting element is bonded to the substrate and the temporary substrate is peeled off.

With reference to Figure 1, Figure 2 and Figure 13, the third light-emitting element 3 fabricated on the temporary substrate 14 is correspondingly bonded to the driving backplane, that is, the substrate 10, and the third light-emitting element 3 is flip-chip bonded. After bonding, the temporary substrate 14 is peeled off, as shown in FIG. 14.

With reference to Figures 1 and 2, a planarization layer 13 is fabricated on the backplane containing the picture elements, and the anode structure 8 of the first light-emitting element 1 and the second light-emitting element 2 is electrically connected to the pixel driving circuit 9 on the backplane. The flattening layer 13 forms a cathode layer 11 on the side facing away from the substrate 10. The cathode structure 5 of the third light-emitting element 3 is electrically connected to the cathode layer 11. It is packaged with a cover plate, and the cover plate 15 can be a glass cover plate.

1: The first light-emitting element

2: The second light-emitting element

3: The third light-emitting element

4: N-type semiconductor layer

5: Cathode structure

6: Light-emitting functional layer

7: P-type semiconductor layer

8: anode structure

9: Pixel drive circuit

10: Substrate

11: Cathode layer

12: Insulation layer

13: Planarization layer

15: cover

16: ITO current spreading layer

17: Bonding pad

91: The first pixel drive circuit

92: second pixel drive circuit

93: The third pixel drive circuit

Claims (10)

A display panel, characterized in that it comprises: a substrate; a plurality of first light-emitting elements, a plurality of second light-emitting elements, and a plurality of third light-emitting elements located on the aforementioned substrate, the aforementioned first light-emitting element and the aforementioned second light-emitting element The light-emitting color of the element and the third light-emitting element are different; the first light-emitting element and the second light-emitting element are epitaxially grown on the substrate, and the third light-emitting element is bonded to the substrate; wherein, the adjacent ones are The first light-emitting element and the second light-emitting element share a cathode structure, and all the cathode structures form a grid structure. The display panel described in the first item of the scope of patent application, wherein the first light-emitting element and the second light-emitting element share an N-type semiconductor layer. As for the display panel described in claim 2, wherein, the cathode structure is located in the N-type semiconductor layer, and the N-type semiconductor layer includes a device located between the adjacent first light-emitting element and the second light-emitting element. The channel region is along a direction perpendicular to the plane where the display panel is located, and the cathode structure is arranged corresponding to the channel region. As for the display panel described in any one of items 1 to 3 in the scope of patent application, the light-emitting function layer of each light-emitting element is located between the N-type semiconductor layer and the P-type semiconductor layer. As for the display panel described in item 4 of the scope of patent application, wherein the anode structure of the first light-emitting element and the anode structure of the second light-emitting element are both located on the side of the light-emitting function layer facing away from the substrate, and the third The anode structure of the light-emitting element is located forward on the aforementioned light-emitting functional level The side of the substrate; the display panel further includes a plurality of pixel drive circuits located in the substrate, the anode structure of the first light-emitting element, the anode structure of the second light-emitting element, and the anode structure of the third light-emitting element It is electrically connected to the corresponding pixel driving circuit, and the cathode structure of the third light-emitting element is electrically connected to the cathode layer on the side of the third light-emitting element away from the substrate. As for the display panel described in item 5 of the scope of patent application, the area between the adjacent first light-emitting element and the second light-emitting element is provided with a pixel drive circuit corresponding to the first light-emitting element and corresponding to the second light-emitting element. A pixel driving circuit of the light-emitting element, and a pixel driving circuit corresponding to the third light-emitting element located between the first light-emitting element and the second light-emitting element. The display panel described in claim 6 further includes: an insulating layer covering the first light-emitting element and the second light-emitting element, and covering the first light-emitting element, the second light-emitting element, and the first light-emitting element. The planarization layer of three light-emitting elements; the anode structure of the first light-emitting element and the anode structure of the second light-emitting element penetrate the insulating layer and by penetrating part of the planarization layer, the insulating layer and part of the substrate through holes It is electrically connected to the corresponding pixel drive circuit; the anode structure of the third light-emitting element is electrically connected to the corresponding pixel drive circuit through the through hole penetrating the insulating layer and part of the substrate, and the cathode structure of the third light-emitting element The cathode layer is electrically connected through a through hole penetrating part of the planarization layer. Such as the display panel described in item 1 of the scope of patent application, wherein the aforementioned display panel is further It includes: a plurality of pixel drive circuits, and the aforementioned pixel drive circuit is a digital drive circuit. A method for manufacturing a display panel, which is used to manufacture a display panel as described in any one of items 1 to 8 in the scope of the patent application, and is characterized in that it includes: providing a substrate; and epitaxially growing the first A light-emitting element and the second light-emitting element; the third light-emitting element is epitaxially grown on a temporary substrate; the third light-emitting element is bonded to the substrate and the temporary substrate is peeled off. The manufacturing method of the display panel as described in claim 9, wherein the epitaxial growth of the first light-emitting element and the second light-emitting element on the substrate includes: etching the surface of the first region corresponding to the substrate A first crystal orientation; wherein, the first region is the region where the first light-emitting element and the second light-emitting element are located; an N-type semiconductor layer is formed on the substrate corresponding to the region of the first region; in the N-type semiconductor A part of the layer forms the light-emitting function layer of the first light-emitting element; wherein the light-emitting function layer of the first light-emitting element is a multi-quantum well layer; and a part of the N-type semiconductor layer forms the light-emitting function of the second light-emitting element Wherein, the light-emitting functional layer of the second light-emitting element is a multi-quantum well layer; a P-type semiconductor layer is formed on the light-emitting functional layer of the first light-emitting element and the light-emitting functional layer of the second light-emitting element, respectively.

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