CN117832355A - Micro LED chip, micro LED device and preparation method thereof - Google Patents

Abstract

The embodiment of the disclosure provides a micro LED chip, a micro LED device, a preparation method of the micro LED chip and a preparation method of the micro LED device, wherein the micro LED chip comprises a substrate, an epitaxial layer, a current diffusion layer, a first electrode and a second electrode; the epitaxial layer is arranged on the substrate, and the epitaxial layer sequentially comprises in a direction away from the substrate: a first gallium nitride layer, a quantum well layer, a second gallium nitride layer; the current diffusion layer is arranged on the surface of the second gallium nitride layer, which is away from the substrate; the first electrode is deposited on the surface of the substrate, which is away from the epitaxial layer, and the second electrode is deposited on the surface of the current diffusion layer, which is away from the epitaxial layer; wherein the substrate is a substrate homogenous with the first gallium nitride layer. The application adopts the homogeneous substrate, has better current longitudinal diffusion performance, effectively relieves the current congestion effect on the n electrode, and improves the luminous uniformity of the pixel.

Description

Micro LED chip, micro LED device and preparation method thereof

Technical Field

The embodiment of the disclosure relates to the technical field of semiconductors, in particular to a micro LED chip, a micro LED device, a preparation method of the micro LED chip and a preparation method of the micro LED device.

Background

In recent years, micro LEDs are widely regarded as a final display technology due to the characteristics of self-luminescence, high efficiency, low power consumption, high stability and the like, and have wide application prospects in the fields of wearable electronic equipment, outdoor display, AR/VR helmets and the like. Currently, most micro LED devices adopt a horizontal structure based on a sapphire substrate, i.e. a p electrode and an n electrode are located on the same side of a micro LED chip.

Such a horizontal structure facilitates flip-chip bonding and integration onto the back plate, but at the same time there are many limitations. For example, the non-uniform distance that current flows laterally inside the chip can lead to current crowding effects, which can be further exacerbated as current increases, thereby reducing the carrier concentration in localized areas of the device and reducing the radiative recombination rate of electron-hole pairs generated by injection into the active region, ultimately affecting the light emitting performance of the device.

Therefore, research and development of micro LEDs based on vertical structures are of great importance.

Disclosure of Invention

The embodiments described herein provide a micro LED chip, a micro LED device, a method for manufacturing a micro LED chip, and a method for manufacturing a micro LED device, which aim to provide a micro LED implementation scheme with a vertical structure.

In a first aspect of embodiments of the present disclosure, a micro LED chip is provided, including a substrate, an epitaxial layer, a current diffusion layer, a first electrode, and a second electrode;

the epitaxial layer is arranged on the substrate, and the epitaxial layer sequentially comprises, in a direction away from the substrate: a first gallium nitride layer, a quantum well layer, a second gallium nitride layer; the current diffusion layer is arranged on the surface of the second gallium nitride layer, which is away from the substrate;

the first electrode is deposited on the surface of the substrate, which is away from the epitaxial layer, and the second electrode is deposited on the surface of the current diffusion layer, which is away from the epitaxial layer;

wherein the substrate is a substrate homogenous with the first gallium nitride layer.

Optionally, the widths of the first gallium nitride layer, the quantum well layer and the second gallium nitride layer are the same, the widths of the substrate and the epitaxial layer are the same, the lengths of the first gallium nitride layer, the quantum well layer and the second gallium nitride layer are the same, and the lengths of the substrate and the epitaxial layer are the same, so that the substrate and the epitaxial layer form a mesa without steps or side walls.

Optionally, the first gallium nitride layer is an n-type gallium nitride layer, and the second gallium nitride layer is a p-type gallium nitride layer.

Optionally, the micro LED chip includes a light emitting unit array formed by a plurality of light emitting units, current diffusion layers of two adjacent light emitting units are isolated from each other, and second electrodes of two connected light emitting units are isolated from each other.

Optionally, the semiconductor device further comprises an electron blocking layer arranged between the quantum well layer and the second gallium nitride layer.

In a second aspect of embodiments of the present disclosure, there is provided a micro LED device including a plurality of micro LED chips according to any one of the above and a driving substrate;

the miniature LED chip is arranged on the driving substrate, the second electrode is bonded with the third electrode of the driving substrate through the bonding layer, and the first electrode is electrically connected with the fourth electrode of the driving substrate through a wire.

Optionally, the micro LED chip includes a light emitting unit array formed by a plurality of light emitting units, the bonding layer includes bonding blocks corresponding to the light emitting units one by one, and the bonding between the second electrode and the third electrode of the driving substrate is achieved through the bonding layer, including:

each light-emitting unit is bonded with a third electrode corresponding to the light-emitting unit one by one through a corresponding bonding block, so that the light-emitting units are electrically connected with a corresponding driving circuit in the driving substrate.

Optionally, the bonding block is a spheroidal metal structure.

In a third aspect of the embodiments of the present disclosure, a method for manufacturing a micro LED chip is provided, including:

providing a substrate;

sequentially growing in a direction away from the substrate: a first gallium nitride layer, a quantum well layer and a second gallium nitride layer which are homogeneous with the substrate, so as to obtain an epitaxial layer;

a current diffusion layer is arranged on the surface, facing away from the substrate, of the second gallium nitride layer;

depositing a first electrode on the surface of the substrate facing away from the epitaxial layer;

and depositing a second electrode on the surface of the current diffusion layer, which is away from the epitaxial layer.

In a fourth aspect of the embodiments of the present disclosure, a method for manufacturing a micro LED device is provided, including:

providing a micro LED chip prepared according to the preparation method of any one of the micro LED chips described above;

depositing a bonding layer on the surface of the second electrode;

inverting the micro LED chip to enable the driving substrate to realize the bonding between the second electrode and the third electrode of the driving substrate through the bonding layer;

the first electrode is electrically connected with the fourth electrode of the driving substrate through a wire.

The miniature LED chip provided by the application adopts the vertical structure of the gallium nitride substrate, compared with a heterogeneous substrate used in a horizontal structure, the adoption of the homogeneous substrate has better current longitudinal diffusion performance, effectively relieves the current congestion effect on the n-electrode, and improves the luminous uniformity of pixels. Compared with the common sapphire substrate, the gallium nitride substrate has good electric conduction and heat conduction properties, so that the problems of insufficient heat dissipation and the like caused by the sapphire substrate can be solved. The gallium nitride substrate has smaller lattice mismatch between the homoepitaxial structure and the material, and can effectively reduce the high defect density caused by the heterogeneous substrate, thereby improving the quality of epitaxial crystals. In addition, the vertical flip-chip structure using the gallium nitride substrate does not need to carry out the process steps of transferring, bonding, thinning or polishing the substrate, and the like, thereby avoiding the damage to the active region of the device, and avoiding etching the mesa structure, and greatly simplifying the process flow and reducing the operation difficulty.

In addition, the application also provides a micro LED device with the technical effects, a preparation method of the micro LED chip and a preparation method of the micro LED device.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the following brief description of the drawings of the embodiments will be given, it being understood that the drawings described below relate only to some embodiments of the present disclosure, not to limitations of the present disclosure, in which:

FIG. 1 is a schematic diagram of one embodiment of a micro LED chip provided herein;

FIG. 2 is a schematic diagram of one embodiment of a micro LED device provided herein;

FIG. 3 is a flow chart of one embodiment of a method of fabricating a micro LED chip provided herein;

FIG. 4 is a flow chart of another embodiment of a method of fabricating a micro LED chip provided herein;

FIG. 5 is a flow chart of one embodiment of a method of fabricating a micro LED device provided herein;

fig. 6 is a schematic structural diagram of the micro LED chip 100 generated in S501-S505;

FIG. 7 is a schematic view of a process of depositing a bonding block 61 on the surface of the second electrode;

FIG. 8 is a schematic diagram of a process of bonding micro LED chips upside down;

fig. 9 is a schematic view of a micro LED chip in a top view.

Elements in the figures are illustrated schematically and not drawn to scale.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings. It will be apparent that the described embodiments are some, but not all, of the embodiments of the present disclosure. All other embodiments, which can be made by those skilled in the art based on the described embodiments of the present disclosure without the need for creative efforts, are also within the scope of the protection of the present disclosure.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the presently disclosed subject matter belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the specification and relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein. Terms such as "first" and "second" are used merely to distinguish one element (or portion of an element) from another element (or portion of an element).

In the device adopting the vertical structure, the p electrode and the n electrode are positioned at two sides of the LED chip. Compared with the horizontal structure, the vertical structure has the following advantages: first, the current passes almost vertically through the epitaxial layer, greatly reducing the lateral current and reducing the current crowding effect, thus making the light emission more uniform. In addition, the vertical structure generally adopts a substrate with high electric conductivity and good heat dissipation, and the heat conduction performance is further improved. Second, the vertical chip has reduced optical crosstalk due to single-sided light emission and no side light, and can also achieve smaller pixel pitch and higher resolution while saving space. Therefore, the micro-LEDs with vertical structures have obvious advantages in the field of ultra-high pixel micro-display.

Currently, conventional vertical structures generally employ a method of combining a thin film transfer technique and a laser lift-off technique to transfer an epitaxial wafer onto a supporting substrate (such as Si or metal) having higher thermal conductivity and electrical conductivity to fabricate a vertical structured micro LED. However, the method involves complex processes such as substrate stripping and transfer bonding, has high environmental requirements, high operation difficulty and high cost, and is easy to cause stripping and cracking of the epitaxial layer due to mechanical stress, and the reliability of the device is also affected by residual stress. In addition, the sapphire, si and other substrates used at present have larger lattice and thermal stress mismatch in the vertical structure micro-LED, so that a large number of defects are generated in the epitaxial layer, and the service life of the device is influenced. These factors have limited the application and development of conventional vertically structured micro LEDs to some extent.

Embodiments of the present disclosure provide a micro LED chip, which specifically includes a substrate 1, an epitaxial layer 2, a current spreading layer 3, a first electrode 4, and a second electrode 5, with reference to fig. 1, which is a schematic diagram of one specific implementation of the micro LED chip provided herein.

Wherein the epitaxial layer 2 is disposed on the substrate 1, and the epitaxial layer 2 sequentially includes, in a direction away from the substrate 1: a first gallium nitride layer 21, a quantum well layer 22, and a second gallium nitride layer 23; the current diffusion layer 3 is arranged on the surface of the second gallium nitride layer 23, which faces away from the substrate 1; the first electrode 4 is deposited on the surface of the substrate 1 facing away from the epitaxial layer 2, and the second electrode 5 is deposited on the surface of the current diffusion layer 3 facing away from the epitaxial layer 2.

Wherein the substrate 1 is a substrate homogenous with the first gallium nitride layer 21.

It is understood that Micro LED chips are also referred to as Micro LED chips. The substrate 1 is the basic structure of the micro LED chip, providing stable support and mechanical strength. The substrate 1 is of a material that is homogenous with the first gallium nitride layer 21.

The epitaxial layer 2 is located above the substrate 1 and is formed by stacking a plurality of layers of different materials in a specific order. In the embodiment of the present disclosure, the epitaxial layer includes a first gallium nitride layer 21, a quantum well layer 22, and a second gallium nitride layer 23 in this order. The main function of the epitaxial layer 2 is to grow active material therein and to achieve light emission and electron injection.

Wherein the first gallium nitride layer 21 is a homogenous material layer with the substrate for providing lattice matching and crystalline quality.

The quantum well layer 22 emits light by emitting energy by recombination of electrons and holes and generating photons. The quantum well layer 22 adopts a multi-quantum well structure, and typically includes InGaN/GaN quantum wells, which are a major part of realizing light emission. The InGaN/GaN quantum well utilizes the characteristics of lattice matching and energy band shift among different materials to form a structure of a potential barrier layer and a potential well layer. In this structure, the GaN layer has a wide forbidden bandwidth, and the InGaN layer has a narrow forbidden bandwidth. The energy gap of the quantum well can be further regulated by regulating the indium-gallium composition of the InGaN layer. In InGaN/GaN quantum wells, carriers (electrons and holes) are confined to the well region of the quantum well layer. Due to the energy band difference between InGaN and GaN, excitons (bound states formed by electrons and holes) are formed in the quantum well and recombine to generate light emission in the visible range.

The InGaN/GaN quantum well has excellent light emitting performance and high efficiency, making it a key element in optoelectronic devices. By adjusting the thickness and composition of the InGaN and GaN layers, light emission in different wavelength ranges can be achieved.

The second gallium nitride layer 23 is used to provide holes to the quantum well layer and to recombine with electrons for light emission.

The current spreading layer 3 is located on the surface of the second gallium nitride layer 23 facing away from the substrate 1. The main function of the LED is to uniformly distribute current when the current is injected into the micro LED chip, thereby improving the efficiency and performance of the LED. The current diffusion layer may be specifically a transparent conductive Oxide layer deposited on the surface of the second gallium nitride layer 23, and for example, a transparent conductive thin film material of ITO (Indium Tin Oxide) may be used.

The first electrode 4 is deposited on the surface of the substrate 1 facing away from the epitaxial layer 2. As a specific implementation, the first electrode 4 may be a transparent conductive layer, such as a transparent metal oxide film, for injecting forward current into the LED chip.

A second electrode 5 is deposited on the surface of the current spreading layer 3 facing away from the epitaxial layer 2. As an implementation, the second electrode 5 may be a single metal electrode for injecting a reverse current or as a ground electrode to complete the circuit connection and current closure of the LED chip.

In this embodiment, the micro LED chip includes a light emitting unit array formed by a plurality of light emitting units 101, where the current diffusion layers 3 of two adjacent light emitting units 101 are isolated from each other, and the second electrodes 5 of two connected light emitting units 101 are isolated from each other.

In the embodiment of the present disclosure, the first gallium nitride layer 21 is an n-type gallium nitride layer, and the second gallium nitride layer 23 is a p-type gallium nitride layer.

Gallium nitride is a III-V compound semiconductor material, and consists of gallium and nitrogen elements. The n-type gallium nitride layer is a layer formed by doping a specific impurity into a gallium nitride material to generate an excessive negative charge carrier (electron). The p-type gallium nitride layer 24 is p-type doped gallium nitride, providing holes to the quantum wells and recombination of light with electrons. In the p-type gallium nitride layer, the doped impurities cause the presence of excess positive charge carriers, i.e., holes, in the material. This makes the p-type gallium nitride layer positive.

As a specific embodiment, the micro LED chip provided herein may further include an electron blocking layer 24 disposed between the quantum well layer 22 and the second gallium nitride layer 23, for preventing electrons from leaking to the second gallium nitride layer. Specifically, the electron blocking layer 24 may be AlGaN, and is disposed between the quantum well layer 22 and the p-type gallium nitride layer 23, for preventing electrons from leaking to the p-type region, increasing the number of electrons injected into the active region, and improving external quantum efficiency.

It is understood that the substrate 1 in this application is a gallium nitride substrate that is homogenous with the first gallium nitride layer 21. For ease of understanding, it is drawn here as two layers, in fact the substrate 1 and the first gallium nitride layer 21 are film layers of the same material, for example the substrate 1 and the first gallium nitride layer 21 are both n-type gallium nitride layers. Wherein substrate homogeneity refers to a uniform layer or base of the same or similar material. Substrate homogeneity can provide a stable basis for growing crystals or depositing thin films.

As a specific embodiment, the widths of the first gallium nitride layer 21, the quantum well layer 22, and the second gallium nitride layer 23 are the same, the width of the substrate 1 is the same as the width of the epitaxial layer 2, the lengths of the first gallium nitride layer 21, the quantum well layer 22, and the second gallium nitride layer 23 are the same, and the length of the substrate 1 is the same as the length of the epitaxial layer 2, so as to form a mesa without steps or sidewalls. The formation of mesa-free or sidewall-free mesa structures is understood to mean that the sidewalls of the structure resulting from the respective surfaces remain flat and smooth.

In the fabrication of micro LED chips, mesa-free or sidewall-free mesa structures mean that the surface of the light emitting region has no significant mesa or etch-induced roughness, which helps to improve light extraction efficiency and device performance while simplifying the fabrication process.

Existing vertical structures can also be used without mesa structures, but this can cause a problem: the existing substrate (such as sapphire) has high lattice mismatch (heteroepitaxy) with an epitaxial layer, the dislocation density is high, and the dislocation grows from the substrate to the uppermost layer, so that a leakage channel is formed, and the area of a non-pixel point also emits light, so that display unevenness and contrast are reduced. The existing vertical structure is required to etch the mesa structure and etch away the non-pixel regions. In the embodiment of the application, the gallium nitride substrate is used for homoepitaxy, the dislocation density is small, and the leakage is also much smaller, so that a mesa structure is not needed.

In addition, the gallium nitride substrate is conductive and transparent, has good electrical property and optical property, does not influence the light-emitting area when being made into a vertical structure, has good heat dissipation performance and does not need to be removed. However, the silicon or sapphire substrate used in the conventional vertical structure is not good in conductivity, is opaque, and is poor in heat dissipation, so that the substrate must be peeled off. The method does not need any treatment, and does not need operations such as laser stripping, substrate transfer, substrate thinning and the like.

In addition, the present application further provides a micro LED device, including one or more of the micro LED chips 100 and the driving substrate 200, as shown in a schematic diagram of an embodiment of the micro LED device provided in fig. 2. The micro LED device can be applied to electronic equipment, and realizes augmented Reality (XR) technologies such as augmented Reality (Augmented Reality, AR), virtual Reality (VR), mixed Reality (MR) and the like. In practice, the micro LED device may be a projection part of an electronic device, such as a projector, head Up Display (HUD), etc.; for another example, the micro LED device may also be a display portion of an electronic apparatus, which may include, for example: any device with a display screen, such as a smart phone, a smart watch, a notebook computer, a tablet computer, a vehicle recorder, a navigator, a head-mounted device, and the like; also for example, the micro LED device may also be an illumination portion of an electronic device, e.g. the electronic device may comprise: vehicles, street lamps, etc. any device having a lighting assembly.

The micro LED chip 100 is disposed on the driving substrate 200, and the bonding between the second electrode 5 and a third electrode (not shown) of the driving substrate 200 is achieved through a bonding layer 6, and the electrical connection between the first electrode 4 and a fourth electrode (not shown) of the driving substrate is achieved through a wire 7. Here, the conductive line 7 may represent a structure functioning as a conductive line, and the conductive line 7 is isolated from the epitaxial layer 2 of the micro LED chip.

As one implementation, the micro LED chip includes a light emitting unit array formed by a plurality of light emitting units 101, and the bonding layer 6 includes bonding blocks 61 corresponding to the plurality of light emitting units 101 one by one. The bonding of the second electrode 5 to the third electrode of the driving substrate 200 by the bonding layer 6 includes: each light emitting unit 101 is bonded to a third electrode corresponding to the light emitting unit one by one through a corresponding bonding block 61, so as to electrically connect with a corresponding driving circuit in the driving substrate 200.

The micro LED chip is a light emitting unit array composed of a plurality of light emitting units 101. The light emitting unit 101 is a basic unit that realizes a light emitting function of an LED, and can independently emit light. The bonding layer 6 includes bonding blocks 61 in one-to-one correspondence with each light emitting unit 101. The bonding block 61 is used to electrically connect the light emitting unit with other components. In this embodiment, the bonding block 61 is matched with each light emitting unit 101, so that the second electrode 5 of the light emitting unit 101 can be electrically connected with the third electrode of the driving circuit, thereby realizing transmission and control of the driving signal.

The bonding block 61 may have a spherical metal structure, but other structures may be selected, and the present invention is not limited thereto.

Fig. 3 shows a flowchart of a specific embodiment of a method for manufacturing a micro LED chip provided in the present application, and referring to fig. 3, the process specifically includes:

s301: providing a substrate 1;

s302: sequentially grow in a direction away from the substrate 1: a first gallium nitride layer 21, a quantum well layer 22 and a second gallium nitride layer 23 which are homogeneous with the substrate, so as to obtain an epitaxial layer 2;

s303: providing a current diffusion layer 3 on the surface of the second gallium nitride layer 23 facing away from the substrate 1;

s304: depositing a first electrode 4 on a surface of the substrate 1 facing away from the epitaxial layer 2;

s305: a second electrode 5 is deposited on the surface of the current spreading layer 3 facing away from the epitaxial layer 2.

As a specific embodiment, the widths of the first gallium nitride layer 21, the quantum well layer 22 and the second gallium nitride layer 23 are the same, the widths of the substrate 1 and the epitaxial layer 2 are the same, the lengths of the first gallium nitride layer 21, the quantum well layer 22 and the second gallium nitride layer 23 are the same, and the lengths of the substrate 1 and the epitaxial layer 2 are the same, so that the substrate 1 and the epitaxial layer 2 form a mesa without steps or sidewalls.

Wherein the first gallium nitride layer 21 is an n-type gallium nitride layer, and the second gallium nitride layer 23 is a p-type gallium nitride layer.

The micro LED chip comprises a light emitting unit array formed by a plurality of light emitting units 101, wherein the current diffusion layers 3 of two adjacent light emitting units 101 are isolated from each other, and the second electrodes 5 of two adjacent light emitting units 101 are isolated from each other.

Fig. 4 shows a flowchart of another embodiment of the method for manufacturing a micro LED chip provided in the present application, which is added with the electron blocking layer 24 as compared to the previous example. Referring to fig. 4, the process specifically includes:

s401: a substrate 1 is provided.

S402: sequentially growing in a direction away from the substrate: a first gallium nitride layer 21, a quantum well layer 22, an electron blocking layer 24, a second gallium nitride layer 23, which are homogenous with the substrate.

S403: a current diffusion layer 3 is arranged on the surface of the second gallium nitride layer 23 facing away from the substrate 1.

S404: a first electrode 4 is deposited on the surface of the substrate 1 facing away from the first gallium nitride layer 21.

S405: a second electrode 5 is deposited on the surface of the current spreading layer 3 facing away from the second gallium nitride layer 23.

The electron blocking layer 24 may be AlGaN, and is used to prevent electrons from leaking to the region corresponding to the second gallium nitride layer, increase the number of electrons injected into the active region, and improve external quantum efficiency.

Fig. 5 is a flowchart of a specific embodiment of a method for manufacturing a micro LED device provided in the present application, and fig. 6 to 8 are schematic diagrams of a process for forming the micro LED device provided in the present application. The process specifically comprises the following steps:

s501: providing a substrate 1; for example, specifically, an n-type gallium nitride substrate is provided.

S502: sequentially grow in a direction away from the substrate 1: a first gallium nitride layer 21, a quantum well layer 22, an electron blocking layer 24 and a second gallium nitride layer 23 which are homogeneous with the substrate, so as to obtain an epitaxial layer 2; wherein the electron blocking layer 24 is optionally arranged between the quantum well layer 22 and the second gallium nitride layer 23.

S503: a current diffusion layer 3 is arranged on the surface of the second gallium nitride layer 23 facing away from the substrate 1.

S504: a first electrode 4 is deposited on the surface of the substrate 1 facing away from the epitaxial layer 2.

S505: and depositing a second electrode 5 on the surface of the current diffusion layer 3, which is away from the epitaxial layer 2, so as to obtain the micro LED chip 100.

Fig. 6 shows a schematic structural diagram of the micro LED chip 100 generated in S501 to S505.

S506: a bonding layer 6 is deposited on the surface of the second electrode 5.

It can be understood that the micro LED chip includes a light emitting unit array formed by a plurality of light emitting units 101, the bonding layer 6 includes bonding blocks 61 corresponding to the light emitting units 101 one by one, and each light emitting unit 101 is bonded to a third electrode corresponding to the light emitting unit 101 one by one through the corresponding bonding block 61, so as to electrically connect with a corresponding driving circuit in the driving substrate 200.

Fig. 7 shows a schematic view of a process of depositing a bonding block 61 on the surface of the second electrode. In this embodiment, the bonding block 61 is a spheroidal metal structure. The metal structure can be deposited into a composite electrode by adopting a metal layer sequence such as titanium aluminum nickel gold and the like, and is responsible for effectively transmitting an electric signal from a driving circuit to the LED. .

The adoption of the spheroidal metal structure can enable better electrical connection with the driving substrate, and the metal electrode is deposited on the surface of the second electrode, which is away from the epitaxial layer, in a reflow manner, so that a plurality of spheroidal metal electrodes are formed. The reflow soldering is to deposit a metal layer, heat to 200 deg.C, melt the metal, and automatically gather into spherical metal balls.

Alternatively, a plurality of recesses (holders) may be provided on the surface of the second electrode 5, thereby further facilitating the subsequent formation of a plurality of spheroidal metal structures 61 on the surface of the second electrode 5.

S507: inverting the micro LED chip 100 so that the driving substrate 200 realizes the bonding of the second electrode 5 and the third electrode of the driving substrate through the bonding layer 6; the first electrode 4 is electrically connected to the fourth electrode of the drive substrate by a wire.

Fig. 8 shows a schematic diagram of a process of bonding micro LED chips upside down. The structure obtained above is flipped to obtain a flip-chip structure with the substrate 1 above and the epitaxial layer 2 below. The bonding block 61 is connected to the third electrode of the driving substrate by flip-chip bonding, and the driving substrate 200 is electrically connected to the first electrode 4 on the top after flip-chip bonding through the wire 7.

It is understood that the micro LED chip includes a light emitting unit array formed by a plurality of light emitting units 101, and each light emitting unit 101 is bonded to a third electrode corresponding to the light emitting unit 101 one by one through a corresponding metal electrode 61, so as to electrically connect with a corresponding driving circuit in the driving substrate 200. That is, each of the metal electrodes 61 is individually driven by a corresponding driving circuit, and the metal electrodes 61 may be electrically connected to the corresponding driving circuit on the driving substrate 200 through wires. Each metal electrode 61 corresponds to one pixel point. It will be appreciated that the distance between the metal electrodes 61 cannot be too close to avoid optical crosstalk.

The driving circuit may specifically select a structure of 2T1C, i.e., two transistors and one capacitor, which is not limited herein.

As a specific embodiment, a transparent electrode layer may be specifically employed as the first electrode 5. Referring to fig. 9, which is a schematic view of the micro LED device in a top view, the first electrode 5 is arranged in a ring shape (as shown in a hatched portion of fig. 9) so that the substrate 1 under the first electrode 5 is fully or partially exposed from being blocked by the first electrode 5 after flip-chip mounting. The use of the ring shape can expose the underlying layer of the substrate, thereby increasing the light extraction area.

Further, the length of the driving substrate 200 is greater than the length of the substrate 1 and the length of the epitaxial layer 2, and the width of the driving substrate 200 is greater than the width of the substrate 1 and the width of the epitaxial layer 2. Thus, the area of the driving substrate 200 is slightly larger than that of the upper layers, so that the driving substrate 200 and the upper first electrode 5 are conveniently electrically connected by adopting wires.

The vertical structure of the n-type gallium nitride substrate is adopted, compared with the heterogeneous substrate used in the horizontal structure, the vertical structure of the n-type gallium nitride substrate is a homogeneous substrate, and the vertical current diffusion performance is better. The structure effectively relieves the current congestion effect on the n electrode and improves the luminous uniformity of the pixel. Compared with the common sapphire substrate, the gallium nitride substrate has good electric conduction and heat conduction properties, so that the problems of insufficient heat dissipation and the like caused by the sapphire substrate can be solved. In addition, the gallium nitride substrate has smaller lattice mismatch between the homoepitaxial structure and the material, and can effectively reduce the high defect density caused by the heterogeneous substrate, thereby improving the quality of epitaxial crystals. In addition, the vertical flip-chip structure using the gallium nitride substrate does not need to carry out the process steps of transferring, bonding, thinning or polishing the substrate, and the like, thereby avoiding the damage to the active region of the device, and avoiding the etching of the mesa structure, and greatly simplifying the process flow and reducing the operation difficulty.

The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of apparatus and methods according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

As used herein and in the appended claims, the singular forms of words include the plural and vice versa, unless the context clearly dictates otherwise. Thus, when referring to the singular, the plural of the corresponding term is generally included. Similarly, the terms "comprising" and "including" are to be construed as being inclusive rather than exclusive. Likewise, the terms "comprising" and "or" should be interpreted as inclusive, unless such an interpretation is expressly prohibited herein. Where the term "example" is used herein, particularly when it follows a set of terms, the "example" is merely exemplary and illustrative and should not be considered exclusive or broad.

Further aspects and scope of applicability will become apparent from the description provided herein. It should be understood that various aspects of the present application may be implemented alone or in combination with one or more other aspects. It should also be understood that the description and specific examples are intended for purposes of illustration only and are not intended to limit the scope of the present disclosure.

While several embodiments of the present disclosure have been described in detail, it will be apparent to those skilled in the art that various modifications and variations can be made to the embodiments of the present disclosure without departing from the spirit and scope of the disclosure. The scope of the present disclosure is defined by the appended claims.

Claims (10)

1. The miniature LED chip is characterized by comprising a substrate, an epitaxial layer, a current diffusion layer, a first electrode and a second electrode;

the epitaxial layer is arranged on the substrate, and the epitaxial layer sequentially comprises, in a direction away from the substrate: a first gallium nitride layer, a quantum well layer, a second gallium nitride layer; the current diffusion layer is arranged on the surface of the second gallium nitride layer, which is away from the substrate;

the first electrode is deposited on the surface of the substrate, which is away from the epitaxial layer, and the second electrode is deposited on the surface of the current diffusion layer, which is away from the epitaxial layer;

wherein the substrate is a substrate homogenous with the first gallium nitride layer.

2. The micro LED chip of claim 1, wherein the first gallium nitride layer, the quantum well layer, and the second gallium nitride layer have the same width, the substrate has the same width as the epitaxial layer, the first gallium nitride layer, the quantum well layer, and the second gallium nitride layer have the same length, and the substrate has the same length as the epitaxial layer, such that the substrate and the epitaxial layer form a mesa without steps or sidewalls.

3. The micro LED chip of claim 1, wherein the first gallium nitride layer is an n-type gallium nitride layer and the second gallium nitride layer is a p-type gallium nitride layer.

4. The micro LED chip of claim 1, wherein the micro LED chip comprises a light emitting unit array formed by a plurality of light emitting units, current diffusion layers of two adjacent light emitting units are isolated from each other, and second electrodes of two connected light emitting units are isolated from each other.

5. The micro LED chip of any of claims 1 to 4, further comprising an electron blocking layer disposed between the quantum well layer and the second gallium nitride layer.

6. A micro LED device comprising a plurality of micro LED chips according to any one of claims 1 to 5 and a driving substrate;

the miniature LED chip is arranged on the driving substrate, the second electrode is bonded with the third electrode of the driving substrate through the bonding layer, and the first electrode is electrically connected with the fourth electrode of the driving substrate through a wire.

7. The micro LED device of claim 6, wherein the micro LED chip comprises a light emitting cell array formed of a plurality of light emitting cells, the bonding layer comprises bonding blocks corresponding to the plurality of light emitting cells one by one, the bonding of the second electrode to the third electrode of the driving substrate is achieved through the bonding layer, comprising:

each light-emitting unit is bonded with a third electrode corresponding to the light-emitting unit one by one through a corresponding bonding block, so that the light-emitting units are electrically connected with a corresponding driving circuit in the driving substrate.

8. The micro LED device of claim 7, wherein the bonding block is a spheroid-like metal structure.

9. The preparation method of the miniature LED chip is characterized by comprising the following steps of:

providing a substrate;

sequentially growing in a direction away from the substrate: a first gallium nitride layer, a quantum well layer and a second gallium nitride layer which are homogeneous with the substrate, so as to obtain an epitaxial layer;

a current diffusion layer is arranged on the surface, facing away from the substrate, of the second gallium nitride layer;

depositing a first electrode on the surface of the substrate facing away from the epitaxial layer;

and depositing a second electrode on the surface of the current diffusion layer, which is away from the epitaxial layer.

10. The preparation method of the miniature LED device is characterized by comprising the following steps:

providing a micro LED chip prepared according to the preparation method of a micro LED chip of claim 9;

depositing a bonding layer on the surface of the second electrode;

inverting the micro LED chip to enable the driving substrate to realize the bonding between the second electrode and the third electrode of the driving substrate through the bonding layer;

the first electrode is electrically connected with the fourth electrode of the driving substrate through a wire.