CN117116943A - Driving backboard, large display panel structure and display panel - Google Patents

Driving backboard, large display panel structure and display panel Download PDF

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Publication number
CN117116943A
CN117116943A CN202210523395.8A CN202210523395A CN117116943A CN 117116943 A CN117116943 A CN 117116943A CN 202210523395 A CN202210523395 A CN 202210523395A CN 117116943 A CN117116943 A CN 117116943A
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China
Prior art keywords
layer
area
conductive layer
under
region
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CN202210523395.8A
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Chinese (zh)
Inventor
黄琰
蔡建畅
邓江涛
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BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
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Priority to CN202210523395.8A priority Critical patent/CN117116943A/en
Publication of CN117116943A publication Critical patent/CN117116943A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The application discloses a driving backboard, a large panel structure of a display panel, the display panel and a manufacturing method of the driving backboard, wherein the driving backboard comprises a substrate base plate; the display area of the driving backboard is divided into an under-screen camera area, and the under-screen camera area is provided with a transparent conductive layer; the non-display area of the drive back plate is provided with: an interlayer structure layer provided on one side of the substrate; the alignment mark layer is arranged on one side of the interlayer structure layer far away from the substrate base plate; the barrier cushion layer is arranged between the interlayer structure layer and the alignment mark layer; the barrier underlayer is used to block residues generated on the interlayer structure layer when the transparent conductive layer is manufactured. The application can improve the positioning accuracy and the grabbing reliability of production line equipment on a process production line and improve the product yield.

Description

Driving backboard, large display panel structure and display panel
Technical Field
The application relates to the technical field of display, in particular to a driving backboard, a large panel structure of a display panel, a display panel and a manufacturing method of the driving backboard.
Background
As the application of the technology of the under-screen camera is wider, the requirement of the under-screen camera with a larger size is more obvious. But the problem that the positioning and grabbing of production line equipment are inaccurate and the yield is difficult to improve can occur when the display panel of the area where the under-screen camera with a large area is arranged (hereinafter referred to as an under-screen camera area of the display panel) is manufactured.
Disclosure of Invention
In view of the above problems, the present application provides a driving backboard, a large panel structure of a display panel, a display panel and a manufacturing method of the driving backboard, which can improve positioning accuracy and grabbing reliability of production line equipment on a process production line and improve product yield.
In a first aspect, the present application provides, by way of an embodiment, the following technical solutions:
a drive backplate comprising a substrate base plate; the display area of the driving backboard is divided into an under-screen camera area, and the under-screen camera area is provided with a transparent conductive layer; the non-display area of the drive backboard is provided with: an interlayer structure layer provided on one side of the substrate base plate; the alignment mark layer is arranged on one side of the interlayer structure layer far away from the substrate base plate; a barrier underlayer disposed between the interlayer structure layer and the alignment mark layer; the barrier underlayer is used for blocking residues generated on the interlayer structure layer when the transparent conductive layer is manufactured.
Optionally, the blocking pad layer extends to the under-screen camera region, and the blocking pad layer located in the under-screen camera region covers the transparent conductive layer.
Optionally, the transparent conductive layer comprises 3-5 layers of transparent conductive materials.
Optionally, the transparent conductive layer includes: a first conductive layer and a second conductive layer, the first conductive layer being disposed between the second conductive layer and the interlayer structure layer; the barrier underlayment includes: the first flat layer is arranged on one side of the interlayer structure layer far away from the substrate base plate and extends to the under-screen camera area; the first flat layer located in the under-screen camera area covers the first conductive layer; the second flat layer is arranged on one side of the first flat layer away from the substrate base plate and extends to the under-screen camera area; the second flat layer located in the under-screen camera region covers the second conductive layer.
Optionally, the transparent conductive layer further includes: the third conductive layer is arranged on one side of the second flat layer away from the substrate base plate; the barrier underlayment further comprises: the third flat layer is arranged on one side of the second flat layer away from the substrate base plate and extends to the under-screen camera area; the third flat layer located in the under-screen camera region covers the third conductive layer.
Optionally, the interlayer structure layer includes: a buffer layer disposed between the substrate base plate and the barrier pad layer; a first gate insulating layer disposed between the buffer layer and the barrier pad layer; a second gate insulating layer disposed between the first gate insulating layer and the barrier pad layer; the insulating dielectric layer is arranged between the second gate insulating layer and the blocking cushion layer; the passivation layer is arranged between the insulating medium layer and the blocking cushion layer; a fourth flat layer disposed between the passivation layer and the barrier pad layer; and a fifth planarization layer disposed between the fourth planarization layer and the barrier pad layer.
Optionally, the non-display area includes a test binding area and a display shielding area; the display shielding area surrounds the display area of the driving backboard, and the test binding area is arranged on the outer side of the display shielding area; the blocking cushion layer is arranged in the test binding area and the display shielding area.
Optionally, the test binding area is divided into a positioning mark area and a wiring disc area, and the positioning mark area is positioned at one side of the wiring disc area; the blocking cushion layer is arranged in the alignment mark region.
Optionally, a space is provided between the alignment mark region and the land region.
Optionally, the minimum width of the space is not less than 17.5um.
According to the second aspect, based on the same inventive concept, the present application provides, through an embodiment, the following technical solutions:
a display panel large panel structure comprising: the drive back plate of any one of the preceding first aspects.
In a third aspect, based on the same inventive concept, the present application provides, by an embodiment, the following technical solutions:
a display panel, comprising: the light emitting structure layer and the driving back plate of any one of the foregoing first aspects, the light emitting structure layer being disposed on a side of the driving back plate away from the substrate.
According to the fourth aspect, based on the same inventive concept, the present application provides, through an embodiment, the following technical solutions:
a method of manufacturing a drive back plate, comprising:
providing a substrate; the display area of the driving backboard is divided into an under-screen camera area; forming an interlayer structure layer in the non-display area, and forming a transparent conductive layer in the under-screen camera area; forming a barrier pad layer on the interlayer structure layer of the non-display region after forming the transparent conductive layer; the barrier underlayer is used for blocking residues generated on the interlayer structure layer when the transparent conductive layer is manufactured; and forming an alignment mark layer on the barrier cushion layer.
The driving backboard provided by the embodiment of the application comprises a substrate base plate; the display area of the driving backboard is divided into an under-screen camera area, and the under-screen camera area is provided with a transparent conductive layer; the non-display area of the drive back plate is provided with: an interlayer structure layer provided on one side of the substrate; the alignment mark layer is arranged on one side of the interlayer structure layer far away from the substrate base plate; the barrier cushion layer is arranged between the interlayer structure layer and the alignment mark layer; the barrier underlayer is used to block particles generated on the interlayer structure layer when the transparent conductive layer is manufactured. In the implementation, a blocking cushion layer is additionally arranged on the interlayer structure layer and can be used for blocking residues generated when the transparent conducting layer of the camera area under the screen is manufactured, so that the residues are prevented from polluting the alignment mark layer; the grabbing of the production line equipment to the driving backboard can be performed more accurately, and the production yield of the display panel is improved.
The foregoing description is only an overview of the present application, and is intended to be implemented in accordance with the teachings of the present application in order that the same may be more clearly understood and to make the same and other objects, features and advantages of the present application more readily apparent.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic cross-sectional microstructure of a prior art drive backplate;
FIG. 2 is a schematic view of a region distribution of a driving back plate according to an embodiment of the application;
FIG. 3 is a schematic view of another area distribution of a driving back plate according to an embodiment of the application;
fig. 4, 9, 11, 12, 13, 16 are schematic structural views of a non-display area of a driving back plate according to an embodiment of the application;
FIG. 5 is a schematic diagram of a structure of a non-display area of a driving back plate in the prior art;
FIG. 6 is a schematic diagram showing the actual state alignment of alignment marks of a driving back plate in the prior art and a driving back plate in the embodiment of the present application;
FIG. 6A is a schematic diagram of a prior art driving back plate and a driving back plate according to the present application;
fig. 7, 8, 10, 15 are schematic structural diagrams of an under-screen camera area of a driving back plate according to an embodiment of the present application;
fig. 14 is a schematic structural diagram of a display area outside an under-screen camera area of a driving back plate according to an embodiment of the present application;
FIG. 17 is a schematic diagram showing the comparison of the actual states of the test binding areas of the prior art and the test binding areas of the prior art drive back plate;
FIG. 18 is an enlarged schematic view of the area A in FIG. 3;
FIG. 19 is a schematic diagram showing the alignment mark region of the design of the prior art driving back plate and the driving back plate in the implementation of the present application;
FIG. 20 is a flow chart of a method for manufacturing a driving back plate according to an embodiment of the application;
FIG. 21 is a flow chart of an exemplary method for manufacturing a driving back plate according to an embodiment of the application.
Reference numerals: 101-residue particles; 10-driving a backboard; 11-a display area; 111-an under-screen camera area; 13-a non-display area; 131-displaying the occlusion region; 132-test binding area; 1321-alignment mark region; 1322-land area; 301-alignment marks; 302-aligning marks; 310-a substrate base plate; 320-an interlayer structure layer; 330-an alignment mark layer; 330 a-an anode layer; 340-a barrier underlayer; 341-a first planar layer; 342-a second planar layer; 343-a third planar layer; 350-a transparent conductive layer; 351—a first conductive layer; 352-a second conductive layer; 353-a third conductive layer; 360-pixel definition layer; 370-pixel support layer; 321-a buffer layer; 322-a first gate insulation layer; 323-a second gate insulating layer; 324-an insulating medium layer; 325-passivation layer; 326-a fourth flat layer; 327-a fifth planar layer; 3221-a polysilicon layer; 3231—a first gate layer; 3241-a second gate layer; 3251—a first common electrode layer; 3271-a second common electrode layer; 1325-interval; 401-alignment marks; 402-alignment marks.
Detailed Description
Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood that the description is only exemplary and is not intended to limit the scope of the present disclosure. In addition, in the following description, descriptions of well-known structures and techniques are omitted so as not to unnecessarily obscure the concepts of the present disclosure.
Various structural schematic diagrams according to embodiments of the present disclosure are shown in the drawings. The figures are not drawn to scale, wherein certain details are exaggerated for clarity of presentation and may have been omitted. The shapes of the various regions, layers and relative sizes, positional relationships between them shown in the drawings are merely exemplary, may in practice deviate due to manufacturing tolerances or technical limitations, and one skilled in the art may additionally design regions/layers having different shapes, sizes, relative positions as actually required.
In the context of the present disclosure, when a layer/element is referred to as being "on" another layer/element, it can be directly on the other layer/element or intervening layers/elements may be present therebetween. In addition, if one layer/element is located "on" another layer/element in one orientation, that layer/element may be located "under" the other layer/element when the orientation is turned.
At present, when the display panel with the camera area with a large area is produced, inaccurate grabbing and positioning of production line equipment can occur, and the production yield is low. Experimental analysis shows that the alignment mark layer used for positioning production line equipment in the production process has pollution problem; further analysis causes, microscopic observation of the cross section of the driving back plate of the display panel revealed that there were a large number of residual particles 101 below the alignment mark layer, as shown in fig. 1. However, the alignment mark layer is contaminated after being disposed on the residues, so that the light transmittance of the alignment mark layer is reduced, and finally the positioning accuracy of the production line device is reduced, and the production yield of the display panel is reduced. Further, the display panel applied to the under-screen camera at present needs to be provided with a camera below a camera area of the display panel, so that the camera area needs to have better light transmittance, a driving transistor of the under-screen camera area can be removed in the production process, and only an electroluminescent (Electro luminescent, EL) device structure in a pixel circuit is reserved; and a transverse parallel pixel circuit led out by a transparent ITO (Indium tin oxide) wire. Wet etching process is adopted in the process of manufacturing the wiring, and residues and other dirt, such as ITO particles and the like, exist after the process is completed. These residues may be dispersed throughout the subsequent manufacturing process. The scattered residual foreign matters can pollute the alignment mark layer, the alignment mark layer is used for aligning the display panel by the production line equipment, the polluted alignment mark layer can cause abnormal alignment or the situation that the production line equipment cannot grasp, and finally the yield of the product is reduced.
In view of this, in the embodiment of the present application, a blocking cushion layer is disposed on a side of the alignment mark layer, which is close to the substrate, and the blocking cushion layer blocks residues generated when the transparent conductive layer (such as an ITO conductive layer) is manufactured, so as to ensure that the residues will not affect the alignment mark layer, that is, the alignment mark layer is not contaminated, thereby ensuring that the alignment mark layer can be accurately positioned by the production line device, and effectively improving the production yield of the display panel. In order that the present general inventive concept may be more readily understood, more particular details of the present general inventive concept will be described below with reference to a number of embodiments.
Referring to fig. 2 and 3, in an embodiment of the present application, a driving back plate 10 is provided, and the driving back plate 10 is divided into a display area 11 and a non-display area 13. The display area 11 is an area for performing display after the driving back plate 10 is manufactured as a display panel, i.e., corresponding to the AA (Active Area) area, and the non-display area 13 is an area outside the display area 11 after the driving back plate 10 is manufactured as a display panel, as shown in fig. 2.
It will be appreciated that the non-display area 13 may also include a display blocking area 131 and a test binding area 132 when the display panel has not been cut from the display panel structure after fabrication as a display panel; the display shielding region 131 surrounds the display region 11 of the driving back plate 10, and the test binding region 132 is disposed outside the display shielding region 131, i.e., outside any edge of the display shielding region 131, as shown in fig. 3. The Test binding area 132 is an area where an ET (Electric Test) Pad is set, and the display shielding area 131 corresponds to a BM (Black Matrix) area after the driving rear panel 10 is fabricated as a display panel.
Further, the display area 11 of the driving back plate 10 is divided into an under-screen camera area 111, as shown in fig. 2; the under-screen camera region 111 is provided with a transparent conductive layer 350, which transparent conductive layer 350 is formed of a transparent conductive material, such as an ITO material, or other existing transparent conductive material. The transparent conductive layer 350 is used for routing to arrange the driving transistors of the under-screen camera region 111 at other positions of the driving back plate 10, so as to ensure good light transmittance.
Referring to fig. 4, the driving back plate 10 includes a substrate 310; the non-display area 13 of the driving back plate 10 is further provided with: interlayer structure layer 320, alignment mark layer 330, and barrier underlayer 340.
An interlayer structure layer 320 disposed on one side of the substrate base 310; the interlayer structure layer 320 is formed when forming a driving transistor for driving the display region 11 of the back plate 10. Specifically, the interlayer structure layer 320 may be formed of some insulating material layers, and specific implementations thereof will be described later.
An alignment mark layer 330 disposed on a side of the interlayer structure layer 320 away from the substrate 310; the alignment mark layer 330 may be used to position the drive back plate 10 by the production line equipment. The alignment mark layer 330 includes a plurality of alignment marks (alignment marks) formed of anode marks and Source Drain (SD) metal materials, and the specific formation and structure of the alignment mark layer 330 can refer to the conventional scheme, which is not repeated in this embodiment.
A barrier underlayer 340 disposed between the interlayer structure layer 320 and the alignment mark layer 330; the barrier underlayer 340 is used to block residues generated on the interlayer structure layer 320 during the manufacture of the transparent conductive layer 350, and ensures that the alignment mark layer 330 is clean and has good light transmittance. In the prior art design, the alignment mark layer 330 is disposed on the side of the interlayer structure layer 320 away from the substrate 310, as shown in fig. 5. The design manner in this embodiment can effectively improve the cleanliness of the alignment mark layer 330, as shown in fig. 6.
Fig. 6 is a top view of the alignment mark layer 330. In fig. 6, the driving back plate C1 does not adopt the design of the present embodiment, and the driving back plate C2 adopts the design of the present embodiment. By comparison, it can be seen that the light transmittance of the alignment marks 301 in the driving back plate C1 is significantly worse than that of the alignment marks 302 in the driving back plate C2. It can be seen that the design of the driving back plate 10 in this embodiment significantly improves the defect of the alignment mark layer 330, and can improve the grabbing reliability of the production line equipment. Correspondingly, a partial comparative design of the prior art and the present embodiment is shown in fig. 6A, wherein fig. 6A (C12) adds a barrier pad layer 340 to the alignment mark layer 330; in the prior art, the interlayer structure layer 320 is located below the alignment mark layer 330 in fig. 6A (C11).
For example, in one example, the typical under-screen camera area 111 has a diameter of 1.5mm. In manufacturing the driving back plate of the under-screen camera region 111 having a diameter of 2.54mm, it is necessary to provide the transparent conductive layer 350 provided in the under-screen camera region 111 as a running line of three ITO layers. If the manufacturing is carried out according to the existing scheme, the yield loss can reach 10%; the structural design of the driving back plate 10 in this embodiment can avoid yield loss. That is, the structural design of the driving back plate 10 of the present embodiment can at least improve the production yield by more than 10% compared with the prior art. It should be noted that the structure of the driving back plate 10 of the present embodiment may be applied to other driving back plates with diameters of 1.5mm or more of the under-screen camera area 111, and is not limited.
In some implementations, barrier mat 340 extends to under-screen camera region 111, as shown in fig. 7; it may also extend over the entire display area 11 and the transparent conductive layer 350 is covered by the barrier underlayer 340 located in the under-screen camera area 111. It will be appreciated that when a planarization layer is formed on transparent conductive layer 350, the planarization layer may be formed as barrier pad layer 340 corresponding to non-display region 13, effectively utilizing existing process steps. Of course, in other implementations, the barrier underlayer 340 may be manufactured separately to form a different structure independent of the flat layer of the display area 11, without limitation.
Further, the transparent conductive layer 350 may include 3 to 5 layers of transparent conductive materials in some implementations, but is not limited thereto. It can be appreciated that, when the number of transparent conductive material layers corresponding to the transparent conductive layer 350 is smaller, the pollution of the residue to the alignment mark layer 330 has less influence on positioning and grabbing of the line production equipment; when the number of transparent conductive material layers corresponding to the transparent conductive layer 350 is large, the contamination suppression effect of the alignment mark layer 330 caused by the residues through the barrier underlayer 340 is limited.
Referring to fig. 8 and 9, in some implementations, the transparent conductive layer 350 may include: a first conductive layer 351 and a second conductive layer 352. The first conductive layer 351 is disposed between the second conductive layer 352 and the interlayer structure layer 320; specifically, the first to conductive layers are disposed on the side of the interlayer structure layer 320 remote from the substrate 310, and the second conductive layer 352 is disposed on the side of the first conductive layer 351 remote from the substrate 310, as shown in fig. 8. Barrier mat 340 may include: a first planar layer 341 and a second planar layer 342, as shown in fig. 9. The first flat layer 341 is disposed on a side of the interlayer structure layer 320 away from the substrate 310, and extends to the under-screen camera region 111, or may extend to the entire display region 11; the first flat layer 341 located in the under-screen camera region 111 covers the first conductive layer 351 as shown in fig. 8. The second flat layer 342 is disposed on a side of the first flat layer 341 away from the substrate 310 and extends to the under-screen camera region 111, or may extend to the entire display region 11; the second flat layer 342 located in the under-screen camera region 111 covers the second conductive layer 352 as shown in fig. 8.
It can be appreciated that the first conductive layer 351 of the under-screen camera region 111 is planarized by PLN (Planarization) after the interlayer structure layer 320 is fabricated on the side far from the substrate 310, i.e. the first planarization layer 341 is fabricated on the side of the first conductive layer 351 far from the substrate 310; next, a second conductive layer 352 is formed on a side of the first planarization layer 341 away from the substrate 310; next, the second conductive layer 352 is planarized, i.e., the second planarization layer 342 is formed on a side of the second conductive layer 352 away from the substrate 310. The first and second planarization layers 341 and 342 are also formed in the non-display region 13, so that the barrier pad layer 340 is formed in the non-display region 13 after the second planarization layer 342 is completely formed.
Further, referring to fig. 10 and 11, in some implementations, the transparent conductive layer 350 further includes: and a third conductive layer 353. The third conductive layer 353 is disposed on a side of the second planar layer 342 remote from the substrate base 310, as shown in fig. 10. Correspondingly, the blocking cushion 340 further includes: the third flat layer 343 is shown in fig. 11. The third flat layer 343 is disposed on a side of the second flat layer 342 away from the substrate 310, as shown in fig. 11, and extends to the under-screen camera region 111, or may extend to the entire display region 11; the third flat layer 343 located in the under-screen camera zone 111 covers the third conductive layer 353, as shown in fig. 10. It can be understood that after forming the third conductive layer 353 on the second flat layer 342 of the under-screen image capturing area, the third conductive layer 353 is planarized, that is, the third flat layer 343 is fabricated, and the third flat layer 343 is fabricated on the non-display area 13; the barrier underlayer 340 at this time is composed of a first planarization layer 341, a second planarization layer 342, and a third planarization layer 343.
An analogy may be made to implementations where blocking underlayer 340 includes more planar layers based on the implementations described above, and further description is omitted here.
In the implementation of barrier mat 340 described above, either two-layer structure of barrier mat 340 or multi-layer structure of barrier mat 340. Wherein each of the barrier underlayers 340 may be used to blanket block residue generated by the corresponding conductive layer; that is, after the completion of the fabrication of a conductive layer, a flat layer is covered, so that the residue after the fabrication of a plurality of conductive layers can be prevented from accumulating in the non-display area 13 to generate particles with larger size, and the bad risk of driving the back plate 10 is reduced.
In some implementations, barrier mat 340 may be provided as a single layer structure, considering that too much thickness may also result in poor gripping of the production line equipment. That is, the portion of the barrier underlayer 340 that extends to the under-screen camera region 111 covers a layer of transparent conductive material in the transparent conductive layer 350 that is furthest from the substrate 310. It will be appreciated that when transparent conductive layer 350 is a two-layer structure, barrier underlayer 340 may include only second planarization layer 342; when the transparent conductive layer 350 has a three-layer structure, the barrier pad layer 340 may include only the third planarization layer 343, as shown in fig. 12; and so on.
For example, in some implementations, the interlayer structure layer 320 includes: a buffer layer 321, a first gate insulating layer 322, a second gate insulating layer 323, an insulating dielectric layer 324, a passivation layer 325, a fourth planarization layer 326, and a fifth planarization layer 327, as shown in fig. 13. Wherein, the buffer layer 321 is disposed between the substrate base 310 and the barrier pad layer 340; a first gate insulating layer 322 disposed between the buffer layer 321 and the barrier underlayer 340; a second gate insulating layer 323 disposed between the first gate insulating layer 322 and the barrier underlayer 340; an insulating dielectric layer 324 disposed between the second gate insulating layer 323 and the barrier underlayer 340; a passivation layer 325 disposed between the insulating dielectric layer 324 and the barrier underlayer 340; a fourth flat layer 326 disposed between the passivation layer 325 and the barrier pad layer 340; and a fifth planarization layer 327 disposed between fourth planarization layer 326 and barrier underlayer 340. In addition, the structure of the interlayer structure layer 320 may be designed according to the prior art, and the corresponding functional layers may be added or reduced as needed, without limitation.
In order to make the structural relationship of the respective parts of the driving backplate 10 easier to understand in the present embodiment, a specific example will be described below. Taking the three-layer structure of transparent conductive layer 350 as an example, barrier underlayer 340 is a one-layer structure.
Referring to fig. 14, the display area 11 outside the under-screen camera area 111 of the driving back plate 10 includes: a substrate base 310; and a buffer layer 321, a polysilicon layer 3221, a first gate insulating layer 322, a first gate layer 3231, a second gate insulating layer 323, a second gate layer 3241, an insulating medium layer 324, a first common electrode layer 3251, a passivation layer 325, a fourth flat layer 326, a second common electrode layer 3271, a fifth flat layer 327, a first flat layer 341, a second flat layer 342, and a third flat layer 343, which are sequentially disposed at one side of the substrate base plate 310, or may further include an anode layer 330a, a pixel defining layer 360, and/or a pixel supporting layer 370.
Referring to fig. 15, the under-screen camera area 111 of the driving back plate 10 includes: a substrate base 310; and a buffer layer 321, a first gate insulating layer 322, a second gate insulating layer 323, an insulating medium layer 324, a passivation layer 325, a fourth planarization layer 326, a fifth planarization layer 327, a first conductive layer 351, a first planarization layer 341, a second conductive layer 352, a second planarization layer 342, a third conductive layer 353, and a third planarization layer 343, which are sequentially disposed at one side of the substrate base plate 310, or may further include an anode layer 330a, a pixel defining layer 360, and/or a pixel supporting layer 370.
Referring to fig. 16, the non-display area 13 of the driving back plate 10 may include: a substrate base 310; and a buffer layer 321, a first gate insulating layer 322, a second gate insulating layer 323, an insulating dielectric layer 324, a passivation layer 325, a fourth planarization layer 326, a fifth planarization layer 327, a third planarization layer 343, and an alignment mark layer 330 sequentially disposed on one side of the substrate 310.
As can be seen from the above examples, the blocking pad layer 340 is formed of only the third planarization layer 343, so that residues formed on the fifth planarization layer 327 during the fabrication of the first conductive layer 351, the second conductive layer 352, and the third conductive layer 353 can be covered by the third planarization layer 343, thereby preventing the residues from affecting the alignment mark layer 330.
In some implementations, a blocking shim 340 may be provided in all areas of test binding area 132 and display occlusion area 131. Ensuring good alignment in both the display mask 131 and the test binding. For example, after test bond area 132 is also provided with blocking shim 340, it may be ensured that test bond area 132 is also well aligned, as shown in FIG. 17. In fig. 17 (D1), the test binding area 132 of the present embodiment is used, in fig. 17 (D2), the test binding area 132 of the present embodiment is not used, and it can be seen by comparing that the test binding area 132 is contaminated to a lower extent when the design of the driving back plate 10 of the present embodiment is used, and the alignment mark 401 in fig. 17 (D1) is more clearly visible than the alignment mark 402 in fig. 17 (D2).
Further, referring to fig. 3, the test binding area 132 is divided into a pair of landmark area and a land area 1322, and the pair of landmark area is located at one side of the land area 1322; the barrier underlayer 340 is disposed in the alignment mark region. While the blocking pad layer 340 may not be disposed on the wire pad region 1322, the residue generated by the transparent conductive layer 350 may cause a certain pollution to the wire pad region 1322, but has a limited effect on the wire connection effect; if the blocking pad 340 is also provided in the land area 1322, other disadvantages may occur in crimping the wire, such as crushing the internal structure of the driving back plate 10, due to the thicker thickness.
In some implementations, a space 1325 is provided between the alignment mark region 1321 and the land region 1322, as shown in fig. 18. The gap 1325 separates the alignment mark region 1321 from the land region 1322, so that the influence of the blocking pad layer 340 on the operation of the wire harness on the land region 1322 can be avoided, and the occurrence of defects in the wire bonding process can be avoided. In some implementations, the minimum width of the space 1325 may be no less than 17.5um. Of course, it may also be less than 17.5um, where device accuracy permits.
For example, a corresponding design comparison of the prior art solution and the present embodiment may be shown in fig. 19. Wherein fig. 19 (E1) is a prior art design; fig. 19 (E2) shows a design of the present embodiment, in which a 500um×720um region is designed as the alignment mark region 1321, and a uniform space 1325 is formed between the alignment mark region 1321 and the land region 1322, and the width of the space 1325 is 17.5um. Thereby enabling the addition of blocking pad layer 340 to alignment mark region 1321 without affecting the operation of land region 1322. Of course, the size of the alignment mark region 1321 may also be adjusted based on the alignment mark size in the alignment mark region 1321 in some implementations, without limitation.
It should be noted that, in some implementations, if multiple alignment mark layers 330 are included, a blocking cushion layer 340 is disposed on a side of each alignment mark layer 330 close to the substrate 310 for flattening, so as to protect the alignment mark layers 330, thereby ensuring the production yield and the product quality.
In this embodiment, by using one or more possible implementation manners as described above, the effect of the residues generated on the interlayer structure layer 320 during the manufacture of the transparent conductive layer 350 on the alignment mark layer 330 can be effectively avoided, the product yield after expanding the under-screen camera region 111 is improved, the limitation of the longitudinal size of the pixels on the number of transverse wires is compensated, the control number of electroluminescent devices in the light-transmitting display region 11 of the under-screen camera is increased, the light-transmitting area is increased, and the application of the camera with a larger size in the under-screen camera technology is satisfied. The driving back plate 10 is not limited to be applied to the structure of the transverse wiring of the under-screen camera area 111, but can be also applied to the structures of other wiring types such as longitudinal, non-transverse, non-longitudinal and the like.
Based on the same inventive concept, in yet another embodiment of the present application, there is also provided a display panel large plate structure including: the drive back plate of any of the preceding embodiments. Because the driving panel large board structure includes the driving back board of the foregoing embodiment, the driving panel large board has at least the same or similar beneficial effects as the driving back board, and the embodiments of the driving back board can be specifically referred to, which are not described in detail in this embodiment.
Based on the same inventive concept, there is also provided in still another embodiment of the present application a display panel including: the driving back plate of any one of the preceding embodiments and a light emitting structure layer disposed on a side of the driving back plate remote from the substrate. The light emitting structure layer may be an electroluminescent device. In addition, the LED lamp can also comprise a color film substrate, wherein the color film substrate can be attached to one side, far away from the driving backboard, of the light-emitting structure layer. The specific implementation of the light emitting structure layer and the color film substrate can refer to the existing common implementation manner, and is not repeated in this embodiment.
Referring to fig. 20, based on the same inventive concept, there is also provided a method for manufacturing a driving back plate according to an embodiment of the present application, the method including:
step S10: providing a substrate; the display area of the driving backboard is divided into an under-screen camera area;
step S20: forming an interlayer structure layer in the non-display area, and forming a transparent conductive layer in the under-screen camera area;
step S30: forming a barrier pad layer on the interlayer structure layer of the non-display region after forming the transparent conductive layer; the barrier underlayer is used for blocking residues generated on the interlayer structure layer when the transparent conductive layer is manufactured;
step S40: and forming an alignment mark layer on the barrier cushion layer.
In some implementations, as shown in fig. 21, a Substrate (Substrate) is provided first, and then a Buffer layer (Buffer), a polysilicon layer (Poly), a first Gate insulating layer (GI 1), a first Gate layer (Gate 1), a second Gate insulating layer (GI 2), a second Gate layer (Gate 2), an insulating dielectric layer (ILD), a first common electrode layer (SD 1), a passivation layer (PVX), a fourth planarization layer (PLN 4), a second common electrode layer (SD 2), a fifth planarization layer (PLN 5), a first conductive layer (ITO 1), a first planarization layer (PLN 1), a second conductive layer (ITO 2), a second planarization layer (PLN 2), a third conductive layer (ITO 3), a third planarization layer (PLN 3), and an Anode layer (inode) (alignment mark layer) are sequentially formed on one side of the Substrate; or the Pixel Definition Layer (PDL) and the pixel support layer (PS) may also be formed continuously.
The polysilicon layer, the first gate layer, the second gate layer, the first common electrode layer and the second common electrode layer are formed in a display area outside the under-screen camera area of the driving backboard. The first conductive layer, the second conductive layer and the third conductive layer are formed in the under-screen camera area. The first and second planarization layers are formed over the entire display region, and the third planarization layer is formed over the display region and the non-display region as a barrier pad layer. When the alignment mark layer is evaporated, the third flat layer can block residues formed on the fifth flat layer of the non-display area when the first conductive layer, the second conductive layer and the third conductive layer are manufactured, so that the alignment mark layer is protected.
It should be noted that, in the method for manufacturing a driving backboard according to the present embodiment, the formed structure of each step may refer to the foregoing structural embodiment, and the generated beneficial effects have been described in the foregoing embodiment related to the driving backboard, and in particular, the foregoing embodiment related to the driving backboard may be referred to, which is not described in detail. The specific process implementation of each structure when fabricated may employ existing process techniques, and is not limited in this embodiment.
In the above description, technical details of patterning, etching, and the like of each layer are not described in detail. Those skilled in the art will appreciate that layers, regions, etc. of the desired shape may be formed by a variety of techniques. In addition, to form the same structure, those skilled in the art can also devise methods that are not exactly the same as those described above. In addition, although the embodiments are described above separately, this does not mean that the measures in the embodiments cannot be used advantageously in combination.
While preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiments and all such alterations and modifications as fall within the scope of the application.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present application without departing from the spirit or scope of the application. Thus, it is intended that the present application also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.

Claims (13)

1. A drive backplate, the drive backplate comprising a substrate base plate; the display area of the driving backboard is divided into an under-screen camera area, and the under-screen camera area is provided with a transparent conductive layer; the non-display area of the drive backboard is provided with:
an interlayer structure layer provided on one side of the substrate base plate;
the alignment mark layer is arranged on one side of the interlayer structure layer far away from the substrate base plate;
a barrier underlayer disposed between the interlayer structure layer and the alignment mark layer; the barrier underlayer is used for blocking residues generated on the interlayer structure layer when the transparent conductive layer is manufactured.
2. The driving back panel of claim 1, wherein the barrier pad layer extends to the under-screen camera region and the barrier pad layer at the under-screen camera region covers the transparent conductive layer.
3. The driving back plate of claim 1, wherein the transparent conductive layer comprises 3 to 5 layers of transparent conductive material.
4. The driving back plate of claim 1, wherein the transparent conductive layer comprises:
a first conductive layer and a second conductive layer, the first conductive layer being disposed between the second conductive layer and the interlayer structure layer;
the barrier underlayment includes:
the first flat layer is arranged on one side of the interlayer structure layer far away from the substrate base plate and extends to the under-screen camera area; the first flat layer located in the under-screen camera area covers the first conductive layer;
the second flat layer is arranged on one side of the first flat layer away from the substrate base plate and extends to the under-screen camera area; the second flat layer located in the under-screen camera region covers the second conductive layer.
5. The driving back plate of claim 4, wherein said transparent conductive layer further comprises:
the third conductive layer is arranged on one side of the second flat layer away from the substrate base plate;
the barrier underlayment further comprises:
the third flat layer is arranged on one side of the second flat layer away from the substrate base plate and extends to the under-screen camera area; the third flat layer located in the under-screen camera region covers the third conductive layer.
6. The driving back plate according to claim 1, wherein the interlayer structure layer comprises:
a buffer layer disposed between the substrate base plate and the barrier pad layer;
a first gate insulating layer disposed between the buffer layer and the barrier pad layer;
a second gate insulating layer disposed between the first gate insulating layer and the barrier pad layer;
the insulating dielectric layer is arranged between the second gate insulating layer and the blocking cushion layer;
the passivation layer is arranged between the insulating medium layer and the blocking cushion layer;
a fourth flat layer disposed between the passivation layer and the barrier pad layer; and
and a fifth planarization layer disposed between the fourth planarization layer and the barrier pad layer.
7. The drive backplate of claim 1, wherein the non-display region comprises a test binding region and a display blocking region; the display shielding area surrounds the display area of the driving backboard, and the test binding area is arranged on the outer side of the display shielding area;
the blocking cushion layer is arranged in the test binding area and the display shielding area.
8. The drive backplate of claim 7, wherein the test binding region is divided into a pair of logo regions and a land region, the logo regions being located on one side of the land region;
the blocking cushion layer is arranged in the alignment mark region.
9. The drive backplate of claim 8, wherein a space is provided between the alignment mark region and the land region.
10. The drive backplate of claim 9, wherein the minimum width of the space is not less than 17.5um.
11. A large panel structure for a display panel, comprising: the drive back plate of any of claims 1-10.
12. A display panel, comprising: a light emitting structure layer and the drive back sheet of any one of claims 1-6, the light emitting structure layer being disposed on a side of the drive back sheet remote from the substrate.
13. A method of manufacturing a drive back plate, comprising:
providing a substrate; the display area of the driving backboard is divided into an under-screen camera area;
forming an interlayer structure layer in the non-display area, and forming a transparent conductive layer in the under-screen camera area;
forming a barrier pad layer on the interlayer structure layer of the non-display region after forming the transparent conductive layer; the barrier underlayer is used for blocking residues generated on the interlayer structure layer when the transparent conductive layer is manufactured;
and forming an alignment mark layer on the barrier cushion layer.
CN202210523395.8A 2022-05-13 2022-05-13 Driving backboard, large display panel structure and display panel Pending CN117116943A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210523395.8A CN117116943A (en) 2022-05-13 2022-05-13 Driving backboard, large display panel structure and display panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210523395.8A CN117116943A (en) 2022-05-13 2022-05-13 Driving backboard, large display panel structure and display panel

Publications (1)

Publication Number Publication Date
CN117116943A true CN117116943A (en) 2023-11-24

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
CN (1) CN117116943A (en)

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