CN117110707B - SOC integrated chip, frequency measurement circuit and frequency measurement method - Google Patents
SOC integrated chip, frequency measurement circuit and frequency measurement method Download PDFInfo
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R23/00—Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
- G01R23/02—Arrangements for measuring frequency, e.g. pulse repetition rate; Arrangements for measuring period of current or voltage
- G01R23/10—Arrangements for measuring frequency, e.g. pulse repetition rate; Arrangements for measuring period of current or voltage by converting frequency into a train of pulses, which are then counted, i.e. converting the signal into a square wave
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/06—Clock generators producing several clock signals
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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Abstract
The invention provides an SOC integrated chip, a frequency measurement circuit and a frequency measurement method, which are applied to the technical field of electronic and time-frequency measurement. Specifically, an input end of the measurement period generating module is connected with a measurement period self-adaptive adjusting module, so that an adjusted measurement period is generated and output through the measurement period self-adaptive adjusting module, continuous adjustment of the test period is achieved, and based on the continuously adjusted measurement period, a counter is used for sampling and counting a clock to be measured for multiple times, so that the frequency of the clock to be measured is finally obtained. The frequency measuring circuit provided by the invention can measure the high-speed clock in the high-speed SOC integrated chip and any other clocks with different frequencies, and as a large amount of operations are carried out on the software layers of the measuring period self-adaptive adjusting module and the comparison memory, the complexity of the IC circuit design can be effectively reduced, the debugging time of the chip can be effectively reduced, the time cost can be saved, and the business and updating efficiency can be accelerated.
Description
Technical Field
The invention relates to the technical field of electronic and time-frequency measurement, in particular to an SOC integrated chip, a frequency measurement circuit and a frequency measurement method.
Background
Because of the current requirement of ultra-large scale data centers for network switching bandwidths of 12.8Tbps and higher, the requirement of data centers for high-speed photoelectric transceiver chips is also becoming more and more urgent. With the higher and higher service rate carried by the transceiver chip, especially, the high-speed service signal has higher requirements on clock frequency and variety. Therefore, high speed SOCs need to support a wider clock rate.
The clock frequency refers to the frequency of a reference clock signal running inside the chip, and determines the operation speed of each functional module inside the chip. In high-speed chips, measurement of clock frequency is very important for the following reasons: 1. performance evaluation clock frequency is one of the key indicators for evaluating chip performance. The highest working frequency which can be achieved by the chip can be known by measuring the clock frequency of the chip, so that whether the performance of the chip meets the design requirement is evaluated; 2. in the fault checking, in a high-speed chip, the accuracy of a clock signal is critical to the normal operation of the chip. By measuring the clock frequency, whether the clock signal is stable or not and whether the clock signal has the problems of clock offset or clock jitter and the like or not can be determined, which is important for fault detection and debugging; 3. synchronization and protocol high speed chips typically require complex synchronization and protocol processing, which are typically based on clock signals. By accurately measuring the clock frequency, the correctness of the time sequence relation among all the functional modules can be ensured, thereby ensuring the normal operation of the chip. Therefore, clock frequency measurement is very important in high-speed chips, and it involves key aspects such as chip performance evaluation, troubleshooting, and synchronization and protocols. Accurate clock frequency measurements can ensure proper operation and optimal performance of the chip.
However, as the design complexity of the transceiver chip increases, the frequency of the clock increases, so how to effectively detect and measure the frequency of each high-speed clock becomes a difficulty to be solved by those skilled in the art.
Disclosure of Invention
The invention aims to solve the technical problem of overcoming the defects of the prior art and providing an SOC integrated chip, a frequency measurement circuit and a frequency measurement method which have stronger adaptability, can adaptively learn and adjust the measurement period, can be compatible with various measurement ranges and can improve the measurement precision.
In order to solve the above-mentioned technical problem, a frequency measurement circuit includes:
and the measurement period generation module is connected with the measurement period self-adaptive adjustment module and is used for generating and outputting an adjusted measurement period based on the adjustment period generated by the measurement period self-adaptive adjustment module after generating and outputting an initial value of the measurement period according to the period of the reference clock.
And the periodic pulse generation module is connected with the reference clock and connected with the measurement period generation module and the clock domain crossing circuit, and is used for generating at intervals and outputting a first periodic pulse signal which is the same as the clock domain of the reference clock to the clock domain crossing circuit, wherein the period of the first periodic pulse signal is the measurement period.
And the clock domain crossing circuit is connected with a clock to be measured and is connected with the counter, so that the first periodic pulse signal is adapted to a second periodic pulse signal which is the same as the clock domain of the clock to be measured, wherein the period of the second periodic pulse signal is the measurement period.
And the counter is connected with the clock to be detected and connected with the comparison memory, and is used for sampling and counting the clock to be detected for a plurality of times by using the second periodic pulse signal and sending the counting result to the comparison memory for storage.
And the comparison memory is connected with the judging module and is used for comparing the counting result with the stored maximum value and/or minimum value of the counting result after receiving the counting result, taking the counting result as a new maximum value of the counting result if the counting result is larger than the stored maximum value of the counting result, taking the counting result as a new minimum value of the counting result if the counting result is smaller than the stored minimum value of the counting result, and then storing and sending the new maximum value and the new minimum value of the counting result to the judging module.
And the judging module is connected with the measurement period self-adaptive adjusting module and is used for comparing the difference between the new maximum value and the new minimum value of the counting result, and if the difference value is not in the preset range, a starting instruction is sent to the measurement period self-adaptive adjusting module.
And the measurement period self-adaptive adjustment module is used for forming an adjustment period according to a preset self-adaptive algorithm after receiving the starting instruction and sending the adjustment period to the measurement period generation module.
In some alternative embodiments, the frequency measurement circuit may further include: and the measurement starting module is connected with the measurement period generating module and is used for transmitting the parameter information of the reference clock to the measurement period generating module after receiving the frequency measurement starting instruction transmitted by the upper computer, wherein the parameter information comprises a period.
In some alternative embodiments, the frequency measurement circuit may be applied in particular to an SOC integrated chip, which may in particular comprise a plurality of clock signals.
In some alternative embodiments, the frequency measurement circuit may further include: and the clock selection module is connected with the clock signals and connected with the clock domain crossing circuit and the counter, and is used for selecting a clock signal from the clock signals as the clock to be tested and sending the selected clock to be tested to the clock domain crossing circuit and the counter.
In some alternative embodiments, the frequency measurement circuit further comprises: and the counting measurement module is connected with the judgment module and is used for calculating and outputting the frequency of the clock to be measured when the judgment module compares that the difference value of the new maximum value and the new minimum value of the counting result is in the preset range.
In a second aspect, based on the same inventive concept, the present invention also proposes an SOC integrated chip, which may include the frequency measurement circuit as described above.
In a third aspect, based on the same inventive concept, the present invention further provides a frequency measurement method, which may include the following steps:
the period of the reference clock is determined, forming a measurement period.
And forming a first periodic pulse signal which is the same as the clock domain of the reference clock based on the measurement period and the parameter clock.
And determining a clock to be detected, and performing cross-clock domain processing on the first periodic pulse based on the clock to be detected to obtain a second periodic pulse signal which is the same as the clock domain of the clock to be detected.
And sampling and counting the clock to be tested by using the second periodic pulse signal to obtain a current counting result.
Comparing the current counting result with the maximum value and/or the minimum value of the pre-stored counting result, and determining the updated maximum value and minimum value of the counting result according to the comparison result.
Comparing the updated maximum value and the updated minimum value of the counting result, if the difference value of the maximum value and the minimum value is not in the preset range, forming an adjustment period by utilizing an adaptive learning algorithm, and returning to the step of executing the measurement period to form an adjusted measurement period based on the adjustment period.
In some alternative embodiments, the periods of the first periodic pulse signal and the second periodic pulse signal are the same, and are both the measurement periods.
In some optional embodiments, the step of determining the updated maximum value and the updated minimum value of the count result according to the comparison result may specifically include:
and if the current counting result is larger than the maximum value of the pre-stored counting results, taking the current counting result as the updated maximum value of the counting results.
And if the current counting result is smaller than the minimum value of the pre-stored counting results, taking the current counting result as the updated minimum value of the counting result.
In some alternative embodiments, the frequency measurement method may further include: and if the difference value of the updated maximum value and the updated minimum value of the counting result is in a preset range, obtaining the frequency of the clock to be tested based on the updated maximum value or the updated minimum value of the counting result.
In some optional embodiments, the preset range of the difference value may specifically be: 1 to 2, and preferably 1.
In a fourth aspect, the present invention further provides an electronic device, including a processor, a communication interface, a memory, and a communication bus, where the processor, the communication interface, and the memory complete communication with each other through the communication bus;
a memory for storing a computer program;
and a processor for implementing the steps of the frequency measurement method as described above when executing the program stored on the memory.
Compared with the prior art, the invention has the following beneficial effects:
in the frequency measurement circuit provided by the invention, one input end of the measurement period generation module is connected with a measurement period self-adaptive adjustment module, so that an adjusted measurement period is obtained through the adjustment period which is output by the measurement period self-adaptive adjustment module and is used for adjusting the measurement period, and then the clock to be measured is counted by multiple rising edges or falling edges based on the continuously adjusted measurement period, and the cycle counting is stopped when the difference value of the maximum value and the minimum value of the counting result is within a preset range, and finally the frequency of the clock to be measured is obtained.
The frequency measuring circuit provided by the invention is not limited in the frequency range to be measured, not only can be used for measuring the high-speed clock in the high-speed SOC integrated chip, but also can be used for measuring any other different frequency clocks, so that the frequency measuring circuit provided by the invention has the characteristics of stronger adaptability, capability of adaptively learning and adjusting the measuring period, compatibility with various measuring ranges and improvement of measuring precision.
In addition, when the frequency of the clock to be measured is measured, the maximum value or the minimum value of the counting result for determining the frequency of the clock to be measured is updated excessively along with the adjustment of the measuring period until the difference between the maximum value and the minimum value of the counting result is 1, namely the adjusted measuring period reaches the target measuring period, and the frequency is calculated to be the most accurate based on the target measuring period.
Furthermore, a large number of operations are carried out on the software layers of the measurement period self-adaptive adjustment module and the comparison memory, so that the main design thought of the frequency measurement circuit provided by the invention is the combination of software and hardware, and the frequency measurement circuit based on the design thought can effectively reduce the complexity of the design of the IC circuit, effectively reduce the debugging time of a chip, save the time cost and accelerate the quick business and updating efficiency of the chip.
Drawings
Fig. 1 is a schematic circuit diagram of a frequency measurement circuit according to some embodiments of the present invention.
Fig. 2 is a flow chart of a frequency measurement method according to some embodiments of the invention.
Detailed Description
The invention will be described in further detail with reference to the drawings and the specific embodiments thereof in order to make the objects, advantages and features of the invention more apparent. It should be noted that the drawings are in a very simplified form and are not drawn to scale, merely for convenience and clarity in aiding in the description of embodiments of the invention. Furthermore, the structures shown in the drawings are often part of actual structures. In particular, the drawings are shown with different emphasis instead being placed upon illustrating the various embodiments.
As used in this disclosure, the singular forms "a," "an," and "the" include plural referents, the term "or" are generally used in the sense of comprising "and/or" and the term "several" are generally used in the sense of comprising "at least one," the term "at least two" are generally used in the sense of comprising "two or more," and the term "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying any relative importance or number of features indicated. Thus, a feature defining "first," "second," "third," or "third" may explicitly or implicitly include one or at least two such features, with "one end" and "another end" and "proximal end" and "distal end" generally referring to the respective two portions, including not only the endpoints, but also the terms "mounted," "connected," "coupled," and "connected" are to be construed broadly, e.g., as being either a fixed connection, a removable connection, or as being integral therewith; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. Furthermore, as used in this disclosure, an element disposed on another element generally only refers to a connection, coupling, cooperation or transmission between two elements, and the connection, coupling, cooperation or transmission between two elements may be direct or indirect through intermediate elements, and should not be construed as indicating or implying any spatial positional relationship between the two elements, i.e., an element may be in any orientation, such as inside, outside, above, below, or on one side, of the other element unless the context clearly indicates otherwise. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances.
As mentioned in the background art, in the electronic technology, the frequency is always one of the most basic parameters, and has very close relation with the measurement schemes and measurement results of many electric parameters, so that the measurement of the frequency is also particularly important. However, as the design complexity of the transceiver chip increases, the frequency of the clock increases, so how to effectively detect and measure the frequency of each high-speed clock becomes a difficulty to be solved by those skilled in the art.
Therefore, the invention provides the SOC integrated chip, the frequency measurement circuit and the frequency measurement method which have stronger adaptability, can adaptively learn and adjust the measurement period, can be compatible with various measurement ranges and can improve the measurement precision by combining software and hardware.
A frequency measurement circuit of the present invention will be described in further detail below. The present invention will be described in more detail below with reference to fig. 1, in which a preferred embodiment of the present invention is shown, it being understood that one skilled in the art can modify the invention described herein while still achieving the advantageous effects of the invention. Accordingly, the following description is to be construed as broadly known to those skilled in the art and not as limiting the invention.
Referring to fig. 1, a frequency measurement circuit provided in an embodiment of the present invention may specifically include: a measurement start circuit 10, a measurement period generation module 20, a period pulse generation module 30, a clock domain crossing circuit 40, a clock selection module 50, a counter 60, a comparison memory 70, a decision module 80, a measurement period adaptive adjustment module 90 and a count measurement module 100; wherein,
the measurement start circuit 10 includes an input terminal for receiving a frequency measurement start command and parameter information of a reference clock, such as a period (period value) of the reference clock, transmitted from the host computer, and an output terminal connected to the measurement period generation module 20 and for transmitting the received period of the reference clock to the measurement period generation module 20.
The measurement period generating module 20 includes a first input terminal, a second input terminal and an output terminal, the first input terminal is connected to the output terminal of the measurement starting circuit 10, the second input terminal is connected to the output terminal of the measurement period adaptive adjustment module 90, and the output terminal is connected to the period pulse generating module 30, so as to generate and output an adjusted measurement period based on the adjustment period generated by the measurement period adaptive adjustment module 90 after generating and outputting an initial value of the measurement period according to the period of the reference clock.
The periodic pulse generating module 30 includes a first input terminal, a second input terminal and an output terminal, the first input terminal is connected to the reference clock, the second input terminal is connected to the output terminal of the measurement period generating module 20, and the output terminal is connected to the clock-crossing domain circuit 40, so as to generate a first periodic pulse signal which is the same as the clock domain of the reference clock at intervals, and send the generated first periodic pulse signal to the clock-crossing domain circuit 40 through the output terminal, wherein the period of the first periodic pulse signal is the measurement period.
The clock domain crossing circuit 40 includes a first input terminal, a second input terminal and an output terminal, where the first input terminal is connected to the output terminal of the periodic pulse generating module 30, the second input terminal is connected to the output terminal of the clock selecting module 50, so as to access a clock signal selected by the clock selecting module 50 from a plurality of clock signals and used as the clock to be measured through the second input terminal, and the output terminal is connected to the input terminal of the counter 60, so as to perform clock domain crossing processing on the first periodic pulse signal according to the clock domain of the clock to be measured, that is, adapt the first periodic pulse signal to a second periodic pulse signal identical to the clock domain of the clock to be measured, where the period of the second periodic pulse signal is the measurement period.
The clock selection module 50 includes an input terminal, a first output terminal and a second output terminal, where the input terminal can access a plurality of clock signals, the first output terminal is connected to the second input terminal of the clock domain crossing circuit 40, and the second output terminal is connected to an input terminal of the counter 60, so as to select a clock signal from the plurality of clock signals accessed by the input terminal as the clock to be measured, and send the selected clock to be measured to the clock domain crossing circuit 40 and the counter 60, respectively.
The counter 60 includes a first input terminal, a second input terminal and an output terminal, the first input terminal is connected to the output terminal of the clock domain crossing circuit 40, the second input terminal is connected to the second output terminal of the clock selecting module 50, and the output terminal is connected to the comparing memory 70, so as to sample and count the clock to be measured for multiple times by using the second periodic pulse signal, and send the count result to the comparing memory 70 for storage.
The comparison memory 70 includes an input terminal and an output terminal, the input terminal is connected to the output terminal of the counter 60, and the output terminal is connected to the input terminal of the decision module 80, so as to adjust the maximum value and/or the minimum value of the count result counted by the counter 60 in each measurement period after receiving the count result, and store the adjusted maximum value and minimum value. Specifically, the comparison memory 70 may compare the count result corresponding to each measurement period with the stored maximum value and/or minimum value of the count result after receiving the count result corresponding to each measurement period, and if the count result is greater than the stored maximum value of the count result, take the count result as a new maximum value of the count result, and if the count result is less than the stored minimum value of the count result, take the count result as a new minimum value of the count result, and then store and send the new maximum value and the new minimum value of the count result to the decision module 80.
The decision module 80 includes an input end, a first output end and a second output end, the input end is connected with the output end of the comparison memory 70, the first output end is connected with the input end of the measurement period adaptive adjustment module 90, the second output end is connected with the input end of the count measurement module 100, so as to perform differential comparison on the new maximum value and the minimum value of the count result, if the differential value is not within a preset range, a start command is sent to the measurement period adaptive adjustment module 90, and if the differential value is within the preset range, the new maximum value and the new minimum value of the count result of the current comparison are directly sent to the count measurement module 100.
The measurement period adaptive adjustment module 90 includes an input end and an output end, wherein the input end of the measurement period adaptive adjustment module is connected to the first output end of the decision module 80, and the output of the measurement period adaptive adjustment module is connected to the second input end of the measurement period generation module 20, so as to form an adjustment period according to a preset adaptive algorithm after receiving the start command sent by the decision module 80, that is, when the difference value between the new maximum value and the minimum value of the count result is not within the preset range, and send the adjustment period to the measurement period generation module 20, so that the measurement period generation module 20 takes the adjustment period as the period of the reference clock after receiving the adjustment period, and re-forms a new measurement period (that is, an adjusted measurement period), and performs sampling count of the clock to be measured again based on the adjusted measurement period.
The counting measurement module 100 includes an input end and an output end, where the input end is connected to the second output end of the decision module 80, and is configured to calculate and output the frequency of the clock to be measured based on the maximum value or the minimum value when the decision module 80 compares that the difference value between the new maximum value and the new minimum value of the counting result is in the preset range.
The preset range of the difference value may specifically be: 1 to 2, and preferably 1.
It should be noted that, in some embodiments of the present invention, the frequency measurement circuit shown in fig. 1 may be used as a separate frequency measurement test circuit, so as to start the frequency measurement circuit under the control of an external host computer; in other embodiments of the present invention, the frequency measurement circuit shown in fig. 1 may be used as a sub-circuit in a circuit that needs to measure a frequency, for example, the frequency measurement circuit shown in fig. 1 may be connected to an SOC integrated chip that includes a plurality of clock signals, so as to measure a clock signal in the SOC integrated chip, that is, the specific use of the frequency measurement circuit shown in fig. 1 is not limited by the present invention, so long as frequency measurement is implemented.
Obviously, in the frequency measurement circuit provided in the embodiment of the invention, an input end of the measurement period generation module is connected with a measurement period self-adaptive adjustment module, so that an adjusted measurement period is obtained through an adjustment period for adjusting the measurement period output by the measurement period self-adaptive adjustment module, and then a clock to be measured is counted for multiple rising edges or falling edges based on the continuously adjusted measurement period, and the cycle counting is stopped when the difference value of the maximum value and the minimum value of the counting result is within a preset range, and finally the frequency of the clock to be measured is obtained.
The frequency measuring circuit provided by the embodiment of the invention does not limit the frequency range to be measured, not only can measure the high-speed clock in the high-speed SOC integrated chip, but also can measure any other different frequency clocks, so that the unexpected technical effects obtained by the frequency measuring circuit provided by the embodiment of the invention are at least as follows: the adaptability is stronger, the measurement period can be adaptively learned and adjusted, various measurement ranges are compatible, and the measurement precision is improved.
In addition, the frequency measurement circuit provided by the embodiment of the invention can offload a large amount of operation to the software layer for execution, so that the purposes of effectively reducing the complexity of a chip, saving the frequency calculation time cost, effectively reducing the power consumption of the chip and reducing the complexity of digital logic can be achieved.
Based on the frequency measurement circuit shown in fig. 1, the embodiment of the invention further provides a frequency measurement method, as shown in fig. 2, where fig. 2 is a flow chart of the frequency measurement method provided in the embodiment of the invention.
Referring to fig. 2, the frequency measurement method specifically may include the following steps:
in step S201, the period of the reference clock is determined, forming a measurement period.
Step S202, forming a first periodic pulse signal with the same clock domain as the reference clock based on the measurement period and the parameter clock.
Step S203, determining a clock to be tested, and performing cross-clock domain processing on the first periodic pulse based on the clock to be tested, so as to obtain a second periodic pulse signal identical to the clock domain of the clock to be tested.
And step S204, sampling and counting the clock to be tested by using the second periodic pulse signal to obtain a current counting result.
Step S205, comparing the current counting result with the maximum value and/or the minimum value of the pre-stored counting result, and determining the updated maximum value and the updated minimum value of the counting result according to the comparison result.
Step S206, comparing whether the updated maximum value and minimum value of the counting result are in a preset range.
Step S207, if the difference between the maximum value and the minimum value is not within the preset range, forming an adjustment period by using an adaptive learning algorithm, and returning to the step of forming the measurement period, so as to form an adjusted measurement period based on the adjustment period.
Step S208, if the difference value between the updated maximum value and the updated minimum value of the count result is within the preset range, obtaining the frequency of the clock to be tested based on the updated maximum value or the updated minimum value of the count result.
The periods of the first periodic pulse signal and the second periodic pulse signal are the same and are the measurement periods.
In the step S201, after receiving the frequency test start command, the measurement period generating module 20 in fig. 1 forms an initial value of a measurement period according to a period of a reference clock received at the same time, and then sequentially executes steps S202 to S208 based on the initial value of the measurement period to obtain initial values of a maximum value and a minimum value of a count result, however, since only one count result is obtained at this time, the corresponding maximum value and the minimum value are equal, i.e. the difference value between the maximum value and the minimum value of the count result is 0, and is not within a preset range, so the measurement period adaptive adjusting module 90 obtains an adjustment period according to a preset adaptive learning algorithm (for example, zero forcing algorithm, steepest descent algorithm, LMS algorithm, or RLS algorithm), and the measurement period generating module 20 performs the steps S202 to S208 again as a period of a new reference clock, so on until the output of the measurement period stops after the adjustment is stopped when the difference value between the maximum value and the minimum value of the updated result obtained based on a certain adjusted measurement period is 1.
In the above step S202, the periodic pulse generating module 30 forms a first periodic pulse signal in each measurement period, which is identical to the clock domain of the reference clock and has a period equal to the measurement period, according to the accessed reference clock and the measurement period (the initial value of the measurement period and the subsequent adjusted measurement period) received each time.
In the step S203, in each measurement period, the clock domain crossing circuit 40 performs clock domain crossing processing on the first periodic pulse signal according to the received clock domain of the clock to be measured, so as to obtain a second periodic pulse signal identical to the clock domain of the clock to be measured, where the clock domains of the clock to be measured and the reference clock are different.
In the above steps S204 to S205, in each measurement period, the counter 60 counts the rising edge or the falling edge of the clock to be measured in the measurement period by using the principle that the clock domain of the second periodic pulse signal formed each time is the same as the clock domain of the clock to be measured, so as to avoid the problem of metastable state, and then obtains a count result, and compares the count result with the maximum value and the minimum value (pre-stored in the comparison memory 70) of the count result obtained based on at least two previous measurements, and if the count result is greater than the maximum value of the pre-stored count result, the count result is used as the updated maximum value of the count result; and if the counting result is smaller than the pre-stored minimum value of the counting result, taking the current counting result as the updated minimum value of the counting result, namely determining the updated maximum value and the updated minimum value of the counting result.
In the steps S206 to S208, in each measurement period, the decision module 80 receives a maximum value and a minimum value of the count result, compares the maximum value with the minimum value, if the difference value between the maximum value and the minimum value is 1, it represents that the measurement period after the current adjustment reaches the target measurement period, and the frequency calculated based on the target measurement period is the most accurate, and can stop the iterative count, and directly output the frequency of the clock to be measured through the count measurement module 100, if the difference value between the maximum value and the minimum value is greater than 2, it represents that the measurement period after the current adjustment does not reach the target measurement period, and the calculated count result has an error based on the current measurement period, that is, the frequency of the clock to be measured is calculated to have an error with the frequency of the clock to be measured, so it is necessary to readjust the measurement period, and execute the steps S201 to S208 again.
In summary, in the frequency measurement circuit provided by the present invention, an input end of the measurement period generating module is connected with a measurement period adaptive adjustment module, so that an adjusted measurement period is obtained through an adjustment period for adjusting the measurement period output by the measurement period adaptive adjustment module, and then a clock to be measured is counted for multiple rising edges or falling edges based on the continuously adjusted measurement period, and the cycle count is stopped when a difference value between a maximum value and a minimum value of the count result is within a preset range, and finally the frequency of the clock to be measured is obtained.
The frequency measuring circuit provided by the invention is not limited in the frequency range to be measured, not only can be used for measuring the high-speed clock in the high-speed SOC integrated chip, but also can be used for measuring any other different frequency clocks, so that the frequency measuring circuit provided by the invention has the characteristics of stronger adaptability, capability of adaptively learning and adjusting the measuring period, compatibility with various measuring ranges and improvement of measuring precision.
In addition, when the frequency of the clock to be measured is measured, the maximum value or the minimum value of the counting result for determining the frequency of the clock to be measured is updated excessively along with the adjustment of the measuring period until the difference between the maximum value and the minimum value of the counting result is 1, namely the adjusted measuring period reaches the target measuring period, and the frequency is calculated to be the most accurate based on the target measuring period.
Furthermore, a large number of operations are carried out on the software layers of the measurement period self-adaptive adjustment module and the comparison memory, so that the main design thought of the frequency measurement circuit provided by the invention is the combination of software and hardware, and the frequency measurement circuit based on the design thought can effectively reduce the complexity of the design of the IC circuit, effectively reduce the debugging time of a chip, save the time cost and accelerate the quick business and updating efficiency of the chip.
The embodiment of the invention also provides an electronic device, which comprises a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory are communicated with each other through the communication bus,
a memory for storing a computer program;
and the processor is used for realizing the frequency measurement method provided by the embodiment of the invention when executing the program stored in the memory.
In addition, other implementation manners of the auxiliary graphics adding method implemented by the processor executing the program stored in the memory are the same as those mentioned in the foregoing method embodiment section, and will not be repeated here.
The communication bus mentioned by the control terminal may be a peripheral component interconnect standard (Peripheral Component Interconnect, PCI) bus or an extended industry standard architecture (Extended Industry Standard Architecture, EISA) bus, etc. The communication bus may be classified as an address bus, a data bus, a control bus, or the like. For ease of illustration, the figures are shown with only one bold line, but not with only one bus or one type of bus.
The communication interface is used for communication between the electronic device and other devices.
The Memory may include random access Memory (Random Access Memory, RAM) or may include Non-Volatile Memory (NVM), such as at least one disk Memory. Optionally, the memory may also be at least one memory device located remotely from the aforementioned processor.
The processor may be a general-purpose processor, including a central processing unit (Central Processing Unit, CPU), a network processor (Network Processor, NP), etc.; but also digital signal processors (Digital Signal Processing, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), field programmable gate arrays (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.
In yet another embodiment of the present invention, a computer readable storage medium is provided, in which instructions are stored, which when run on a computer, cause the computer to perform a frequency measurement method according to any of the above embodiments.
In the above embodiments, it may be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded and executed on a computer, produces a flow or function in accordance with embodiments of the present invention, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions may be stored in or transmitted from one computer-readable storage medium to another, for example, by wired (e.g., coaxial cable, optical fiber, digital Subscriber Line (DSL)), or wireless (e.g., infrared, wireless, microwave, etc.). The computer readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that contains an integration of one or more available media. The usable medium may be a magnetic medium (e.g., floppy Disk, hard Disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid State Disk (SSD)), etc.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
In this specification, each embodiment is described in a related manner, and identical and similar parts of each embodiment are all referred to each other, and each embodiment mainly describes differences from other embodiments. In particular, for apparatus, electronic devices, and computer-readable storage medium embodiments, the description is relatively simple, as it is substantially similar to method embodiments, with reference to portions of the description of method embodiments being relevant.
The foregoing description is only of the preferred embodiments of the present invention and is not intended to limit the scope of the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention are included in the protection scope of the present invention.
Claims (9)
1. A frequency measurement circuit, comprising:
the measuring period generating module is connected with the measuring period self-adaptive adjusting module and is used for generating and outputting an adjusted measuring period based on the adjusting period generated by the measuring period self-adaptive adjusting module after generating and outputting an initial value of the measuring period according to the period of the reference clock;
the periodic pulse generation module is connected with the reference clock and connected with the measurement period generation module and the clock domain crossing circuit, and is used for generating at intervals and outputting a first periodic pulse signal which is the same as the clock domain of the reference clock to the clock domain crossing circuit, wherein the period of the first periodic pulse signal is the measurement period;
the clock domain crossing circuit is connected with a clock to be measured and connected with the counter, and is used for adapting the first periodic pulse signal to a second periodic pulse signal which is the same as the clock domain of the clock to be measured, wherein the period of the second periodic pulse signal is the measurement period;
the counter is connected with the clock to be detected and connected with the comparison memory, and is used for sampling and counting the clock to be detected for a plurality of times by using the second periodic pulse signal, and sending the counting result to the comparison memory for storage;
the comparison memory is connected with the judging module and is used for comparing the counting result with the stored maximum value and/or minimum value of the counting result after receiving the counting result, taking the counting result as a new maximum value of the counting result if the counting result is larger than the stored maximum value of the counting result, taking the counting result as a new minimum value of the counting result if the counting result is smaller than the stored minimum value of the counting result, and then storing and sending the new maximum value and the new minimum value of the counting result to the judging module;
the judging module is connected with the measurement period self-adaptive adjustment module and is used for performing difference comparison on the new maximum value and the new minimum value of the counting result, and if the difference value is not in a preset range, a starting instruction is sent to the measurement period self-adaptive adjustment module;
the measurement period self-adaptive adjustment module is used for forming an adjustment period according to a preset self-adaptive algorithm after receiving the starting instruction, and sending the adjustment period to the measurement period generation module; and
and the counting measurement module is connected with the judgment module and is used for calculating and outputting the frequency of the clock to be measured when the judgment module compares that the difference value of the new maximum value and the new minimum value of the counting result is in the preset range.
2. The frequency measurement circuit of claim 1, wherein the frequency measurement circuit further comprises: and the measurement starting module is connected with the measurement period generating module and is used for transmitting the parameter information of the reference clock to the measurement period generating module after receiving the frequency measurement starting instruction transmitted by the upper computer, wherein the parameter information comprises a period.
3. The frequency measurement circuit of claim 1, wherein the frequency measurement circuit is applied to an SOC integrated chip that includes a plurality of clock signals.
4. The frequency measurement circuit of claim 3, wherein the frequency measurement circuit further comprises: and the clock selection module is connected with the clock signals and connected with the clock domain crossing circuit and the counter, and is used for selecting a clock signal from the clock signals as the clock to be tested and sending the selected clock to be tested to the clock domain crossing circuit and the counter.
5. An SOC integrated chip comprising the frequency measurement circuit of any of claims 1 to 4.
6. A method of frequency measurement, comprising:
determining the period of a reference clock to form a measurement period;
forming a first periodic pulse signal which is the same as the clock domain of the reference clock based on the measurement period and the parameter clock;
determining a clock to be detected, and performing cross-clock domain processing on the first periodic pulse based on the clock to be detected to obtain a second periodic pulse signal which is the same as the clock domain of the clock to be detected;
sampling and counting the clock to be tested by using the second periodic pulse signal to obtain a current counting result;
comparing the current counting result with the maximum value and/or the minimum value of the pre-stored counting result, and determining the updated maximum value and minimum value of the counting result according to the comparison result;
comparing the updated maximum value and the updated minimum value of the counting result, if the difference value of the maximum value and the minimum value is not in the preset range, forming an adjustment period by using an adaptive learning algorithm, and returning to the step of executing the measurement period to form an adjusted measurement period based on the adjustment period;
and if the difference value of the updated maximum value and the updated minimum value of the counting result is in a preset range, obtaining the frequency of the clock to be tested based on the updated maximum value or the updated minimum value of the counting result.
7. The method of measuring frequency according to claim 6, wherein the periods of the first periodic pulse signal and the second periodic pulse signal are the measurement periods.
8. The frequency measurement method of claim 6, wherein the step of determining updated maximum and minimum values of the count result based on the comparison result comprises:
if the current counting result is larger than the maximum value of the pre-stored counting results, taking the current counting result as the updated maximum value of the counting results;
and if the current counting result is smaller than the minimum value of the pre-stored counting results, taking the current counting result as the updated minimum value of the counting result.
9. The method of claim 8, wherein the predetermined range of the difference value is: 1-2.
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