CN117013638B - High-voltage-dead-resistant battery circuit comprising multistage protection - Google Patents
High-voltage-dead-resistant battery circuit comprising multistage protection Download PDFInfo
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- CN117013638B CN117013638B CN202310687670.4A CN202310687670A CN117013638B CN 117013638 B CN117013638 B CN 117013638B CN 202310687670 A CN202310687670 A CN 202310687670A CN 117013638 B CN117013638 B CN 117013638B
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- 238000007599 discharging Methods 0.000 claims description 5
- 238000004519 manufacturing process Methods 0.000 abstract description 3
- 230000015556 catabolic process Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
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- 238000004088 simulation Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/00032—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries characterised by data exchange
- H02J7/00034—Charger exchanging data with an electronic device, i.e. telephone, whose internal battery is under charge
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
- H02H9/04—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
- H02J7/00308—Overvoltage protection
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
Abstract
The invention relates to a high-voltage-resistant dead battery circuit with multistage protection, and belongs to the technical field of electronics. The high voltage tolerant dead battery circuit comprising the multi-stage protection of the present invention comprises a dead battery pull-down circuit and a multi-stage protection circuit. When the dead battery pull-down circuit is connected with the battery management system to carry out a handshake protocol, the connection port is ensured to have the voltage specified by the handshake protocol, and the battery is charged by the system in a dead battery state. Through multistage protection circuit, according to the different circumstances of port, utilize each level protection circuit to dead battery pull-down circuit connect battery management system's port's voltage carry out the bleeder current to the dead battery pull-down circuit is protected, and then can effectively improve circuit anti surge and ESD ability, avoid the chip damage. The circuit has simple structure and low production and application cost, and can be widely applied to various electronic products.
Description
Technical Field
The invention relates to the technical field of electronics, in particular to the technical field of integrated circuits, and particularly relates to a high-voltage-dead-resistant battery circuit with multistage protection.
Background
With the development of radio technology, various portable, wirelessly chargeable mobile devices are becoming more and more popular. The charging ports of these portable intelligent wireless charging devices have been gradually unified into a Type-C interface. However, in daily hot plug use, the CC port is often shorted to a power supply up to 20V. Due to ringing, the instantaneous surge voltage of the port may double up to 40V, resulting in breakdown of the electrical components of the dead battery pull-down module, thereby causing the Type C device to fail to handshake recognition once the dead battery state occurs, losing the charging function in the dead battery state. And surge voltages up to 40V may damage the CC port connected devices if they cannot drain current.
Therefore, there is a need to develop a dead battery solution that can withstand high voltages.
Disclosure of Invention
The object of the present invention is to overcome the drawbacks of the prior art described above and to provide a dead battery circuit with high voltage resistance comprising a multi-stage protection.
In order to achieve the above object, a high-voltage dead-resistant battery circuit including multi-stage protection of the present invention has the following constitution:
it includes dead battery pull-down circuitry and multi-stage protection circuitry.
The dead battery pull-down circuit is used for ensuring that the connection port has the voltage specified by the handshake protocol when the dead battery pull-down circuit is connected with the battery management system to perform the handshake protocol; the multi-stage protection circuit is connected to the dead battery pull-down circuit and is used for discharging the voltage of the port of the dead battery pull-down circuit connected with the battery management system by utilizing the protection circuit of each stage according to different conditions of the port.
In the high-voltage dead battery circuit comprising the multi-stage protection, the multi-stage protection circuit comprises a first-stage protection circuit, a second-stage protection circuit and a third-stage protection circuit, and all stages of protection circuits are connected with the dead battery pull-down circuit.
In the high-voltage dead battery circuit containing multistage protection, the dead battery pull-down circuit is connected with the battery management system through the CC port of the Type C adapter.
In the high-voltage dead-resistant battery circuit comprising multi-stage protection, the battery management system provides current filling and is connected with the CC port; the dead battery pull-down circuit includes: the CC port is respectively connected with the upper ends of the first resistor R1 and the second resistor R2; the lower end of the second resistor R2 is respectively connected with the grid electrode of the first high-voltage NMOS tube N1 and the upper end of the first voltage margin module 4; the lower end of the first voltage margin module 4 is connected with the ground GND; the lower end of the first resistor R1 is connected with the drain electrode of the high-voltage NMOS tube N1; the source electrode of the first high-voltage NMOS tube N1 is connected with the ground GND.
In the high-voltage-resistant dead battery circuit comprising multi-stage protection, a dead battery state input signal UVLO and a first protection voltage range signal OVP are connected to the first-stage protection circuit; providing an overvoltage point VOVP1 of the first-stage protection circuit to an overvoltage point VOVP2 of the second-stage protection circuit in a voltage protection range; the dead battery state input signal UVLO is connected with the gates of the fourth high-voltage NMOS tube N4 and the second NMOS tube N2; the drain electrode of the fourth high-voltage NMOS tube N4 is connected with the anode of the first zener diode D1; the source electrode of the fourth high-voltage NMOS tube N4 is respectively connected with the upper end of the fourth resistor R4 and the grid electrode of the fifth NMOS tube N5; the drain electrode of the second NMOS tube N2 is connected with the grid electrode of the first high-voltage NMOS tube N1; the source electrode of the second NMOS tube N2 is respectively connected with the drain electrodes of the fifth NMOS tube N5 and the third NMOS tube N3 and the upper end of the second voltage margin module 5; the source electrode of the fifth NMOS tube N5 is grounded GND; the lower end of the fourth resistor R4 is connected with GND; the negative electrode of the first zener diode D1 is connected with the lower end of the third current limiting resistor R3; the upper end of the third current limiting resistor R3 is connected with the CC port; the lower end of the second voltage margin module 5 is grounded to GND; the grid electrode of the third NMOS tube N3 is connected with the first protection voltage range signal OVP; the source of which is grounded GND.
In the high-voltage dead-resistant battery circuit comprising multi-stage protection, the second-stage protection circuit comprises a second zener diode D2, and the voltage protection range is from an overvoltage point VOVP2 of the second-stage protection circuit to an overvoltage point VOVP3 of the third-stage protection circuit; the negative electrode of the second zener diode D2 is connected with the lower end of the fifth current limiting resistor R5; the positive electrode of the second zener diode D2 is grounded to GND; the upper end of the fifth current limiting resistor R5 is connected with the CC port.
In the high-voltage dead-resistant battery circuit comprising multi-stage protection, the third-stage protection circuit comprises a third voltage-stabilizing diode group DN, and the voltage protection range is provided that the voltage of the CC port is larger than the overvoltage point VOVP3 of the third-stage protection circuit; the third zener diode group DN comprises N third zener diodes which are connected in reverse series; the positive electrode of the third voltage stabilizing diode group DN is grounded GND; the positive pole of the third zener diode group DN is connected with the CC port.
The invention discloses a high-voltage-resistant dead battery circuit comprising a multi-stage protection, which comprises a dead battery pull-down circuit and a multi-stage protection circuit. When the dead battery pull-down circuit is connected with the battery management system to carry out a handshake protocol, the connection port is ensured to have the voltage specified by the handshake protocol, and the battery is charged by the system in a dead battery state. Through multistage protection circuit, according to the different circumstances of port, utilize each level protection circuit to dead battery pull-down circuit connect battery management system's port's voltage carry out the bleeder current to the dead battery pull-down circuit is protected, and then can effectively improve circuit anti surge and ESD ability, avoid the chip damage. The circuit has simple structure and low production and application cost, and can be widely applied to various electronic products.
Drawings
FIG. 1 is a schematic block diagram of a high voltage dead battery circuit incorporating multi-stage protection according to the present invention;
FIG. 2 is a specific circuit diagram of a dead battery circuit including multi-stage protection that is tolerant to high voltage in accordance with the present invention;
fig. 3 is a schematic diagram of simulation of the CC port voltage variation in fig. 2.
Detailed Description
In order to make the technical contents of the present invention more clearly understood, the following examples are specifically described.
Referring to fig. 1, a schematic block diagram of a high voltage dead battery circuit including multi-stage protection according to the present invention is shown.
In one embodiment, the high voltage dead battery circuit including multi-stage protection includes a dead battery pull-down circuit and a multi-stage protection circuit. The dead battery pull-down circuit is used for ensuring that the connection port has the voltage specified by the handshake protocol when the dead battery pull-down circuit is connected with the battery management system to perform the handshake protocol; the multi-stage protection circuit is connected to the dead battery pull-down circuit and is used for discharging the voltage of the port of the dead battery pull-down circuit connected with the battery management system by utilizing the protection circuit of each stage according to different conditions of the port.
The multi-stage protection circuit comprises a first-stage protection circuit, a second-stage protection circuit and a third-stage protection circuit, and all stages of protection circuits are connected with the dead battery pull-down circuit.
And the dead battery pull-down circuit is connected with the battery management system through the CC port of the Type C adapter.
In a preferred embodiment, as shown in fig. 2, the battery management system provides a sink current and is connected to the CC port; the dead battery pull-down circuit includes: the CC port is respectively connected with the upper ends of the first resistor R1 and the second resistor R2; the lower end of the second resistor R2 is respectively connected with the grid electrode of the first high-voltage NMOS tube N1 and the upper end of the first voltage margin module 4; the lower end of the first voltage margin module 4 is connected with the ground GND; the lower end of the first resistor R1 is connected with the drain electrode of the high-voltage NMOS tube N1; the source electrode of the first high-voltage NMOS tube N1 is connected with the ground GND.
In a more preferred embodiment, the first stage protection circuit is connected with a dead battery state input signal UVLO and a first protection voltage range signal OVP; providing an overvoltage point VOVP1 of the first-stage protection circuit to an overvoltage point VOVP2 of the second-stage protection circuit in a voltage protection range; the dead battery state input signal UVLO is connected with the gates of the fourth high-voltage NMOS tube N4 and the second NMOS tube N2; the drain electrode of the fourth high-voltage NMOS tube N4 is connected with the anode of the first zener diode D1; the source electrode of the fourth high-voltage NMOS tube N4 is respectively connected with the upper end of the fourth resistor R4 and the grid electrode of the fifth NMOS tube N5; the drain electrode of the second NMOS tube N2 is connected with the grid electrode of the first high-voltage NMOS tube N1; the source electrode of the second NMOS tube N2 is respectively connected with the drain electrodes of the fifth NMOS tube N5 and the third NMOS tube N3 and the upper end of the second voltage margin module 5; the source electrode of the fifth NMOS tube N5 is grounded GND; the lower end of the fourth resistor R4 is connected with GND; the negative electrode of the first zener diode D1 is connected with the lower end of the third current limiting resistor R3; the upper end of the third current limiting resistor R3 is connected with the CC port; the lower end of the second voltage margin module 5 is grounded to GND; the grid electrode of the third NMOS tube N3 is connected with the first protection voltage range signal OVP; the source of which is grounded GND.
The second-stage protection circuit comprises a second zener diode D2, and provides voltage protection ranging from an overvoltage point VOVP2 of the second-stage protection circuit to an overvoltage point VOVP3 of the third-stage protection circuit; the negative electrode of the second zener diode D2 is connected with the lower end of the fifth current limiting resistor R5; the positive electrode of the second zener diode D2 is grounded to GND; the upper end of the fifth current limiting resistor R5 is connected with the CC port.
The third-stage protection circuit comprises a third voltage-stabilizing diode group DN, and provides voltage protection range that the CC port voltage is larger than an overvoltage point VOVP3 of the third-stage protection circuit; the third zener diode group DN comprises N third zener diodes which are connected in reverse series; the positive electrode of the third voltage stabilizing diode group DN is grounded GND; the positive pole of the third zener diode group DN is connected with the CC port.
In practical applications, the dead battery circuit of the present invention comprising multi-stage protection can withstand 30V high voltage.
The third stage OVP protection circuit may be formed by 3 reverse series zener diodes (diode), which is equivalent to D3 (DN).
As shown in fig. 2, in the dead battery mode, when the CC signal is not connected to the circuit, the dead battery state input signal UVLO is at a low level, and the fourth and second NMOS transistors N4, N2 are turned off; the battery management System (System) provides a pull-up current for the first resistor R1, and due to the fact that the second NMOS transistor N2 is turned off and the existence of the first voltage margin module 4, the voltage V1 of the node 1 is higher than the threshold voltage of one MOS transistor, the first MOS transistor N1 is turned on, at this time, the battery management System completes the identification connection of the device by judging the voltage value of the voltage V3 of the node 3, judges that the device is in a dead mode, and charges the battery according to the judgment. The second and third stage protection circuits turn off due to the presence of zener diodes.
In the non-dead battery mode, when the CC signal is connected to the circuit and CC is higher than the first protection voltage VOVP1 but lower than the second protection voltage VOVP2, the OVP signal is at a low level, the UVLO signal is at a high level and is not higher than Vgsmax of the MOS transistor, the second NMOS transistor N2 is turned on, the third NMOS transistor N3 is turned off, and the first zener diode D1 is turned off. The gate-source voltage VGS of the NMOS transistor has to be less than Vgsmax because of the state-of-the-art limitation, which is Vgsmax. Due to the presence of the first voltage margin module 4, the node 1 voltage V1 will be higher than one MOS transistor threshold voltage VTH, while being smaller than the Vgsmax. At this time, the first MOS tube N1 is conducted, and the CC line voltage discharges current through the first resistor R1 and the first MOS tube N1; due to the presence of the second voltage margin module 5, the node 2 voltage V2 will remain consistent with the voltage V1; the second current limiting resistor R2 is above 1 megaohm. The current CC flowing to GND through the first voltage margin module 4 and the second voltage margin module 5 will be severely limited in magnitude. The second and third stage protection circuits turn off due to the presence of zener diodes.
In the non-dead battery mode, when the CC signal is connected into the circuit and the CC is higher than the second protection voltage VOVP2 and lower than the third protection voltage VOVP3, the OVP signal is at a low level, the UVLO signal is at a high level, the first zener diode D1 is turned on, the fourth and second NMOS transistors N4 and N2 are turned on, the third NMOS transistor N3 is turned off, and the third resistor R3 is a current limiting resistor with a resistance value of more than 1 megaohm; because the gate signal of the fourth NMOS transistor N4 is UVLO signal and is not higher than Vgsmax of the MOS transistor, the voltage V6 of the node 6 is higher than the threshold voltage VTH of one NMOS transistor and is smaller than Vgsmax, and therefore the fifth MOS transistor N5 can be normally opened and is not damaged. The fourth resistor R4 is used for discharging the gate voltage V6 of the fifth NMOS transistor N5 when the fourth NMOS transistor N4 is turned off; when the fifth NMOS transistor N5 is turned on, the node 2 voltage V2 is pulled low; because the second NMOS tube N2 is also in an on state at this time, the voltage V1 of the node 1 is pulled down, and the first MOS tube N1 is turned off; since the second zener diode D2 in the second-stage protection circuit is the same as the first zener diode D1 in the first-stage protection circuit, and their breakdown voltages are VOP2, the second zener diode D2 is turned on, at this time, the first MOS transistor N1 is turned on, and the fifth resistor R5 is a current limiting resistor; the CC-line voltage bleeds current through the fifth resistor R5 and the second zener diode D2; the third stage protection circuit is turned off due to the existence of the zener diode.
In the non-dead battery mode, when a CC signal is connected into the circuit and CC is higher than a third protection voltage VOP3, the OVP signal is at a low level, the UVLO signal is at a high level, the first zener diode D1 is turned on, the fourth NMOS transistor N4 and the second NMOS transistor N2 are turned on, the third MOS transistor N3 is turned off, and the third resistor R3 is a current limiting resistor with a resistance value of more than 1 megaohm; because the grid signal UVLO signal of the fourth NMOS tube N4 is not higher than the Vgsmax of the MOS tube, the voltage V6 of the node 6 is higher than the threshold voltage VTH of one NMOS tube and smaller than the Vgsmax, the fifth MOS tube N5 can be normally opened and is not damaged, and the fourth resistor R4 has the function of discharging the grid voltage V6 of the fifth MOS tube N5 when the fourth NMOS tube N4 is turned off; when the five MOS transistor N5 is turned on, the voltage V2 of the node 2 is pulled down; because the second NMOS tube N2 is also in the on state at this time, the voltage V1 of the node 1 is pulled down, and the first NMOS tube N1 is turned off; since the second zener diode D2 in the second-stage protection circuit is the same as the first zener diode D1 in the first-stage protection circuit, their breakdown voltages are VOVP2 < VOVP3, and the breakdown voltage of the third-stage protection circuit is VOVP3, the second zener diode D2 is turned on, and the third zener diode D3 is turned on; at this time, the first NMOS transistor N1 is turned on, and the fifth resistor R5 is a current limiting resistor; one path of the CC line voltage discharges current through the fifth resistor R5 and the second zener diode D2, and the other path discharges current through the third-stage equivalent zener diode D3, so that the breakdown condition of the equivalent diode with the characteristic of the discharge current is rapidly increased, and the effect of protecting a port is achieved.
The CC port voltage change process in the above process is shown in fig. 3.
In addition, in fig. 2, the sum of the resistance of the first resistor R1 and the resistance of the first MOS transistor N1 meets the specification of the resistance of the Type C port Rd, the first NMOS transistor N1 and the fourth NMOS transistor N4 are high-voltage MOS transistors, and the second, third and fifth MOS transistors N2, N3 and N5 are low-voltage MOS transistors. The voltage margin modules 4 and 5 include, but are not limited to, diodes, diode-connected BJTs or MOS transistors, etc. that can provide a voltage margin.
The invention discloses a high-voltage-resistant dead battery circuit comprising a multi-stage protection, which comprises a dead battery pull-down circuit and a multi-stage protection circuit. When the dead battery pull-down circuit is connected with the battery management system to carry out a handshake protocol, the connection port is ensured to have the voltage specified by the handshake protocol, and the battery is charged by the system in a dead battery state. Through multistage protection circuit, according to the different circumstances of port, utilize each level protection circuit to dead battery pull-down circuit connect battery management system's port's voltage carry out the bleeder current to the dead battery pull-down circuit is protected, and then can effectively improve circuit anti surge and ESD ability, avoid the chip damage.
Specifically, the overvoltage point of the first-stage protection circuit is VOVP1, the overvoltage point of the second-stage protection circuit is VOVP2, and the overvoltage point of the third-stage protection circuit is VOVP3.
The first-stage protection circuit can provide a CC port voltage interval in VOVP 1-VOVP 2, and CC discharges current through a passage formed by a first resistor R1 of the dead battery working circuit and a first high-voltage NMOS tube N1.
The second-stage protection circuit aims to provide a second-stage protection circuit which is formed by a fifth resistor R5 and a second zener diode D2 to discharge current when the voltage of the CC port is in the range of VOVP 2-VOVP 3.
When the voltage of the CC port is larger than VOVP3, the third-stage protection circuit can provide rapid current discharge of CC through breakdown of a cascade voltage stabilizing diode (equivalent diode DN), and damage of ESD and higher surge voltage to a chip can be avoided.
The circuit has simple structure and low production and application cost, and can be widely applied to various electronic products.
In this specification, the invention has been described with reference to specific embodiments thereof. It will be apparent, however, that various modifications and changes may be made without departing from the spirit and scope of the invention. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense.
Claims (3)
1. A high voltage dead battery circuit comprising a multi-stage protection, comprising:
the dead battery pull-down circuit is used for ensuring that the connection port has the voltage specified by the handshake protocol when the dead battery pull-down circuit is connected with the battery management system to perform the handshake protocol;
the multi-stage protection circuit comprises a first-stage protection circuit, a second-stage protection circuit and a third-stage protection circuit, wherein the protection circuits of all stages are connected to the dead battery pull-down circuit, and the protection circuits of all stages are used for discharging the voltage of the port, connected with the battery management system, of the dead battery pull-down circuit according to different conditions of the port;
the dead battery pull-down circuit is connected with the battery management system through a CC port of the Type C adapter;
the battery management system provides current filling and is connected with the CC port;
the dead battery pull-down circuit includes:
the CC port is respectively connected with the upper ends of the first resistor (R1) and the second resistor (R2);
the lower end of the second resistor (R2) is respectively connected with the grid electrode of the first high-voltage NMOS tube (N1) and the upper end of the first voltage margin module (4);
the lower end of the first voltage margin module (4) is connected with the Ground (GND);
the lower end of the first resistor (R1) is connected with the drain electrode of the high-voltage NMOS tube (N1);
the source electrode of the first high-voltage NMOS tube (N1) is connected with the Ground (GND);
the first-stage protection circuit is connected with a dead battery state input signal (UVLO) and a first protection voltage range signal (OVP); providing an overvoltage point (VOVP 1) of the first-stage protection circuit to an overvoltage point (VOVP 2) of the second-stage protection circuit in a voltage protection range;
the dead battery state input signal (UVLO) is connected with the grid electrodes of the fourth high-voltage NMOS tube (N4) and the second NMOS tube (N2);
the drain electrode of the fourth high-voltage NMOS tube (N4) is connected with the anode of the first zener diode (D1); the source electrode of the fourth high-voltage NMOS tube (N4) is respectively connected with the upper end of the fourth resistor (R4) and the grid electrode of the fifth NMOS tube (N5);
the drain electrode of the second NMOS tube (N2) is connected with the grid electrode of the first high-voltage NMOS tube (N1); the source electrode of the second NMOS tube (N2) is respectively connected with the drain electrodes of the fifth NMOS tube (N5) and the third NMOS tube (N3) and the upper end of the second voltage margin module (5);
the source electrode of the fifth NMOS tube (N5) is Grounded (GND);
the lower end of the fourth resistor (R4) is connected with GND;
the negative electrode of the first zener diode (D1) is connected with the lower end of the third current limiting resistor (R3);
the upper end of the third current limiting resistor (R3) is connected with the CC port;
the lower end of the second voltage margin module (5) is Grounded (GND);
the grid electrode of the third NMOS tube (N3) is connected with the first protection voltage range signal (OVP); its source is Grounded (GND).
2. The high voltage dead battery circuit of claim 1 wherein the battery circuit comprises a multi-stage protection,
the second-stage protection circuit comprises a second zener diode (D2) for providing voltage protection ranging from an overvoltage point (VOVP 2) of the second-stage protection circuit to an overvoltage point (VOVP 3) of the third-stage protection circuit; the negative electrode of the second zener diode (D2) is connected with the lower end of the fifth current limiting resistor (R5); the positive electrode of the second zener diode (D2) is Grounded (GND);
the upper end of the fifth current limiting resistor (R5) is connected with the CC port.
3. The high voltage dead battery circuit of claim 2 wherein the battery circuit comprises a multi-stage protection,
the third-stage protection circuit comprises a third voltage stabilizing diode group (DN) and provides voltage protection range that the CC port voltage is larger than the overvoltage point (VOVP 3) of the third-stage protection circuit; the third zener diode group (DN) comprises N third zener diodes which are connected in reverse series; the positive electrode of the third voltage stabilizing diode group (DN) is Grounded (GND); the positive pole of the third voltage stabilizing diode group (DN) is connected with the CC port.
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| CN202310687670.4A CN117013638B (en) | 2023-06-12 | 2023-06-12 | High-voltage-dead-resistant battery circuit comprising multistage protection |
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| CN202310687670.4A CN117013638B (en) | 2023-06-12 | 2023-06-12 | High-voltage-dead-resistant battery circuit comprising multistage protection |
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| CN117013638B true CN117013638B (en) | 2024-02-06 |
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| CN109155630A (en) * | 2016-05-26 | 2019-01-04 | 高通股份有限公司 | Overvoltage protection system and method |
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| US9306389B2 (en) * | 2012-02-07 | 2016-04-05 | Mediatek Inc. | ESD protection circuit |
| US10001799B2 (en) * | 2014-03-24 | 2018-06-19 | Nokia Technologies Oy | Pull-down circuitry for an apparatus |
| CN105305565B (en) * | 2015-11-26 | 2018-02-23 | 英特格灵芯片(天津)有限公司 | A kind of charge protection and identification circuit and charging equipment |
| US10855069B2 (en) * | 2018-04-17 | 2020-12-01 | Texas Instruments Incorporated | USB type-C/PD controller having integrated VBUS to CC short protection |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109155630A (en) * | 2016-05-26 | 2019-01-04 | 高通股份有限公司 | Overvoltage protection system and method |
| CN107658928A (en) * | 2017-09-28 | 2018-02-02 | 芯海科技（深圳）股份有限公司 | A kind of dead battery for USB TYPE C interface pulls down module |
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