CN203277382U - Electrostatic protection circuit and battery protection circuit thereof - Google Patents
Electrostatic protection circuit and battery protection circuit thereof Download PDFInfo
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- CN203277382U CN203277382U CN 201320156659 CN201320156659U CN203277382U CN 203277382 U CN203277382 U CN 203277382U CN 201320156659 CN201320156659 CN 201320156659 CN 201320156659 U CN201320156659 U CN 201320156659U CN 203277382 U CN203277382 U CN 203277382U
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Abstract
The utility model provides an electrostatic protection circuit and a battery protection circuit thereof. The electrostatic protection circuit comprises an electrostatic protection device connected between a first connecting end and a second connecting end. The electrostatic protection device comprises a P-type substrate; a N trap is formed by extending downwardly from an upper surface of the P-type substrate to an inside of the P-type substrate; a gate oxide layer is formed on the P-type substrate and the N trap; a grid is formed on the gate oxide layer; a first P+ active region and a first N+ active region are formed by extending downwardly from an upper surface of the P-type substrate to the inside of the P-type substrate; a second P+ active region and a second N+ active region are formed by extending downwardly from an upper surface of the N trap to an inside of the N trap; the first P+ active region, the first N+ active region, and the grid are connected with the second connecting end; and the second P+ active region and the second N+ active region are connected with the first connecting end. The electrostatic protection device is high-voltage-resistant, and has an excellent capability in the electrostatic discharge.
Description
[technical field]
The utility model relates to circuit design field, particularly the resistance of a kind of electrostatic discharge protective circuit and integrated battery core (Bat) thereof end and the battery protecting circuit of electric capacity (RC).
[background technology]
Battery protection chip (circuit) is installed in battery usually, for example, at mobile phone cell inner, a very little printed circuit board (PCB) (Printed Circuit Board) is arranged, and battery protection chip just is arranged on this printed circuit board (PCB).Battery protection chip provides the control that discharges and recharges to battery together with other auxiliary element.Relatively more commonly used is lithium ion battery and lithium polymer battery.The basic function of battery protection chip comprises overvoltage charge protection, overvoltage discharge prevention, discharge overcurrent protection, charging overcurrent protection and short-circuit protection.
Please refer to shown in Figure 1ly, it is the circuit diagram of battery protection system in prior art.Described battery protection system comprises battery core Bat, resistance R 1, capacitor C 1, battery protecting circuit 110, resistance R 2, discharge power switch 120 and charge power switch 130.The positive pole of described battery core Bat directly is connected with the first power end VP, and discharge power switch 120 and charge power switch 130 are series between the negative pole G and second source end VM of battery core Bat, and resistance R 1 and capacitor C 1 are series between the positive pole and negative pole G of battery core Bat.When load resistance R0 was connected between the first power end VP and second source end VM, described battery core Bat was in discharge condition; When battery charger 140 just had been connected between the first power end VP and second source end VM, described battery core Bat was in charged state.
Described discharge power switch 120 comprises NMOS (N-channel Metal Oxide Semiconductor) field effect transistor M N1 and parasitizes the interior diode D1 of its body.Described charge power switch 130 comprises nmos fet MN2 and parasitizes the interior diode D2 of its body.The drain electrode of nmos pass transistor MN1 is connected with the drain electrode of nmos pass transistor MN2, and the source electrode of nmos pass transistor MN1 is connected with the negative pole G of battery core Bat, and the source electrode of nmos pass transistor MN2 is connected with second source end VM.
Described battery protecting circuit 110 comprises three links (or being called the test side) and two control ends; three links are respectively battery core Bat anode connection terminal (or claiming power end) VDD; battery core Bat negative pole G link (or claiming earth terminal) VSS and second source end VM link VMI, two control ends are respectively charging control end CO and control of discharge end DO.Wherein, link VDD is connected between resistance R 1 and capacitor C 1, link VSS is connected with the negative pole G of battery core Bat, link VMI is connected in second source end VM by resistance R 2, charging control end CO is connected with the control end (being the grid of nmos pass transistor MN2) of charge power switch 130, and control of discharge end DO1 is connected with the control end (being the grid of nmos pass transistor MN1) of discharge power switch 120.
Described battery protecting circuit 110 can carry out charge protection and discharge prevention to battery core Bat.When normal condition, described battery protecting circuit 110 is controlled nmos pass transistor MN1, MN2 conducting simultaneously, both chargeablely also can discharge.When charging abnormal (such as charging overcurrent and charging overvoltage), described battery protecting circuit 110 is controlled nmos pass transistor MN2 cut-off, thereby has cut off charging process, but still can discharge.When discharge abnormal (such as discharge overcurrent and discharge overvoltage), described battery protecting circuit 110 is controlled nmos pass transistor MN1 cut-off, thereby has cut off discharge process, but still can charge.
In the present embodiment, described battery protecting circuit 110 comprises the testing circuit 112 that overcharges, overdischarge testing circuit 114, discharge over-current detection circuit 116, charging over-current detection circuit (not indicating) and control circuit 118.Described overvoltage charging detecting circuit 112, overvoltage discharge detection circuit 114, discharge over-current detection circuit 116 and charging over-current detection circuit can be collectively referred to as threshold detection circuit.The detection signal that described control circuit 118 provides according to the described testing circuit 112 that overcharges, overdischarge testing circuit 114, discharge over-current detection circuit 116 and charging over-current detection circuit generates charging control signal and by charging control end CO output, generates discharge control signal and export by control of discharge end DO.
Because electrostatic defending is extremely important concerning integrated circuit, therefore, all can pay special attention to the design of ESD protection circuit when present integrated circuit (IC) design and manufacturing.Usually, the battery protecting circuit 110 in Fig. 1 is chip pieces, also needs to arrange electrostatic discharge protective circuit (ESD device) between its each link.Battery protecting circuit 110 in Fig. 1 also comprises the conventional electrostatic protective circuit 150 that is arranged between power end VDD and earth terminal VSS.
Fig. 1 is the circuit diagram of a kind of battery protection system of the prior art.Need to install capacitor C 1 and resistance R 1 on its printed circuit board (PCB).Chinese patent (application number: announced a kind of resistance of integrated battery core end and the battery protecting apparatus of electric capacity 201110411181.3); do not need to install battery core end capacitor C 1 and resistance R 1 on its printed circuit board (PCB); thereby this patent has solved the problem that causes the too low battery protection chip of chip power voltage to be made mistakes when short circuit appears in battery; its principle is to be the battery protection chip power supply by the internal capacitance stored charge, avoids control circuit abnormal.In Fig. 1 and application number are 201110411181.3 battery protecting apparatus, generally all can connect battery core and battery protection chip by wire, VDD-to-VSS needs respectively wire to connect.When battery core is long to the connection wire of battery protection chip, can produce larger stray inductance.
As shown in Figure 1; the stray inductance that inductance L 1 produces for the wire of the power end VDD of the Anode and battery protective circuit 110 that connects battery core Bat, the stray inductance that inductance L 2 produces for the wire of the earth terminal VSS of the negative pole that connects battery core Bat and battery protecting circuit 110.When battery is short-circuited; after battery protecting circuit 110 detects short trouble, can turn-off discharge path (by the DO node is set to low level), stray inductance can produce inverse electromotive force VF=L.di/dt; wherein di/dt is the discharging current descending slope, and L is the inductance value of stray inductance.Stray inductance is larger, and inverse electromotive force is larger; The discharging current decrease speed is faster, and namely discharge path is turned off sooner, and inverse electromotive force is larger.Inductive effect causes the tie point between node VL1(inductance L 1 and resistance R 1) and node VL(inductance L 2 and earth terminal VSS between tie point) between voltage instantaneous can raise, peak value equals VB+L1.di/dt+L2.di/dt, wherein VB is the voltage of battery core Bat, L1 is the inductance value of stray inductance L1, L2 is the inductance value of stray inductance L2, and di/dt is the discharging current descending slope.For general lithium battery, the highest battery core voltage is no more than 4.3V, and for the less situation of stray inductance, the power end VDD of battery protecting circuit 110 and the withstand voltage 10V between earth terminal VSS are enough to.But for the larger situation of stray inductance, in the reality test, the voltage difference of node VL1 and node VL2 can be up to 15V.For battery protection system shown in Figure 1, because the filter circuit of resistance R 1 and capacitor C 1 formation can be put down the peak voltage filter of moment, therefore, be no more than 8V through the power end VDD after resistance R 1 and capacitor C 1 and the voltage difference between earth terminal VSS.Battery protecting circuit 110 adopts the 5V devices can bear withstand voltage between power end VDD and earth terminal VSS.But for the design of the battery protecting circuit of integrated R1 and C1 (as, application number: 201110411181.3 Chinese patent), the power end VDD of its battery protecting circuit can be exposed under the instantaneous pressure of 15V, battery protecting circuit may breakdown damage; Simultaneously, the traditional E SD device that the high pressure of power end VDD arranges on may the premature breakdown battery protecting circuit, thus cause inappropriate static to discharge.
Therefore, be necessary to provide a kind of improved technical scheme to overcome the problems referred to above.
[utility model content]
The battery protecting circuit that the purpose of this utility model is to provide a kind of electrostatic discharge protective circuit and uses this electrostatic discharge protective circuit, it not only can improve the withstand voltage of battery protecting circuit, and can avoid inappropriate static to discharge.
in order to address the above problem, according to an aspect of the present utility model, the utility model provides a kind of electrostatic discharge protective circuit of integrated circuit, described integrated circuit has the first link and the second link, described electrostatic discharge protective circuit comprises the electrostatic protection device that is connected between the first link and the second link, this electrostatic protection device comprises P type substrate, extend downward N trap in P type substrate along the upper surface of described P type substrate, be positioned at the grid oxide layer on described P type substrate and described N trap, be positioned at the grid on described grid oxide layer, extend downward a P+ active area and a N+ active area in P type substrate along the upper surface of described P type substrate, extend downward the 2nd P+ active area and the 2nd N+ active area in the N trap along the upper surface of described N trap, wherein, a described P+ active area and a N+ active area space, an and described grid oxide layer of N+ active area next-door neighbour, described the 2nd P+ active area and the 2nd N+ active area space, and described the 2nd P+ active area than the 2nd N+ active area more near described grid oxide layer, the N-type doping content of N+ active area is high than the N-type doping content of N trap, the one P+ active area, the one N+ active area is connected with the second link with grid, the 2nd P+ active area is connected with the first link with the 2nd N+ active area.
As an embodiment of the present utility model, described electrostatic discharge protective circuit also comprises the first resistance that is connected in grid and the first link.
As an embodiment of the present utility model, described electrostatic protection device comprises parasitic NPN type bipolar transistor and parasitic positive-negative-positive bipolar transistor, and described parasitic NPN type bipolar transistor comprises a N+ active area, P type substrate and N trap; Described parasitic positive-negative-positive bipolar transistor comprises the 2nd P+ active area, N trap and P type substrate.
according to another aspect of the present utility model, the utility model provides a kind of electrostatic discharge protective circuit of integrated circuit, described integrated circuit has the first link and the second link, described electrostatic discharge protective circuit comprises the electrostatic protection device that is connected between the first link and the second link, this electrostatic protection device comprises P type substrate, extend downward N trap in P type substrate along the upper surface of described P type substrate, along described P type substrate upper surface extend downward a P+ active area and a N+ active area in P type substrate, extend downward the 2nd P+ active area and the 2nd N+ active area in the N trap along the upper surface of described N trap, wherein, a described P+ active area and a N+ active area space, described the 2nd P+ active area and the 2nd N+ active area space, and more described the 2nd N+ active area of described the 2nd P+ active area is nearer apart from a described N+ active area, the N-type doping content of N+ active area is high than the N-type doping content of N trap, wherein, be connected with the second link with a N+ active area by a P+ active area, the 2nd P+ active area is connected with the first link with the 2nd N+ active area.
As an embodiment of the present utility model, described N trap is for consisting of the lining body level of 5V standard P MOS.
According to another aspect of the present utility model; the utility model provides a kind of battery protecting circuit; it comprises the battery battery core negative pole link VSS that is connected with the battery battery core negative pole and the power end VDD that is connected with the battery battery core positive pole; described battery protecting circuit also comprises the electrostatic discharge protective circuit that is connected between battery battery core negative pole link VSS and power end VDD; wherein power end VDD is the first link, and battery battery core negative pole link VSS is the second link.described electrostatic discharge protective circuit comprises the electrostatic protection device that is connected between the first link and the second link, described electrostatic protection device comprises P type substrate, extend downward N trap in P type substrate along the upper surface of described P type substrate, be positioned at the grid oxide layer on described P type substrate and described N trap, be positioned at the grid on described grid oxide layer, extend downward a P+ active area and a N+ active area in P type substrate along the upper surface of described P type substrate, extend downward the 2nd P+ active area and the 2nd N+ active area in the N trap along the upper surface of described N trap, wherein, a described P+ active area and a N+ active area space, an and described grid oxide layer of N+ active area next-door neighbour, described the 2nd P+ active area and the 2nd N+ active area space, and described the 2nd P+ active area than the 2nd N+ active area more near described grid oxide layer, the N-type doping content of N+ active area is high than the N-type doping content of N trap, the one P+ active area, the one N+ active area is connected with the second link with grid, the 2nd P+ active area is connected with the first link with the 2nd N+ active area.
As an embodiment of the present utility model; described battery protecting circuit comprises internal circuit and is arranged at pressure limiting circuit between power end VDD and internal circuit; described internal circuit is used for the charging and discharging state of battery battery core is detected; and by charging control end output charging control signal; by control of discharge end output discharge control signal, described pressure limiting circuit is used for limiting the operating voltage of described internal circuit less than or equal to a voltage threshold.
As an embodiment of the present utility model, the voltage limiting outputting terminal of described pressure limiting circuit is connected in power end VDD by the second resistance, and the voltage limiting outputting terminal of described pressure limiting circuit provides power supply to internal circuit.
As an embodiment of the present utility model, described pressure limiting circuit comprises nmos pass transistor, and the drain electrode of this nmos pass transistor is as described voltage limiting outputting terminal VLIM, and source electrode, grid are connected and ground connection.
As an embodiment of the present utility model, described pressure limiting circuit comprises nmos pass transistor and operational amplifier, and the drain electrode of described nmos pass transistor is as described voltage limiting outputting terminal VLIM, source ground; The positive input of the large device of described computing is connected with the drain electrode of described nmos pass transistor, its negative input input reference voltage, and its output is connected with the grid of described nmos pass transistor.
Compared with prior art, the battery protecting circuit in the utility model is by carrying out pressure limiting to its internal circuit, thereby improves the withstand voltage of self; Be arranged at the withstand voltage of electrostatic discharge protective circuit on this battery protecting circuit by raising, thereby avoid inappropriate static to discharge, and then overcome in application the larger ordeal that brings of stray inductance due to the battery protecting circuit outside.
[description of drawings]
In order to be illustrated more clearly in the technical scheme of the utility model embodiment, during the below will describe embodiment, the accompanying drawing of required use is done to introduce simply, apparently, accompanying drawing in the following describes is only embodiment more of the present utility model, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.Wherein:
Fig. 1 is the circuit diagram of a kind of battery protection system of the prior art;
Fig. 2 is the structural representation of traditional 5V device;
Fig. 3 is the structural representation of the electrostatic discharge protective circuit in an embodiment of the present utility model;
Fig. 4 is the structural representation of the electrostatic discharge protective circuit in another embodiment of the present utility model;
Fig. 5 is the structural representation of the electrostatic discharge protective circuit in another embodiment of the present utility model;
Fig. 6 is the circuit diagram of the battery protection system in an embodiment of the present utility model;
Fig. 7 is the pressure limiting circuit circuit diagram in one embodiment in Fig. 6; With
Fig. 8 is the pressure limiting circuit circuit diagram in another embodiment in Fig. 6.
[embodiment]
For above-mentioned purpose of the present utility model, feature and advantage can be become apparent more, below in conjunction with the drawings and specific embodiments, the utility model is described in further detail.
Alleged " embodiment " or " embodiment " refer to be contained in special characteristic, structure or the characteristic at least one implementation of the utility model herein.Different local in this manual " in one embodiment " that occur not are all to refer to same embodiment, neither be independent or the embodiment mutually exclusive with other embodiment optionally.Unless stated otherwise, herein connection, the word that the expression that is connected, joins is electrically connected all represents directly or indirectly to be electrical connected.
The battery protecting circuit of integrated RC in the utility model is by carrying out pressure limiting to its internal circuit, thereby improves the withstand voltage of self; Be arranged at the withstand voltage of electrostatic discharge protective circuit on the battery protecting circuit of this integrated RC by raising; thereby avoid inappropriate static to discharge, and then overcome in application the larger ordeal that brings of stray inductance due to the battery protecting circuit outside of integrated RC.
Please refer to shown in Figure 2ly, it is the structural representation of traditional 5V device, and it can be used as ESD device (being electrostatic discharge protective circuit).This 5V device comprises P type substrate (P-Sub); Extend downward a N+ active area and the 2nd N+ active area in P type substrate along the upper surface of described P type substrate, a described N+ active area and the 2nd N+ active area space; Be positioned on described P type substrate and be close to the grid oxide layer of a described N+ active area and the 2nd N+ active area; Be positioned at the grid on described grid oxide layer; Extend downward a P+ active area in P type substrate along the upper surface of described P type substrate, a described P+ active area and a described N+ active area space, wherein said N+ represents N-type heavy doping, described P+ represents the heavy doping of P type.
Please refer to shown in Figure 3ly, it is the structural representation of the electrostatic discharge protective circuit in an embodiment of the present utility model.This electrostatic discharge protective circuit has utilized the level of 5V device as shown in Figure 2, need not to increase process complexity, but has higher withstand voltage than traditional 5V device.Electrostatic discharge protective circuit as shown in Figure 3 comprises P type substrate (P-Sub); Extend downward N trap (NWELL) in P type substrate along the upper surface of described P type substrate; Be positioned at the grid oxide layer 32 on described P type substrate and described N trap; Be positioned at the grid 34 on described grid oxide layer 32; Extend downward a P+ active area and a N+ active area in P type substrate along the upper surface of described P type substrate, a described P+ active area and a N+ active area space, and the described grid oxide layer of N+ active area next-door neighbour; Extend downward the 2nd P+ active area and the 2nd N+ active area in the N trap along the upper surface of described N trap, described the 2nd P+ active area and the 2nd N+ active area space, and described the 2nd P+ active area is than the more close described grid oxide layer 32 of the 2nd N+ active area, and the N-type doping content of N+ active area is high than the N-type doping content of N trap.Wherein, consisted of the source electrode of this electrostatic discharge protective circuit by a P+ active area, a N+ active area, this source electrode and grid can by contact hole and metal be connected to integrated RC battery protecting circuit (as, application number: 201110411181.3 Chinese patent or the battery protecting circuit shown in Fig. 6 210, the description of relevant battery protecting circuit 210 will be explained in greater detail below) earth terminal VSS; Consisted of the drain electrode of this electrostatic discharge protective circuit by N trap, the 2nd P+ active area and the 2nd N+ active area; this drain electrode can be connected to the battery protecting circuit of integrated RC (as, application number: power end VDD 201110411181.3 Chinese patent) by contact hole and metal.
Can find out, the difference of Fig. 3 and Fig. 2 is, has increased the N trap with P type substrate and the 2nd N+ active area isolation, and has increased the 2nd P+ active area with the 2nd N+ active area space in the N trap.The withstand voltage P-N knot that is formed by the 2nd N+ active area and P type substrate of the 5V device in Fig. 2 determines; The withstand voltage P-N knot that is formed by N trap and P type substrate of the electrostatic discharge protective circuit in Fig. 3 determines.Because the N-type doping content of N trap is low than the N-type doping content of the 2nd N+ active area, therefore, the electrostatic discharge protective circuit in Fig. 3 is withstand voltage higher than the 5V device in Fig. 2.Through appropriate design, electrostatic discharge protective circuit shown in Figure 3 can reach the withstand voltage of 15V.Need to prove, N trap in Fig. 3 can be for consisting of the lining body level of 5V PMOS, because custom integrated circuit technique adopts P type substrate more, building PMOS generally needs first first to form the N trap on P type substrate, this N trap is used to form the lining body of PMOS, therefore, the N trap in the utility model can be used the lining body level of 5V PMOS, forms this structure and need not extra additional level.
the operation principle of electrostatic discharge protective circuit shown in Figure 3 is based on latch-up (Latch-up Effect), when static occurs when, the relative node VSS of node VDD produces very high electrostatic potential, the P-N reverse breakdown that causes N trap and P-Sub to consist of, a reverse breakdown current part that produces flows to node VSS through the P-N knot (being made of P-Sub and a N+ active area) of forward conduction, when this part electric current acquires a certain degree, can activate the i.e. N+ active area of the upper N+(of P-Sub), P-Sub, parasitic NPN type bipolar transistor with N trap formation, further produce and flow to the electric current of node VSS from node VDD through the N trap, this moment, one part of current flowed into P-Sub by node VDD through P+ zone (i.e. the 2nd P+ active area) and N trap in the N trap, can further activate P+ in the N trap like this, the parasitic positive-negative-positive bipolar transistor that N trap and P-Sub consist of.Parasitic NPN tube current can promote larger PNP tube current, and parasitic PNP tube current can promote larger NPN tube current, and electric current just is exaggerated like this, until all electrostatic charges of having released.As seen, electrostatic discharge protective circuit shown in Figure 3 has guaranteed its discharge performance in withstand voltage improving it.
Please refer to shown in Figure 4; the structural representation of the electrostatic discharge protective circuit in its another embodiment of the present utility model; compare with Fig. 3, the electrostatic discharge protective circuit in Fig. 4 also comprises the resistance R 3 that is serially connected with between grid and node VSS, and this resistance R 3 can be polysilicon resistance or N trap resistance.Compare with Fig. 3, the trigger voltage the when electrostatic discharge protective circuit in Fig. 4 is conducive to reduce static discharge improves electrostatic protective performance.
Please refer to shown in Figure 5ly, it is the structural representation of the electrostatic discharge protective circuit in another embodiment of the present utility model.Electrostatic discharge protective circuit as shown in Figure 5 comprises P type substrate (P-Sub); Along described P type substrate upper surface extend downward N trap (NWELL) in P type substrate; Extend downward a P+ active area and a N+ active area in P type substrate along the upper surface of described P type substrate, a described P+ active area and a N+ active area space; Extend downward the 2nd P+ active area and the 2nd N+ active area in the N trap along the upper surface of described N trap, described the 2nd P+ active area and the 2nd N+ active area space, and described the 2nd P+ active area is than the more close described N+ active area of the 2nd N+ active area, and the N-type doping content of N+ active area is high than the N-type doping content of N trap.Wherein, consisted of the source electrode of this electrostatic discharge protective circuit by a P+ active area, a N+ active area, this source electrode can be connected to the battery protecting circuit of integrated RC (as, application number: earth terminal VSS 201110411181.3 Chinese patent) by contact hole and metal; Consisted of the drain electrode of this electrostatic discharge protective circuit by N trap, the 2nd P+ active area and the 2nd N+ active area; this drain electrode can be connected to the battery protecting circuit of integrated RC (as, application number: power end VDD 201110411181.3 Chinese patent) by contact hole and metal.Compare with Fig. 3, the electrostatic discharge protective circuit in Fig. 5 has been removed grid and grid oxide layer.So the reason of design is, the trigger voltage of the electrostatic discharge protective circuit in Fig. 3 is not only relevant with grid, and is also relevant with the doping content of N trap and P-Sub, when trigger voltage is suitable, can not need grid.
In sum; electrostatic discharge protective circuit in the utility model is by increasing the N trap of P type substrate and the 2nd N+ active area isolation in traditional 5V device shown in Figure 2 and increased by the 2nd P+ active area in the N trap; need not to increase process complexity; but have higher withstand voltagely than traditional 5V device, also kept electrostatic leakage performance preferably simultaneously.
Ordinary skill people in affiliated field can be understood that; electrostatic discharge protective circuit in Fig. 3, Fig. 4 and Fig. 5 can also be used for high withstand voltage other integrated circuits or chip and carry out electrostatic protection, and it can be connected between any two pins or link of chip.
Except the change of electrostatic protection device, the battery protecting circuit in the utility model hereinafter will be described in detail in order to improve withstand voltage other improvement of also having carried out.
Please refer to shown in Figure 6ly, it is the circuit diagram of the battery protection system in an embodiment of the present utility model.Described battery protection system comprises battery core Bat, battery protecting circuit 210, resistance R 2, discharge power switch 120 and charge power switch 130.The positive pole of described battery core Bat directly is connected with the first power end VP, and discharge power switch 120 and charge power switch 130 are series between the negative pole G and second source end VM of battery core Bat.When load resistance R0 was connected between the first power end VP and second source end VM, described battery core Bat was in discharge condition; When battery charger 140 just had been connected between the first power end VP and second source end VM, described battery core Bat was in charged state.
Described discharge power switch 120 comprises NMOS (N-channel Metal Oxide Semiconductor) field effect transistor M N1 and parasitizes the interior diode D1 of its body.Described charge power switch 130 comprises nmos fet MN2 and parasitizes the interior diode D2 of its body.The drain electrode of nmos pass transistor MN1 is connected with the drain electrode of nmos pass transistor MN2, and the source electrode of nmos pass transistor MN1 is connected with the negative pole G of battery core Bat, and the source electrode of nmos pass transistor MN2 is connected with second source end VM.
Described battery protecting circuit 210 comprises three links (or being called the test side) and two control ends; three links are respectively battery core Bat anode connection terminal (or claiming power end) VDD; battery core Bat negative pole G link (or claiming earth terminal) VSS and second source end VM link VMI, two control ends are respectively charging control end CO and control of discharge end DO.Wherein, link VDD is connected with the positive pole of battery core Bat, link VSS is connected with the negative pole G of battery core Bat, link VMI is connected in second source end VM by resistance R 2, charging control end CO is connected with the control end (being the grid of nmos pass transistor MN2) of charge power switch 130, and control of discharge end DO1 is connected with the control end (being the grid of nmos pass transistor MN1) of discharge power switch 120.The stray inductance that inductance L 1 produces for the wire of the power end VDD of the Anode and battery protective circuit 210 that connects battery core Bat, the stray inductance that inductance L 2 produces for the wire of the earth terminal VSS of the negative pole that connects battery core Bat and battery protecting circuit 210.
Described battery protecting circuit 210 can carry out charge protection and discharge prevention to battery core Bat.When normal condition, described battery protecting circuit 210 is controlled nmos pass transistor MN1, MN2 conducting simultaneously, both chargeablely also can discharge.When charging abnormal (such as charging overcurrent and charging overvoltage), described battery protecting circuit 210 is controlled nmos pass transistor MN2 cut-off, thereby has cut off charging process, but still can discharge.When discharge abnormal (such as discharge overcurrent and discharge overvoltage), described battery protecting circuit 210 is controlled nmos pass transistor MN1 cut-off, thereby has cut off discharge process, but still can charge.
In the present embodiment, described battery protecting circuit 210 comprises the testing circuit 112 that overcharges, overdischarge testing circuit 114, discharge over-current detection circuit 116, charging over-current detection circuit (not indicating) and control circuit 118.The detection signal that described control circuit 118 provides according to the described testing circuit 112 that overcharges, overdischarge testing circuit 114, discharge over-current detection circuit 116 and charging over-current detection circuit generates charging control signal and by charging control end CO output, generates discharge control signal and export by control of discharge end DO.Described charging detecting circuit 112, overdischarge testing circuit 114, discharge over-current detection circuit 116, charging over-current detection circuit (not indicating) and control circuit 118 can be referred to as internal circuit.That is to say, described internal circuit is used for the charging and discharging state of battery battery core is detected, and by described charging control end CO output charging control signal, by described control of discharge end DO output discharge control signal.
Due to resistance R 1 and capacitor C 1 not being set between the battery core Bat positive and negative electrode in Fig. 6; battery protecting circuit 210 is when carrying out short-circuit protection to battery core Bat; power end VDD and the voltage difference between earth terminal VSS of battery protecting circuit 210 may be up to 15V, and battery protecting circuit 210 may breakdown damage.Therefore; in Fig. 6, battery protecting circuit 210 also comprises the novel electrostatic protective circuit 220 that is arranged between its link VDD and link VSS; described novel electrostatic protective circuit 220 can be any one in Fig. 3, Fig. 4 and Fig. 5 electrostatic discharge protective circuit, thereby avoids inappropriate static to discharge.
For power end VDD and the instant high-voltage between earth terminal VSS of tackling battery protecting circuit 210 poor; battery protecting circuit 210 in Fig. 6 also comprises the pressure limiting circuit 230 that is arranged between link VDD and internal circuit; described pressure limiting circuit 230 is less than or equal to a voltage threshold for the operating voltage of the internal circuit that limits described battery protecting circuit, thereby improves the withstand voltage of described battery protecting circuit 210.
In the embodiment shown in fig. 6, the voltage limiting outputting terminal VLIM of described pressure limiting circuit is connected in power end VDD by resistance R 4, and the voltage limiting outputting terminal of described pressure limiting circuit provides restricted supply voltage to internal circuit.In other words, offer described internal circuit after the voltage process restriction of described pressure limiting circuit 230 that described power end VDD provides.
Please refer to shown in Figure 7ly, it is the pressure limiting circuit circuit diagram in one embodiment in Fig. 6.Described pressure limiting circuit comprises nmos pass transistor MN3, and the drain electrode of this nmos pass transistor MN3 is as described voltage limiting outputting terminal VLIM, and source electrode, grid are connected and ground connection.The puncture voltage that surpasses nmos pass transistor MN3 when the voltage of link VDD can produce breakdown current in nmos pass transistor MN3 when (or being called voltage threshold), with the limiting voltage of the node VLIM breakdown voltage value at nmos pass transistor MN3.Thereby with the limiting voltage of the node VLIM breakdown voltage value less than or equal to nmos pass transistor MN3.Because the breakdown current in nmos pass transistor MN3 is limited by the resistance R 4 in Fig. 6, so nmos pass transistor MN3 can not broken.
Please refer to shown in Figure 8ly, it is the pressure limiting circuit circuit diagram in another embodiment in Fig. 6.Described pressure limiting circuit comprises nmos pass transistor MN3 and operational amplifier OP1, and the drain electrode of described nmos pass transistor MN3 is as described voltage limiting outputting terminal VLIM, source ground; The positive input of the large device OP1 of described computing is connected with the drain electrode of described nmos pass transistor MN3, its negative input input reference voltage VR, and its output is connected with the grid of described nmos pass transistor MN3.Operational amplifier OP1 and nmos pass transistor MN3 consist of negative feedback, with the limiting voltage of node VLIM less than or equal to reference voltage VR.When the link vdd voltage surpassed reference voltage VR, node VLIM voltage equaled reference voltage VR; During lower than reference voltage VR, node VLIM voltage equals the voltage on link VDD as link VDD, thus with the limiting voltage of node VLIM less than or equal to reference voltage VR.
Always in sum, the battery protecting circuit of the integrated RC in the utility model carries out pressure limiting by increasing pressure limiting circuit to its internal circuit, to improve the withstand voltage of himself; Be arranged at the withstand voltage of electrostatic discharge protective circuit on the battery protecting circuit of this integrated RC by raising, discharge to avoid inappropriate static, thereby overcome in application the larger ordeal that brings of stray inductance due to the battery protecting circuit outside of integrated RC.
In the utility model, " connection ", be connected, word that the expressions such as " company ", " connecing " are electrical connected, if no special instructions, represent direct or indirect electric connection.
It is pointed out that being familiar with any change that the person skilled in art does embodiment of the present utility model does not all break away from the scope of claims of the present utility model.Correspondingly, the scope of claim of the present utility model also is not limited only to previous embodiment.
Claims (10)
1. the electrostatic discharge protective circuit of an integrated circuit, described integrated circuit has the first link and the second link, it is characterized in that, described electrostatic discharge protective circuit comprises the electrostatic protection device that is connected between the first link and the second link, this electrostatic protection device comprises P type substrate, extend downward N trap in P type substrate along the upper surface of described P type substrate, be positioned at the grid oxide layer on described P type substrate and described N trap, be positioned at the grid on described grid oxide layer, extend downward a P+ active area and a N+ active area in P type substrate along the upper surface of described P type substrate, extend downward the 2nd P+ active area and the 2nd N+ active area in the N trap along the upper surface of described N trap,
Wherein, a described P+ active area and a N+ active area space, an and described grid oxide layer of N+ active area next-door neighbour, described the 2nd P+ active area and the 2nd N+ active area space, and described the 2nd P+ active area than the 2nd N+ active area more near described grid oxide layer, the N-type doping content of N+ active area is high than the N-type doping content of N trap
The one P+ active area, a N+ active area and grid are connected with the second link, and the 2nd P+ active area is connected with the first link with the 2nd N+ active area.
2. electrostatic discharge protective circuit according to claim 1, is characterized in that, it also comprises the first resistance that is connected in grid and the first link.
3. according to claim 1 or 2 described electrostatic discharge protective circuits, it is characterized in that, it is characterized in that, described electrostatic protection device comprises parasitic NPN type bipolar transistor and parasitic positive-negative-positive bipolar transistor,
Described parasitic NPN type bipolar transistor comprises a N+ active area, P type substrate and N trap;
Described parasitic positive-negative-positive bipolar transistor comprises the 2nd P+ active area, N trap and P type substrate.
4. the electrostatic discharge protective circuit of an integrated circuit, described integrated circuit has the first link and the second link, it is characterized in that, described electrostatic discharge protective circuit comprises the electrostatic protection device that is connected between the first link and the second link, this electrostatic protection device comprises P type substrate, extend downward N trap in P type substrate along the upper surface of described P type substrate, along described P type substrate upper surface extend downward a P+ active area and a N+ active area in P type substrate, extend downward the 2nd P+ active area and the 2nd N+ active area in the N trap along the upper surface of described N trap,
Wherein, a described P+ active area and a N+ active area space; Described the 2nd P+ active area and the 2nd N+ active area space, and more described the 2nd N+ active area of described the 2nd P+ active area is nearer apart from a described N+ active area, and the N-type doping content of N+ active area is high than the N-type doping content of N trap,
Wherein, be connected with the second link with a N+ active area by a P+ active area, the 2nd P+ active area is connected with the first link with the 2nd N+ active area.
5. according to claim 1 or 4 described electrostatic discharge protective circuits, is characterized in that, described N trap is for consisting of the lining body level of 5V standard P MOS.
6. battery protecting circuit, it comprise the battery battery core negative pole link VSS that is connected with the battery battery core negative pole and with the anodal power end VDD that is connected of battery battery core,
It is characterized in that; it also comprises as arbitrary in the claim 1-5 described electrostatic discharge protective circuit that is connected between battery battery core negative pole link VSS and power end VDD; wherein power end VDD is the first link, and battery battery core negative pole link VSS is the second link.
7. battery protecting circuit according to claim 6; it is characterized in that; it comprises internal circuit and is arranged at pressure limiting circuit between power end VDD and internal circuit; described internal circuit is used for the charging and discharging state of battery battery core is detected; and by charging control end output charging control signal; by control of discharge end output discharge control signal, described pressure limiting circuit is used for limiting the operating voltage of described internal circuit less than or equal to a voltage threshold.
8. battery protecting circuit according to claim 7, is characterized in that, the voltage limiting outputting terminal of described pressure limiting circuit is connected in power end VDD by resistance R 4, and the voltage limiting outputting terminal of described pressure limiting circuit provides power supply to internal circuit.
9. according to claim 7 or 8 described battery protecting circuits, it is characterized in that, described pressure limiting circuit comprises nmos pass transistor, and the drain electrode of this nmos pass transistor is as described voltage limiting outputting terminal VLIM, and source electrode, grid are connected and ground connection.
10. according to claim 7 or 8 described battery protecting circuits, it is characterized in that, described pressure limiting circuit comprises nmos pass transistor and operational amplifier, and the drain electrode of described nmos pass transistor is as described voltage limiting outputting terminal VLIM, source ground; The positive input of the large device of described computing is connected with the drain electrode of described nmos pass transistor, its negative input input reference voltage, and its output is connected with the grid of described nmos pass transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320156659 CN203277382U (en) | 2013-03-31 | 2013-03-31 | Electrostatic protection circuit and battery protection circuit thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320156659 CN203277382U (en) | 2013-03-31 | 2013-03-31 | Electrostatic protection circuit and battery protection circuit thereof |
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| Publication Number | Publication Date |
|---|---|
| CN203277382U true CN203277382U (en) | 2013-11-06 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201320156659 Withdrawn - After Issue CN203277382U (en) | 2013-03-31 | 2013-03-31 | Electrostatic protection circuit and battery protection circuit thereof |
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| CN (1) | CN203277382U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103199090A (en) * | 2013-03-31 | 2013-07-10 | 无锡中星微电子有限公司 | Electrostatic protective circuit and battery protective circuit thereof |
| CN105118826A (en) * | 2015-09-01 | 2015-12-02 | 无锡中星微电子有限公司 | Electrostatic protection circuit and integrated circuit |
-
2013
- 2013-03-31 CN CN 201320156659 patent/CN203277382U/en not_active Withdrawn - After Issue
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103199090A (en) * | 2013-03-31 | 2013-07-10 | 无锡中星微电子有限公司 | Electrostatic protective circuit and battery protective circuit thereof |
| CN103199090B (en) * | 2013-03-31 | 2016-06-01 | 无锡中感微电子股份有限公司 | Electrostatic discharge protective circuit and battery protecting circuit thereof |
| CN105118826A (en) * | 2015-09-01 | 2015-12-02 | 无锡中星微电子有限公司 | Electrostatic protection circuit and integrated circuit |
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Granted publication date: 20131106 Effective date of abandoning: 20160601 |
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