CN116936605A - Preparation method of power diode - Google Patents

Preparation method of power diode Download PDF

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Publication number
CN116936605A
CN116936605A CN202310716753.1A CN202310716753A CN116936605A CN 116936605 A CN116936605 A CN 116936605A CN 202310716753 A CN202310716753 A CN 202310716753A CN 116936605 A CN116936605 A CN 116936605A
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gan layer
layer
doped gan
reaction chamber
power diode
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马昆旺
邹声斌
贺卫群
马野
刘恒山
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Fujian Prima Optoelectronics Co Ltd
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Fujian Prima Optoelectronics Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003—Nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/6609—Diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)

Abstract

The invention relates to a preparation method of a semiconductor, in particular to a preparation method of a power diode. The preparation method comprises the following steps: s1: sequentially growing a buffer layer, a GaN layer, an AlGaN layer, a lightly doped GaN layer and a heavily doped GaN layer on a substrate to obtain an epitaxial wafer; s2: etching to expose part of AlGaN layer, and preparing cathode electrode on the heavily doped GaN layer; an anode electrode was prepared on the bare AlGaN layer. The power diode prepared by the method has the advantages of taking high conduction of a horizontal structure and high breakdown of a vertical structure into consideration, on one hand, adjusting the spatial distribution of electrons, realizing the rapid conduction in the horizontal direction and the vertical direction, and on the other hand, effectively utilizing high-quality GaN to improve the breakdown resistance, and realizing wider application scenes.

Description

Preparation method of power diode
Technical Field
The invention relates to a preparation method of a semiconductor, in particular to a preparation method of a power diode.
Background
The power diode is an important component of the inverter in power conversion, wherein the GaN-based power diode can remarkably improve conversion efficiency, reduce capability loss, has excellent physicochemical properties, and has become a hot spot field of scholars research since 2000. The GaN-based power diode comprises a GaN Schottky diode and a PN junction diode, and the GaN Schottky diode has no accumulation of minority carriers and lower barrier height and is more advantageous than the PN junction diode in the high-frequency field operation.
Two structures, namely a horizontal structure and a vertical structure, are generally adopted in the GaN Schottky diode, the horizontal structure is a hot spot and mainstream technology studied at present, a working core is used for generating two-dimensional electron gas in AlGaN (aluminum doped gallium nitride)/GaN heterojunction polarization, but the two-dimensional electron gas is limited by growth of a heterogeneous substrate, the defect density is high, and higher breakdown is difficult to realize; the vertical structure is another technical route appearing later, for example, chinese patent publication No. CN114300545A discloses a GaN Schottky barrier diode with vertical structure, which comprises n - GaN layer, n - The upper surface of the GaN layer is provided with an insulating protection layer and a Schottky barrier electrode, n - The lower surface of the GaN layer is provided with n from top to bottom in turn + -GaN layer, ohmic electrode. The schottky barrier diode with the vertical structure realizes higher breakdown through the inherent material property of GaN, but needs thicker epitaxial layer thickness, has higher doping requirement, has conductive and self-supporting substrates, and has high preparation cost and higher on-resistance.
Disclosure of Invention
In order to overcome the defects in the prior art, the technical problem to be solved by the invention is to provide a preparation method of the power diode, and the power diode prepared by the method can realize high conduction capacity and simultaneously meet higher breakdown electric field, and has the advantages of a horizontal structure and a vertical structure.
In order to solve the technical problems, the invention adopts the following technical scheme: a preparation method of a power diode comprises the following steps:
s1: sequentially growing a buffer layer, a GaN layer, an AlGaN layer, a lightly doped GaN layer and a heavily doped GaN layer on a substrate to obtain an epitaxial wafer;
s2: etching to expose part of AlGaN layer, and preparing cathode electrode on the heavily doped GaN layer; an anode electrode was prepared on the bare AlGaN layer.
The invention has the beneficial effects that: according to the preparation method of the novel power diode, the prepared power diode has the advantages that the high conduction of a horizontal structure and the high breakdown of a vertical structure are considered, on one hand, the spatial distribution of electrons is adjusted, the rapid conduction in the horizontal direction and the vertical direction is realized, on the other hand, the high-quality GaN is effectively utilized, the breakdown resistance is improved, and a wider application scene is realized.
Drawings
Fig. 1 is a schematic structural diagram of a power diode according to an embodiment of the invention;
fig. 2 is a schematic structural diagram of a power diode in a third embodiment of the present invention;
description of the reference numerals:
1. a substrate; 2. a buffer layer; 3. a GaN layer; 4. a GaN layer; 5. an AlGaN layer; 6. a lightly doped GaN layer; 7. a heavily doped GaN layer; 8. a cathode electrode; 9. an anode electrode.
Detailed Description
In order to describe the technical contents, the achieved objects and effects of the present invention in detail, the following description will be made with reference to the embodiments in conjunction with the accompanying drawings.
Referring to fig. 1, a method for manufacturing a power diode includes the following steps:
s1: sequentially growing a buffer layer, a GaN layer, an AlGaN layer, a lightly doped GaN layer and a heavily doped GaN layer on a substrate to obtain an epitaxial wafer;
s2: etching to expose part of AlGaN layer, and preparing cathode electrode on the heavily doped GaN layer; an anode electrode was prepared on the bare AlGaN layer.
From the above description, the beneficial effects of the invention are as follows: the invention provides a preparation method of a novel power diode, and the power diode prepared by the method has a horizontal structure, so that the anode and the cathode are well conducted, meanwhile, a heavily doped GaN layer and a lightly doped GaN layer are designed at the cathode position, the advantages of a vertical structure are achieved, and a higher breakdown voltage is achieved while good electric contact is achieved.
The lightly doped gallium nitride layer has two functions, on one hand, the barrier layer AlGaN is protected, the influence of surface defects and the like is reduced, and on the other hand, the breakdown resistance is improved by thickening the thickness of the GaN layer; the heavily doped GaN layer has the main effects of reducing contact resistance, improving ohmic contact capability and reducing concentration of a reverse electric field. The order of the lightly doped GaN layer and the heavily doped GaN layer cannot be changed, the work function of the gallium nitride is high, ohmic contact is difficult to form between the gallium nitride and the metal electrode, and the heavily doped gallium nitride can exert the maximum effect only by being directly connected with the metal electrode, so that good ohmic contact is realized.
Further selecting homogeneous GaN or AlN substrate.
From the above description, it is clear that the homogeneous substrate has small defect density and lattice mismatch of GaN and AlN epitaxial materials, and epitaxial growth is relatively easy, which is advantageous for improving crystal quality and improving the working capacity of the power semiconductor device.
Further, the growth of the lightly doped GaN layer is performed in a reaction chamber, and the electron concentration in the reaction chamber is 1×10 16 ～5*10 16 cm -3 。
Further, the thickness of the lightly doped GaN layer is 0.5-3 μm.
From the above description, the lightly doped GaN layer has the function of improving breakdown resistance, and the lightly doped GaN layer has low doping concentration and slightly thick thickness, which are all in a certain interval. The lightly doped GaN layer is too thick or the doping concentration is too low, so that the series resistance is obviously increased, the loss is increased, the effect is difficult to generate if the lightly doped GaN layer is too thin, and the doping concentration needs to balance the intrinsic carrier concentration to realize the maximization of the effect.
Further, growing the heavily doped GaN layer is performed in a reaction chamber with an electron concentration of 1×10 18 ～5*10 18 cm -3 。
From the above description, it is known that the heavily doped GaN layer needs a larger doping amount, and the main effect is to reduce the contact resistance.
Further, the thickness of the heavily doped GaN layer is 0.2-1 μm.
Further, the substrate is placed in a reaction chamber, the reaction chamber is treated for 5-10 min by using hydrogen atmosphere at 1000 ℃, and then the growth of S1 is carried out.
As is apparent from the above description, this step is used to remove surface particles, organic matters, and the like remaining on the surface portion of the substrate.
Further, the growth of the buffer layer is performed in a reaction chamber at a temperature of 400-600 ℃ and a pressure of 400-600 Torr.
Further, the thickness of the buffer layer is 0.5 to 3 μm.
From the above description, the substrate is the basis of epitaxial structure growth, and heteroepitaxy has a plurality of optional substrate types, and due to the non-uniformity of crystal lattices, a gallium nitride buffer layer is required to realize the crystal lattice transformation of subsequent GaN growth, so that a high-quality epitaxial layer is obtained.
Further, the growth of the GaN layer is performed in a reaction chamber at a temperature of 1000-1100 ℃ and a pressure of 100-500 Torr.
Further, the GaN layer has a thickness of 0.5 to 2.0 μm.
From the above description, the GaN layer further optimizes the growth process, and improves the quality of gallium nitride crystal.
Further, the GaN layer is grown in a reaction chamber, the temperature of the reaction chamber is 1000-1200 ℃, and the pressure is 100-500 Torr.
Further, the thickness of the GaN layer is 50-500 nm.
Preferably, the thickness of the GaN layer is 200-300 nm.
Further, the AlGaN layer is grown in a reaction chamber, the temperature of the reaction chamber is 1000-1200 ℃, the pressure is 50-150 Torr, and the Al molar content is 7% -30%.
Further, the AlGaN layer has a thickness of 3 to 25 μm.
Preferably, the AlGaN layer has a thickness of 15 to 20 μm.
From the above description, gaN and AlGaN layers are used to realize polarization, which is a key structure for generating two-dimensional electron gas.
Further, the distance between the lightly doped GaN layer and the anode electrode is 3-50 μm.
From the above description, it is clear that the anode and the lightly/heavily doped layers are spatially separated, and that large leakage is likely to occur if the distance is too close to the strong electric field.
Referring to fig. 1, a first embodiment of the present invention is as follows:
a preparation method of a power diode comprises the following steps:
s1: placing the substrate 1 into an MOCVD reaction cavity, and treating the reaction cavity for 7min by using a hydrogen atmosphere at 1000 ℃;
s2: setting the temperature of the reaction chamber to 500 ℃, setting the pressure to 500Torr, and growing a buffer layer 2 with the thickness of 2 μm;
s3: setting the temperature of the reaction chamber to 1050 ℃, setting the pressure to 300Torr, and growing a GaN layer 3 with the thickness of 1.0 μm on the buffer layer 2;
s4: setting the temperature of the reaction chamber to 1100 ℃ and the pressure to 350Torr, and growing a 300nm GaN layer 4 on the GaN layer 3;
s5: setting the temperature of the reaction chamber to 1100 ℃, the pressure to 100Torr, and the Al molar content to 20%, and growing an AlGaN layer 5 with the thickness of 10 μm on the GaN layer 4;
s6: setting the electron concentration in the reaction cavity to 3 x 10 16 cm -3 Growing a 2 μm lightly doped GaN layer 6 on the AlGaN layer 5;
s7: setting the electron concentration in the reaction cavity to 3 x 10 18 cm -3 Growing a 0.7 mu m heavy doped GaN layer 7 on the light doped GaN layer 6 to obtain an epitaxial wafer;
s8: ultrasonic cleaning is carried out on the epitaxial wafer, and deionized water is used for cleaning;
s9: coating a layer of photoresist on the heavily doped GaN layer 7, placing a mask at the position corresponding to the cathode, hardening the photoresist after exposure and development, and removing unhardened photoresist;
s10: etching the anode position by adopting a dry etching process to expose part of AlGaN layer 5, and preparing a cathode electrode 8 on the heavily doped GaN layer 7 after forming a target step; preparing an anode electrode 9 on the exposed AlGaN layer 5; the distance between the lightly doped GaN layer 6 and the anode electrode 9 was 20 μm, to obtain a power diode.
The second embodiment of the invention is as follows:
a preparation method of a power diode comprises the following steps:
s1: placing the substrate 1 into a PLD reaction cavity, and treating the reaction cavity for 5min by using a hydrogen atmosphere at 1000 ℃;
s2: setting the temperature of the reaction chamber to 400 ℃ and the pressure to 600Torr, and growing a buffer layer 2 with the thickness of 0.5 μm;
s3: setting the temperature of the reaction chamber to 1000 ℃ and the pressure to 500Torr, and growing a GaN layer 3 with the thickness of 0.5 μm on the buffer layer 2;
s4: setting the temperature of the reaction cavity to 1000 ℃ and the pressure to 500Torr, and growing a GaN layer 4 with the thickness of 50nm on the GaN layer 3;
s5: setting the temperature of the reaction chamber to 1000 ℃, the pressure to 150Torr, and the Al molar content to 7%, and growing a 3 μm AlGaN layer 5 on the GaN layer 4;
s6: setting the electron concentration in the reaction chamber to 1 x 10 16 cm -3 A lightly doped GaN layer 6 of 0.5 μm is grown on the AlGaN layer 5;
s7: setting the electron concentration in the reaction chamber to 1 x 10 18 cm -3 Growing a 0.2 mu m heavy doped GaN layer 7 on the light doped GaN layer 6 to obtain an epitaxial wafer;
s8: ultrasonic cleaning is carried out on the epitaxial wafer, and deionized water is used for cleaning;
s9: coating a layer of photoresist on the heavily doped GaN layer 7, placing a mask at the position corresponding to the cathode, hardening the photoresist after exposure and development, and removing unhardened photoresist;
s10: etching the anode position by adopting a dry etching process to expose part of AlGaN layer 5, and preparing a cathode electrode 8 on the heavily doped GaN layer 7 after forming a target step; preparing an anode electrode 9 on the exposed AlGaN layer 5; the distance between the lightly doped GaN layer 6 and the anode electrode 9 was 3 μm, to obtain a power diode.
The third embodiment of the invention is as follows:
referring to fig. 2, a method for manufacturing a power diode includes the following steps:
s1: placing the substrate 1 into an MBE reaction cavity, and treating the reaction cavity for 10min by using a hydrogen atmosphere at 1000 ℃;
s2: setting the temperature of the reaction chamber to 600 ℃, the pressure to 400Torr, and growing a buffer layer 2 with the thickness of 3 μm;
s3: setting the temperature of the reaction chamber to 1100 ℃ and the pressure to 100Torr, and growing a GaN layer 3 with the thickness of 2.0 μm on the buffer layer 2;
s4: setting the temperature of the reaction cavity to 1200 ℃ and the pressure to 100Torr, and growing a 500nm GaN layer 4 on the GaN layer 3;
s5: setting the temperature of the reaction chamber to 1200 ℃, the pressure to 50Torr and the Al molar content to 30%, and growing a 3 mu m AlGaN layer 5 on the GaN layer 4;
s6: setting the electron concentration in the reaction cavity to 5 x 10 16 cm -3 A lightly doped GaN layer 6 of 3 μm is grown on the AlGaN layer 5;
s7: setting the electron concentration in the reaction cavity to 5 x 10 18 cm -3 Growing a 1 mu m heavy doped GaN layer 7 on the light doped GaN layer 6 to obtain an epitaxial wafer;
s8: ultrasonic cleaning is carried out on the epitaxial wafer, and deionized water is used for cleaning;
s9: coating a layer of photoresist on the heavily doped GaN layer 7, placing a mask at the position corresponding to the cathode, hardening the photoresist after exposure and development, and removing unhardened photoresist;
s10: etching the anode position by adopting a dry etching process to expose part of AlGaN layer 5, and preparing a cathode electrode 8 on the heavily doped GaN layer 7 after forming a target step; an anode electrode 9 is embedded on the exposed AlGaN layer 5; the distance between the lightly doped GaN layer 6 and the anode electrode 9 was 50 μm, to obtain a power diode.
The first comparative example of the present invention is:
the preparation method of the conventional power diode comprises the following steps:
s1: placing the substrate 1 into an MOCVD reaction cavity, and treating the reaction cavity for 7min by using a hydrogen atmosphere at 1000 ℃;
s2: setting the temperature of the reaction chamber to 500 ℃, setting the pressure to 500Torr, and growing a buffer layer 2 with the thickness of 2 μm;
s3: setting the temperature of the reaction chamber to 1050 ℃, setting the pressure to 300Torr, and growing a GaN layer 3 with the thickness of 1.0 μm on the buffer layer 2;
s4: setting the temperature of the reaction chamber to 1100 ℃ and the pressure to 350Torr, and growing a 300nm GaN layer 4 on the GaN layer 3;
s5: setting the temperature of the reaction chamber to 1100 ℃, the pressure to 100Torr, and the Al molar content to 0.20, and growing an AlGaN layer 5 with the thickness of 10 μm on the GaN layer 4; obtaining an epitaxial wafer;
s6: ultrasonic cleaning is carried out on the epitaxial wafer, and deionized water is used for cleaning;
s7: a cathode electrode 8 and an anode electrode 9 were prepared on the AlGaN layer 5, and a power diode was prepared with a distance between the cathode electrode 8 and the anode electrode 9 of 20 μm.
The semiconductor device is prepared by adopting 6 power diodes of the embodiment I in different batches and 6 power diodes of the comparative embodiment I in different batches, and the specific preparation method is as follows: the cathode and the anode are respectively provided with leads, and SiO is deposited firstly 2 And packaging, and protecting the whole device structure by using a plastic shell through a packaging process to manufacture pins corresponding to the leads.
The breakdown voltage of the semiconductor device is tested, and the testing method comprises the following steps: with a fixed boost speed and voltage strength (most materials are 500V/S), the boost is started from 0, and the voltage is not increased until the medium is damaged, and the limit voltage is the breakdown voltage. The breakdown voltage of the first embodiment of the invention is 800-1000V, and the breakdown voltage of the first comparative example is only 400-600V.
In summary, the horizontal structure of the power diode prepared by the preparation method provided by the invention enables good conduction between the anode and the cathode, and meanwhile, the heavily doped and lightly doped GaN layer 6 is designed at the cathode position, which has the advantages of the vertical structure, and realizes higher breakdown voltage while realizing good electrical contact. In the growth process, the growth conditions such as the temperature, the growth speed, the airflow field and the like of the epitaxial layer are adjusted and optimized, so that the quality of crystals is improved, and the stress is balanced.
The lightly doped gallium nitride layer has two functions, on one hand, the barrier layer AlGaN is protected, the influence of surface defects and the like is reduced, and on the other hand, the breakdown resistance is improved by thickening the thickness of GaN; the main purpose of the heavily doped GaN layer 4 is to reduce contact resistance, improve ohmic contact capability and reduce concentration of reverse electric field. The order of the lightly doped GaN layer 7 and the heavily doped GaN layer 7 cannot be changed, the work function of the gallium nitride is high, ohmic contact is difficult to form between the gallium nitride and the metal electrode, and the heavily doped gallium nitride can exert the maximum effect only by being directly connected with the metal electrode, so that good ohmic contact is realized.
The power diode of the invention obtains a novel semiconductor device after packaging protection is finished, the on-resistance of the semiconductor device is equivalent to that of a horizontal structure, but the breakdown voltage is improved by 1-2.5 compared with that of a similar horizontal structure, and the power diode is suitable for high-voltage application and application scenes with high reliability requirements such as new energy automobiles, rail transit, photovoltaics, data centers and the like.
The foregoing description is only illustrative of the present invention and is not intended to limit the scope of the invention, and all equivalent changes made by the specification and drawings of the present invention, or direct or indirect application in the relevant art, are included in the scope of the present invention.

Claims (10)

1. The preparation method of the power diode is characterized by comprising the following steps of:
s1: sequentially growing a buffer layer, a GaN layer, an AlGaN layer, a lightly doped GaN layer and a heavily doped GaN layer on a substrate to obtain an epitaxial wafer;
s2: etching to expose part of AlGaN layer, and preparing cathode electrode on the heavily doped GaN layer; an anode electrode was prepared on the bare AlGaN layer.
2. The method of claim 1, wherein the growing the lightly doped GaN layer is performed in a reaction chamber having an electron concentration of 1 x 10 16 ～5*10 16 cm -3 。
3. The method of manufacturing a power diode according to claim 1, wherein the thickness of the lightly doped GaN layer is 0.5-3 μm.
4. The method of claim 1, wherein growing the heavily doped GaN layer is performed in a reaction chamber having an electron concentration of 1 x 10 18 ～5*10 18 cm -3 。
5. The method of claim 1, wherein the heavily doped GaN layer has a thickness of 0.2-1 μm.
6. The method of manufacturing a power diode as claimed in claim 1, wherein the substrate is placed in the reaction chamber, the reaction chamber is treated with a hydrogen atmosphere at 1000 ℃ for 5 to 10 minutes, and then the growth of S1 is performed.
7. The method of claim 1, wherein growing the buffer layer is performed in a reaction chamber at a temperature of 400-600 ℃ and a pressure of 400-600 Torr.
8. The method of manufacturing a power diode according to claim 1, wherein the growth of the GaN layer is performed in a reaction chamber having a temperature of 1000 to 1100 ℃ and a pressure of 100to 500Torr.
9. The method of claim 1, wherein growing the GaN layer is performed in a reaction chamber at a temperature of 1000-1200 ℃ and a pressure of 100-500 Torr.
10. The method of claim 1, wherein the distance between the lightly doped GaN layer and the anode electrode is 3-50 μm.
CN202310716753.1A 2023-06-16 2023-06-16 Preparation method of power diode Pending CN116936605A (en)

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