CN116820998A - Multipurpose test system supporting high-speed bus test between modules - Google Patents
Multipurpose test system supporting high-speed bus test between modules Download PDFInfo
- Publication number
- CN116820998A CN116820998A CN202310904506.4A CN202310904506A CN116820998A CN 116820998 A CN116820998 A CN 116820998A CN 202310904506 A CN202310904506 A CN 202310904506A CN 116820998 A CN116820998 A CN 116820998A
- Authority
- CN
- China
- Prior art keywords
- test
- module
- rapidio
- measurement
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 251
- 230000005284 excitation Effects 0.000 claims abstract description 57
- 238000005259 measurement Methods 0.000 claims abstract description 44
- 230000005540 biological transmission Effects 0.000 claims abstract description 38
- 230000003287 optical effect Effects 0.000 claims abstract description 20
- 238000003780 insertion Methods 0.000 claims abstract description 8
- 230000037431 insertion Effects 0.000 claims abstract description 8
- 238000013461 design Methods 0.000 claims abstract description 6
- 230000003993 interaction Effects 0.000 claims abstract description 5
- 238000004088 simulation Methods 0.000 claims description 45
- 238000004891 communication Methods 0.000 claims description 23
- 238000006243 chemical reaction Methods 0.000 claims description 5
- 230000005693 optoelectronics Effects 0.000 claims description 2
- 230000007547 defect Effects 0.000 abstract description 2
- 238000004519 manufacturing process Methods 0.000 abstract description 2
- PYQQRVCLCSUWCZ-GXKRWWSZSA-N (2s)-5-amino-2-[4-[bis(2-chloroethyl)amino]anilino]-5-oxopentanoic acid;2,2,2-trifluoroacetic acid Chemical compound OC(=O)C(F)(F)F.OC(=O)C(F)(F)F.NC(=O)CC[C@@H](C(O)=O)NC1=CC=C(N(CCCl)CCCl)C=C1 PYQQRVCLCSUWCZ-GXKRWWSZSA-N 0.000 description 10
- 238000012545 processing Methods 0.000 description 8
- 238000004132 cross linking Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 3
- 230000007613 environmental effect Effects 0.000 description 3
- 230000006872 improvement Effects 0.000 description 2
- 238000011065 in-situ storage Methods 0.000 description 2
- 230000007774 longterm Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- 230000009897 systematic effect Effects 0.000 description 2
- 101100142275 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) RPL1A gene Proteins 0.000 description 1
- 101100142277 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) RPL1B gene Proteins 0.000 description 1
- 101100476983 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) SDT1 gene Proteins 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/3668—Software testing
- G06F11/3672—Test management
- G06F11/3676—Test management for coverage analysis
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/3668—Software testing
- G06F11/3672—Test management
- G06F11/3684—Test management for test design, e.g. generating new test cases
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Maintenance And Management Of Digital Transmission (AREA)
Abstract
The invention discloses a multipurpose test system supporting high-speed bus test between modules, which comprises measurement and control equipment, a test fixture and a test cable. The test cable is used for connecting the measurement and control equipment and the test tool; the test tool comprises a test accompanying module and a test tool motherboard, wherein the test tool motherboard provides a first slot for supporting the insertion of the test accompanying module and a second slot for supporting the insertion of the tested module; the tested module and the measurement and control equipment interact with each other to carry out optical transmission rapidIO signals, and the measurement and control equipment provides optical signal excitation for the tested module; the measurement and control equipment and the accompanying measurement module interact with each other through light transmission rapidIO signals, and the measurement and control equipment provides test instructions for the accompanying measurement module; and the tested module and the accompanying testing module are used for carrying out interaction of an electric transmission rapidIO signal and an electric transmission MGT signal, and the accompanying testing module provides electric signal excitation for the tested module. The invention can improve the test coverage rate, identify design or manufacturing defects in advance and improve the module quality.
Description
Technical Field
The invention belongs to the technical field of testing, and relates to a multipurpose testing system supporting high-speed bus testing among modules, which can realize testing such as test and acceptance test and has far lower cost than the existing testing system.
Background
From bus rate and transmission medium dimension, with the continuous improvement of functions and performance requirements of an airborne avionics system, an open avionics architecture provides higher and higher requirements for the scale and the rate of data exchange and data transmission among all functional modules in the system, the data volume and the communication rate of communication among the modules are greatly improved, and a high-speed bus is widely applied to communication among complete machines in the avionics system and between modules, such as rapidIO and MGT buses. Because the speed is as high as 5Gbps, electric signal transmission is generally adopted when short-distance communication is carried out between modules; when the whole machine is in long-distance communication, optical signal transmission is generally adopted. Therefore, the single avionics module presents the characteristics of both the existing electrical signal and the optical signal for external high-speed signals.
From the product matching relation and the delivery test requirement dimension, the traditional avionics matching manufacturers deliver products to avionics system integration suppliers in a system or equipment mode, and test objects of test and acceptance activities are systems or complete machines, so that the modules do not need to be subjected to test and acceptance test independently. Along with the refinement of the division of the development field of the airborne products, the matching relation of the products is more and more complex, the delivery forms of the products are more and more varied, and the demand of single-module delivery is more and more increased. When the product is delivered in a modular form, it is necessary to perform complete test and acceptance testing with the module as a test object before the module is delivered. For modules with both a telex high-speed bus and an optical transmission high-speed bus, a high-reliability and low-cost test system needs to be constructed, so that the test requirements of different scenes such as environmental tests, acceptance tests and the like are met, and the high-quality delivery of module products is supported.
Disclosure of Invention
The invention aims to provide a multipurpose test system supporting high-speed bus test between modules, which is provided with two configurations, namely an acceptance test configuration and a test configuration, wherein the acceptance test configuration can support communication test on all high-speed buses of an avionics module under an acceptance scene; the test configuration can support loop-back testing of all fly-by-wire high-speed buses of the avionics module in an environmental test scene. The invention can solve the problem that the high-speed bus communication test can not be covered during the avionics module product test and acceptance test, improves the module test coverage rate, improves the quality improvement effect of the test on the product, and has higher usability and expandability.
The invention aims at realizing the following technical scheme:
a multipurpose test system supporting high-speed bus test between modules comprises measurement and control equipment, a test fixture and a test cable;
the test cable is used for connecting the measurement and control equipment and the test tool;
the test tool comprises a test tool case, a test accompanying module, a test tool motherboard and a connector in signal connection with a test cable, wherein the test tool motherboard provides a first slot for supporting the insertion of the test accompanying module and a second slot for supporting the insertion of a tested module;
the tested module and the measurement and control equipment interact with each other to carry out optical transmission rapidIO signals, and the measurement and control equipment provides optical signal excitation for the tested module; the measurement and control equipment and the accompanying measurement module interact with each other through light transmission rapidIO signals, and the measurement and control equipment provides test instructions for the accompanying measurement module; and the tested module and the accompanying testing module are used for carrying out interaction of an electric transmission rapidIO signal and an electric transmission MGT signal, and the accompanying testing module provides electric signal excitation for the tested module.
Furthermore, the measurement and control equipment also provides power for the tested module and the accompanying testing module in the test fixture, and issues test instructions, acquires output signals of the tested module and judges test results by executing test software.
Preferably, the accompanying test module comprises an active simulation excitation module and a passive self-loop module, and supports two configurations of acceptance test and test; the acceptance test configuration is used for supporting acceptance delivery test of the avionics module, and the active simulation excitation module is used for providing signal excitation of the telex rapidIO and the telex MGT and supporting communication test of a telex high-speed bus of the tested module; the test configuration is used for supporting the module environment test, and the loop test of partial electric high-speed buses of the tested module is supported by realizing the loop of the electric transmission rapidIO and electric transmission MGT signals without a loop module.
Preferably, the signal definition of the active simulation excitation module and the passive self-loop module on the LRMD connector is subjected to systematic design, and the active simulation excitation module and the passive self-loop module are replaced and plugged in the same first slot of the test tool motherboard.
Preferably, the active simulation excitation module comprises an FPGA, a rapidIO exchange chip and a photoelectric conversion device, and the FPGA outputs an electric rapidIO signal and an electric MGT signal; the rapidIO exchange chip expands an electric transmission rapidIO signal and an electric transmission MGT signal output by the FPGA; the optoelectronic switching device converts the electrical RapidIO signal into an optical signal.
Preferably, the passive self-loop module comprises a PCB, and the signal is looped back on the receiving and transmitting channel on the PCB.
The invention has the beneficial effects that:
1. the multipurpose test system supporting the inter-module high-speed bus test can solve the problem that the inter-module electrical transmission high-speed bus test is insufficient during the module test and acceptance test, improves the test coverage rate, identifies design or manufacturing defects in advance, and improves the product quality.
2. The designed test and acceptance dual-purpose test tool can realize in-situ replacement of telex high-speed bus communication test and loop-back test under test and acceptance scenes, and realize plug and play agility test under different scenes.
3. The designed active simulation excitation module in the acceptance test scene can support communication test of the telex high-speed bus and can be rapidly expanded according to requirements.
4. The passive self-loop module under the designed test scene can support repeated tests, and has low cost and high reliability.
5. The designed test system can support simultaneous testing of a plurality of similar types of modules through configuration of test software, and has low cost and high efficiency.
The design thought provided by the invention is suitable for testing products such as avionics modules, boards and the like with high-speed buses in a plurality of application scenes such as tests, acceptance and verification, and has obvious application popularization value and economic benefit.
Drawings
FIG. 1 is a logic architecture diagram of a multi-purpose test system supporting inter-module high-speed bus testing.
FIG. 2 is a slot layout of a test fixture.
FIG. 3 is a signal cross-linking diagram of the measurement and control device with the module under test and the accompanying module.
FIG. 4 is a graph of signal cross-linking inside a test fixture.
FIG. 5 is a signal cross-linking diagram of the interior of the active simulation excitation module.
Fig. 6 is a diagram of RapidIO 4X signal distribution on the FPGA of the active simulation excitation module.
Fig. 7 is a diagram of RapidIO 1X signal distribution on the FPGA of the active simulation excitation module.
FIG. 8 is a graph of MGT 1X signal distribution on an FPGA of the active simulation excitation module.
Fig. 9 is a graph of signal cross-linking within a passive self-loop module.
Detailed Description
The invention is described in further detail below with reference to the drawings and examples.
The test object illustrated in this embodiment contains 4 modules of type 3 to be delivered in a set of products, including: the external interfaces of the 1 general data processing module GDPM, the 2 general signal processing modules GSPM and the 1 network switching module NSM, and the 3-type module are shown in table 1:
table 1 tested module external interface table
As shown in Table 1, the external interfaces of the tested module comprise electric transmission rapidIO, electric transmission MGT and optical transmission rapidIO.
Before module delivery, the modules are required to be used as units for high and low temperature test, vibration test and other test and acceptance test, and the multipurpose test system supporting the inter-module high-speed bus test can support the test and acceptance test activities required by module delivery. The acceptance test focuses on the function implementation of the module, and the test focuses on the hardware interface characteristic of the module.
Referring to fig. 1, a multipurpose test system supporting high-speed bus test between modules includes a measurement and control device, a test fixture, and a test cable.
The measurement and control equipment mainly provides external signal excitation for the tested module, provides control signals such as power-on, reset and the like for the tested module and the accompanying test module in the test fixture, collects output signals of the tested module, supports the tested module to complete optical transmission radio IO bus communication test, monitors the running state of the tested module, and issues test instructions and judges test results by executing test software. The hardware components of the measurement and control equipment comprise a measurement and control host backboard, a system controller, a radio IO simulation card, a power supply unit, a connector connected with a test cable in a signal mode and the like, and the measurement and control equipment is a commercial goods shelf product and can be purchased directly. The system controller is used for storing test software, running a test engine and calling various instrument drive interfaces to realize the issuing of test instructions, the triggering of signal excitation, the response of signal receiving, the monitoring of the running state of the module and the judgment of test results.
The test cable is used for connecting the measurement and control equipment and the test tool and transmitting power supply signals and various bus communication signals.
The test fixture is used for supporting the fixation of the tested module, providing a high-speed electric signal excitation source, supporting the expansion of signals and providing a heat dissipation structural member for the tested module. The test fixture comprises a test fixture case, a accompany test module, a test fixture motherboard, a connector in signal connection with a test cable and the like. The test tool motherboard provides a first slot for supporting insertion of the accompanying test module and a second slot for supporting insertion of the tested module.
The accompanying test module comprises an active simulation excitation module and a passive self-loop module, and supports two configurations of acceptance test and test. The acceptance test configuration is used for supporting acceptance delivery test of the avionics module, and the active simulation excitation module SSM is used for providing signal excitation of telex rapidIO and telex MGT and supporting communication test of telex high-speed buses of the type 3 and type 4 modules; the test configuration is used for supporting module environment test, and by realizing loop back of the telex RapidIO and telex MGT signals without a loop back module SCM, loop back test of part of telex high-speed buses of 4 modules of type 3 is supported, and a test fixture slot layout is shown in fig. 2.
The signal definition of the active simulation excitation module and the passive self-loop module on the LRMD connector is subjected to systematic design, and the active simulation excitation module and the passive self-loop module are compatible with each other, so that the active simulation excitation module and the passive self-loop module can be replaced and plugged in the same slot of the test tool motherboard, the test requirements under two scenes of acceptance and test can be met, and the expensive maintenance and replacement cost caused by loss due to repeated tests of high-price active devices can be avoided.
In the acceptance scenario, the test of the module function needs to be implemented through external signal excitation. The traditional test system realizes the output of the simulation excitation signal and the acquisition of the signal of the tested product end by configuring the simulation excitation board card at the test control equipment end. For the SRIO high-speed bus, the simulation excitation board card supported by the PXIE bus at the measurement and control equipment end has high price, the price of the simulation card with 2 paths of SRIO signal output exceeds 10W elements, and if the traditional scheme is adopted, the hardware cost of the SRIO simulation card resource exceeds 100 ten thousands of elements. There is no mature simulated stimulus card on the market today for MGT signals. On the other hand, the signals output by the SRIO simulation board card are optical signals, a large number of SRIO signals in the tested module are electrical signals, and if the SRIO simulation board card is simply used, a plurality of photoelectric conversion chips are required to be additionally arranged in the module tool, so that the cost exceeds 10 ten thousand yuan. Therefore, in an acceptance scene, the invention can realize the test of the SRIO and MGT electrical interfaces with low cost of about 3 ten thousand yuan by designing the active simulation excitation module with the SRIO electrical signals and the MGT electrical signal excitation sources. Under the acceptance test configuration, an active simulation excitation module SSM with the excitation capability of radio and MGT is designed and installed in a test fixture, and the active simulation excitation module mainly comprises components such as an LRMD connector, a PCB board, a FPGA, MCU, SRIO switch and the like, so that communication tests of an electric transmission radio bus and an electric transmission MGT bus of a tested general data processing module GDPM, a general signal processing module GSPM and a network switching module NSM are realized;
under the test scene, before each set of product delivery, the test fixture needs to accompany the tested module to carry out the test under severe environmental conditions such as high temperature, low temperature, vibration, etc., if the active simulation excitation module which is the same as the acceptance scene is adopted, fatigue damage can be caused to the active simulation excitation module, the active simulation excitation module needs to be replaced frequently, and long-term cost investment is brought. Considering the characteristic that the test only pays attention to the characteristics of the hardware interface, the invention realizes the loop-back test of the SRIO and MGT electric signals in the test scene by designing the self-loop accompany test module, not only can meet the test requirement of the module hardware interface in the test scene, but also does not need to replace the active simulation excitation module regularly, thereby reducing the investment of long-term cost. Under a test configuration, the passive self-loop module mainly comprises an LRMD connector and a PCB board by designing an active simulation excitation module SSM which is not replaced in situ by a loop module SCM, and signals are looped back on the PCB board by a receiving and transmitting channel, so that loop tests of an electric transmission radio IO bus and an electric transmission MGT bus of a tested general data processing module GDPM, a general signal processing module GSPM and a network switching module NSM are realized.
The interaction of Ethernet, light rapidIO signal 1X, light rapidIO signal 4X, 12V power supply signal is mainly carried out between the tested module and the measurement and control equipment, and the communication test of rapidIO bus is carried out by using the rapidIO simulation card on the measurement and control equipment under two configurations of acceptance test and test for the light transmission rapidIO bus on the network exchange module NSM. The tested module and the accompanying testing module mainly conduct interaction of electric rapidIO signals 1X and electric rapidIO signals 4X, MGT. For the telex rapidIO bus and telex MGT bus on the general data processing module GDPM, the general signal processing module GSPM and the network switching module NSM, the influence of the transmission distance on telex high-speed signal quality is considered, and the active simulation excitation module and the passive self-loop module are switched on the test fixture, so that the testing under the two scenes of test and acceptance is realized, the testing of the communication functions of the rapidIO bus and the MGT bus under the acceptance scene is met, and the testing of the interface hardware of the rapidIO bus and the MGT bus under the test scene is also met.
The cross-linking of the measurement and control equipment designed for the 3-type 4 tested modules and the signals of the tested and co-tested modules is shown in fig. 3, the signals of the measurement and control equipment and the tested modules and the co-tested modules are connected with the test tool motherboard through the test cables, and the transmitted signals comprise power supply signals, rapidIO optical signals, ethernet signals and the like. The measurement and control equipment outputs 6 paths of 12V electric signals which are respectively used for 4 tested modules and 2 accompanying test modules; the measurement and control equipment is communicated with 4 tested modules through 4 paths of Ethernet, so that the issuing of test instructions and the feedback of test results of the tested modules are directly connected; the measurement and control equipment provides 3 paths of light rapidIO 4X signals, wherein 1 path of light rapidIO 4X interface communication test is directly connected with the NSM module, and the other 2 paths of light rapidIO 4X interface communication test are respectively connected with the SSM1 and SSM2 modules to issue test instructions and collect test results through the accompanying test module; the measurement and control equipment provides 1 path of optical rapidIO 1X signal and is used for carrying out communication test with an optical rapidIO 1X interface on the NSM module.
The signal cross-linking between the tested module and the accompanying test module in the test fixture is shown in fig. 4, and all the electric RapidIO signals and the electric MGT signals of the GDPM and the GSPM are connected to the accompanying test module. Because the number of the rapidIO signal paths of the NSM is more, in order to reduce test resources, 2 paths of 4X signals and 2 paths of 1X signals are reserved after the rapidIO signal of the NSM is internally looped and connected into the accompanying test module. Under the acceptance test scene, the active simulation excitation module has excitation and collection functions of rapidIO signals and MGT signals, and can realize the communication test functions of an telex rapidIO bus and an telex MGT bus of GDPM, GSPM and NSM by configuring a rapidIO routing table; under the test scene, the loop-back test function of the electric transmission rapidIO bus and the electric transmission MGT bus of the GDPM, the GSPM and the NSM can be realized by carrying out the loop-back on each path of rapidIO signal and MGT signal input by the tested module in the passive loop-back module. For the optical transmission rapidIO signals of NSM, 1 path of 1X signals and 1 path of 4X signals are respectively led out and connected with the measurement and control equipment, the other 4 paths of 1X signals and 19 paths of 4X signals are respectively looped, and the communication test of the optical transmission rapidIO bus is realized by configuring a rapidIO routing table.
In the acceptance test configuration, the test system comprises 2 identical active simulation excitation modules, each of which realizes excitation and collection of half high-speed signals of 1 GDPM, 2 GSPM and 1 NSM. The internal signal cross-linking of each active simulation excitation module is shown in fig. 5, and the 1XRapidIO, 4X RapidIO and 1X MGT signal pins on the FPGA are distributed as shown in fig. 6, 7 and 8. Each active simulation excitation module SSM consists of 1 FPGA, 1 48-port RapidIO switching chip, 1 photoelectric conversion device and the like. The FPGA outputs 1 path of 4X rapidIO signals, 1 path of 1X rapidIO signals and 3 paths of 1X MGT signals; the 48-port rapidIO exchange chip expands 1 path of 4X rapidIO signals and 1 path of 1XRapidio signals into 7 paths of 4X rapidIO signals and 7 paths of 1X rapidIO signals; the photoelectric conversion device converts 1 path of 4X RapidIO electric signals into optical signals. The 7 paths of 4XRapidIO signals, 7 paths of 1X rapidIO signals and 3 paths of 1X MGT signals of each active simulation excitation module are used for providing excitation and acquisition signals of a high-speed rapidIO bus and an MGT bus for a tested GDPM module, a GSPM module and an NSM module in the tool, so that communication test of an electric rapidIO bus and an electric MGT bus under an acceptance scene is realized; the 1-path 4X RapidIO signal of each active simulation excitation module is used for connecting with measurement and control equipment, so that the receiving of the test instruction and the reporting of the test result through the active simulation excitation module are realized.
In the test configuration, the test system contained 2 identical passive self-loop modules, each with internal signals as shown in fig. 9. Each loop without half high-speed signals from 1 GDPM, 2 GSPM and 1 NSM is realized by the loop module, the signals are led into an LRMD connector of the passive self-loop module through a test tool motherboard and led out onto a PCB of the passive self-loop module, and an output interface and an input interface of each path of signals are directly short-circuited on the PCB of the passive self-loop module, wherein the signals comprise 7 paths of 4X rapidIO electric signals, 7 paths of 1X rapidIO electric signals and 3 paths of 1X MGT electric signals.
It will be understood that equivalents and modifications will occur to those skilled in the art in light of the present invention and their spirit, and all such modifications and substitutions are intended to be included within the scope of the present invention as defined in the following claims.
Claims (6)
1. A multipurpose test system supporting high-speed bus test between modules comprises measurement and control equipment, a test tool and a test cable, and is characterized in that:
the test cable is used for connecting the measurement and control equipment and the test tool;
the test tool comprises a test tool case, a test accompanying module, a test tool motherboard and a connector in signal connection with a test cable, wherein the test tool motherboard provides a first slot for supporting the insertion of the test accompanying module and a second slot for supporting the insertion of a tested module;
the tested module and the measurement and control equipment interact with each other to carry out optical transmission rapidIO signals, and the measurement and control equipment provides optical signal excitation for the tested module; the measurement and control equipment and the accompanying measurement module interact with each other through light transmission rapidIO signals, and the measurement and control equipment provides test instructions for the accompanying measurement module; and the tested module and the accompanying testing module are used for carrying out interaction of an electric transmission rapidIO signal and an electric transmission MGT signal, and the accompanying testing module provides electric signal excitation for the tested module.
2. The multipurpose test system supporting high-speed bus test between modules according to claim 1, wherein the measurement and control device further provides power for the tested module and the accompanying module in the test tool, and issues test instructions by executing test software, and collects output signals of the tested module and judges test results.
3. The multipurpose test system supporting high-speed bus test between modules according to claim 1, wherein the accompanying test module comprises an active simulation excitation module and a passive self-loop module, and supports two configurations of acceptance test and test; the acceptance test configuration is used for supporting acceptance delivery test of the avionics module, and the active simulation excitation module is used for providing signal excitation of the telex rapidIO and the telex MGT and supporting communication test of a telex high-speed bus of the tested module; the test configuration is used for supporting the module environment test, and the loop test of partial electric high-speed buses of the tested module is supported by realizing the loop of the electric transmission rapidIO and electric transmission MGT signals without a loop module.
4. The multipurpose test system supporting high-speed bus test between modules according to claim 3, wherein signal definition of the active simulation excitation module and the passive self-loop module on the LRMD connector is subjected to system design, and the active simulation excitation module and the passive self-loop module are replaced and plugged in the same first slot of the test tool motherboard.
5. The multipurpose test system supporting high-speed bus test between modules according to claim 3, wherein the active simulation excitation module comprises an FPGA, a RapidIO exchange chip and a photoelectric conversion device, and the FPGA outputs an electric RapidIO signal and an electric MGT signal; the rapidIO exchange chip expands an electric transmission rapidIO signal and an electric transmission MGT signal output by the FPGA; the optoelectronic switching device converts the electrical RapidIO signal into an optical signal.
6. A multi-purpose test system supporting inter-module high speed bus testing as defined in claim 3 wherein no loop originating from the loop back module comprises a PCB on which signals are routed back to the transceiver channel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310904506.4A CN116820998A (en) | 2023-07-21 | 2023-07-21 | Multipurpose test system supporting high-speed bus test between modules |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310904506.4A CN116820998A (en) | 2023-07-21 | 2023-07-21 | Multipurpose test system supporting high-speed bus test between modules |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN116820998A true CN116820998A (en) | 2023-09-29 |
Family
ID=88125876
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202310904506.4A Pending CN116820998A (en) | 2023-07-21 | 2023-07-21 | Multipurpose test system supporting high-speed bus test between modules |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116820998A (en) |
-
2023
- 2023-07-21 CN CN202310904506.4A patent/CN116820998A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN112286857A (en) | Server I2C bus allocation method and system supporting multi-backplane cascade | |
| CN112511370B (en) | Signal test system with self-switching PHY (physical layer) mode | |
| CN102445614B (en) | Universal signal routing system for electronic product function test | |
| CN108055075B (en) | Optical module temperature cycle test system and method | |
| CN104977884A (en) | Simulation testboard for network control system of multiple unit train | |
| CN116820998A (en) | Multipurpose test system supporting high-speed bus test between modules | |
| CN109633414B (en) | Backboard testing device and method based on ATCA (advanced telecom computing architecture) | |
| CN105589026A (en) | Large switch matrix testing device | |
| CN111294155B (en) | Adapter, data transmission system and method | |
| CN115639880A (en) | Server | |
| CN214623642U (en) | Aviation FC bus daughter card testing device based on SRIO bus | |
| CN209946880U (en) | Test board card for AI heterogeneous server | |
| CN111984486A (en) | CPU network interface performance test board, test system and test method | |
| CN218630780U (en) | Testing device capable of quickly combining interfaces | |
| CN107423246B (en) | Slot-adaptive PXI module and PXI system | |
| CN112306773A (en) | Fault detection platform of FC node machine with standard serial host interface | |
| CN220858679U (en) | Cable backboard and whole cabinet | |
| CN110943890A (en) | Automatic testing arrangement of many interface types and chronogenesis digital equipment | |
| CN114671049B (en) | Dynamic reconfigurable aircraft cabin entertainment system integration test method and device | |
| CN210402332U (en) | Arinc659 bus communication simulation system | |
| CN112738836B (en) | Communication system capacity test equipment, cabinet and system | |
| CN213092297U (en) | CPU network interface performance test board and test system | |
| CN113485288B (en) | Airborne system distributed in-situ test equipment and test method | |
| CN220272901U (en) | Equipment based on 485-CANFD communication port extension | |
| CN210578576U (en) | High-speed interface self-loop testing device based on FMC standard |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |