CN210402332U

CN210402332U - Arinc659 bus communication simulation system

Info

Publication number: CN210402332U
Application number: CN201921161248.0U
Authority: CN
Inventors: 周勇军; 李珊珊; 郑永龙; 李金猛; 王洪涛; 张子明; 韩梁; 张小辉
Original assignee: State Run Wuhu Machinery Factory
Current assignee: State Run Wuhu Machinery Factory
Priority date: 2019-07-23
Filing date: 2019-07-23
Publication date: 2020-04-24
Anticipated expiration: 2029-07-23

Abstract

The utility model relates to an Arinc659 bus communication simulation system, include: the bottom plate module is used for realizing data transmission and debugging interface leading-out of an Arinc659 bus interface; four sets of LRM modules, which are matched with the backplane module and used for networking communication; the power module is matched with the bottom board module and is mainly used for converting an input 28V power supply into working voltages required by four groups of LRM modules and the bottom board module, a case structure is adopted, test simulation and communication verification of an onboard bus module are directly realized, the actual working environment of an onboard module is simulated, the communication function test of an ARINC659 bus interface module is effectively verified, various communication transmission functions are completed through a CPU sub-module, and the testing capability of basic message transmission and main/backup message transmission of the onboard Arinc659 bus interface module is realized.

Description

Arinc659 bus communication simulation system

Technical Field

The utility model relates to a bus data communication field based on specific topological structure specifically is an Arinc659 bus communication simulation system.

Background

At present, the relevant bus test of the airborne product is mainly based on the external bus communication test among products, the communication simulation test of the module-level internal bus has not been developed, along with the integration and the increasing modularization degree of the airborne system of the new machine, a large number of bottom plate buses with high reliability are adopted in the product to carry out the communication among modules, the Arinc659 bus is used as the novel bottom plate bus in the new machine and is used in the new machine product in a large number, and therefore, a communication simulation hardware platform based on the specific internal bus needs to be developed.

In order to realize the function test and fault diagnosis of each module on the Arinc659 bus, the communication protocol of the Arinc659 bus needs to be mastered, and a required bus signal is provided for a tested board by building an Arinc659 bus communication environment; and forming an ARINC659 bus test method from the physical layer and the data link layer to judge whether the bus data transmitted by the tested board meets the protocol requirement. The invention mainly solves the following 2 problems: 1) point-to-point transmission and broadcast transmission capability of basic messages are realized; 2) primary/backup message transmission capabilities of a plurality of bus modules are implemented.

Disclosure of Invention

In order to solve the problem, the utility model provides an Arinc659 bus communication simulation system.

An Arinc659 bus communication simulation system, comprising:

the bottom plate module is used for realizing data transmission of an Arinc659 bus interface and leading out of a debugging interface;

four sets of LRM modules, which are matched with the backplane module and used for networking communication;

and the power supply module is matched with the backplane module and is mainly used for converting an input 28V power supply into working voltages required by four groups of LRM modules and the backplane module.

The LRM module includes three independent ARINC659 bus interface modules and a set of expansion bus interface, the ARINC659 bus interface module include:

the ARINC659 bus interface module is arranged on the case and is responsible for data receiving and transmitting processing on the bus;

and the CPU submodule is responsible for data processing.

The ARINC659 bus interface module comprises an ARINC659 bus interface chip circuit, a configuration table loading circuit, a clock circuit, a power conversion circuit, a bus transceiver circuit and a PCI bus interface circuit.

The ARINC659 bus interface chip circuit, the configuration table loading circuit, the clock circuit, the power conversion circuit, the bus transceiver circuit and the PCI bus interface circuit are all internally provided with an internal PCI bus controller which realizes the connection with the host interface of the core processor and completes the information exchange with the host.

The CPU sub-module comprises a power supply, a clock, a processor unit, a FLASH, an SDRAM, an Ethernet interface, a serial interface and a PCI Bus host interface.

The CPU sub-module is in data communication with an ARINC659 bus interface module through a PCI interface for realizing data reading and generation control of the ARINC659 bus interface module.

The bottom plate module comprises four groups of node sockets, a fault injection module CPCI socket, a plurality of networking ports and serial ports, wherein the four groups of node sockets are used for placing the board cards of the ARINC659 bus interface module to be in one-to-one butt joint with the bottom plate of the case, the fault injection module CPCI socket is used for expanding and installing the fault injection module according with the CPCI interface standard in combination with the product test requirement, and the networking ports and the serial ports are connected to the ARINC 659.

The power supply module provides four paths of voltage, and the four paths of voltage are 3.3V, 1.8V, 5.0V and 2.1V respectively.

The utility model has the advantages that: by adopting the case structure, the test simulation and the communication verification of the onboard bus module are directly realized, the actual working environment of the onboard module is simulated, the communication function test of the ARINC659 bus interface module is effectively verified, various communication transmission functions are completed through the CPU sub-module, and the test capability of the basic message transmission and the main/backup message transmission of the onboard Arinc659 bus interface module is realized.

Drawings

The present invention will be further explained with reference to the drawings and examples.

Fig. 1 is a schematic structural diagram of an LRM module according to the present invention;

FIG. 2 is a schematic structural diagram of an ARINC659 bus interface module of the present invention;

FIG. 3 is a schematic structural diagram of a CPU sub-module of the present invention;

FIG. 4 is a schematic view of the bottom plate of the present invention;

FIG. 5 is a schematic diagram of the internal layout structure of the system of the present invention;

fig. 6 is a schematic diagram of the external structure of the case of the present invention.

Detailed Description

In order to make the utility model realize, the technical means, the creation characteristics, the achievement purpose and the efficacy are easy to understand and understand, and the utility model is further explained below.

As shown in fig. 1 to 6, an Arinc659 bus communication simulation system includes:

and the CPU submodule is responsible for data processing.

The node cards of the LRM module are four in number, wherein the node cards of three independent ARINC659 bus interface modules are used for networking communication, the expansion bus interface is used as a standby node, and automatic replacement is carried out when one of the node cards fails.

The reserved CPU interface is mainly used for expansion, and for node cards, the node card of the ARINC659 bus interface module can be matched with different CPU sub-modules.

The chassis mainly simulates the structure of a product on the machine and is designed to meet the installation relation between a board card of an ARINC659 bus interface module and a bottom plate and the external communication connection.

By adopting the case structure, the test simulation and the communication verification of the onboard bus module are directly realized, the actual working environment of the onboard module is simulated, the communication function test of the ARINC659 bus interface module is effectively verified, various communication transmission functions are completed through the CPU sub-module, and the test capability of the basic message transmission and the main/backup message transmission of the onboard Arinc659 bus interface module is realized.

The ARINC659 bus interface chip circuit is abbreviated as BIU.

The network port and the serial port are led out of the case through the bottom plate to communicate with an external computer.

And a connector convenient for connection is arranged between the bottom plate and the ARINC659 bus interface module.

The network port and the serial port comprise an RS232 serial port 1, an RS232 serial port 2 and an Ethernet port, wherein the RS232 serial port 1, the RS232 serial port 2 and the Ethernet port are used for communication test development and debugging.

Each line of the bottom plate is provided with a signal test point.

As shown in fig. 5 and 6, a is a box, b is a debug interface, in the box, a1 is a bottom plate, a2 is a power module disposed on the bottom plate, a3 is a fault injection module CPCI socket, i.e., a fault injection module socket, a4 is a connector, a5 is a CPU sub-module, a6 is a reserved CPU interface disposed on the CPU sub-module, a7 is an ARINC659 bus interface module, a8 is a reserved connector, and a9 is a plurality of networking ports and serial ports of the CPU sub-module.

Before use, configuration ROMs of three independent sets of ARINC659 bus interface modules need to be configured according to communication requirements, and ROM files are developed and generated by special communication configuration software; after the power-on, the communication data are transmitted according to the communication tables configured by the three independent ARINC659 bus interface modules, all the communication data can be monitored on the upper computer by using the debugging interface, all the communication modes specified by the Arinc659 bus communication protocol can be effectively simulated, and the communication function test of the matched Arinc659 bus module can also be met.

The foregoing shows and describes the general principles, essential features, and advantages of the invention. It should be understood by those skilled in the art that the present invention is not limited to the above embodiments, and the above embodiments and what is described in the specification are the principles of the present invention, and that various changes and modifications may be made without departing from the spirit and scope of the present invention, and these changes and modifications are intended to fall within the scope of the present invention as claimed. The scope of the invention is defined by the appended claims and equivalents thereof.

Claims

1. An Arinc659 bus communication simulation system is characterized in that: the method comprises the following steps:

2. The Arinc659 bus communication emulation system, as in claim 1, further comprising: the LRM module includes three independent ARINC659 bus interface modules and a set of expansion bus interface, the ARINC659 bus interface module include:

and the CPU submodule is responsible for data processing.

3. The Arinc659 bus communication emulation system, as in claim 2, further comprising: the ARINC659 bus interface module comprises an ARINC659 bus interface chip circuit, a configuration table loading circuit, a clock circuit, a power conversion circuit, a bus transceiver circuit and a PCI bus interface circuit.

4. The Arinc659 bus communication emulation system, as in claim 3, further characterized in that: the ARINC659 bus interface chip circuit, the configuration table loading circuit, the clock circuit, the power conversion circuit, the bus transceiver circuit and the PCI bus interface circuit are all internally provided with an internal PCI bus controller which realizes the connection with the host interface of the core processor and completes the information exchange with the host.

5. The Arinc659 bus communication emulation system, as in claim 2, further comprising: the CPU sub-module comprises a power supply, a clock, a processor unit, a FLASH, an SDRAM, an Ethernet interface, a serial interface and a PCI Bus host interface.

6. The Arinc659 bus communication emulation system, as in claim 2, further comprising: the CPU sub-module is in data communication with an ARINC659 bus interface module through a PCI interface for realizing data reading and generation control of the ARINC659 bus interface module.

7. The Arinc659 bus communication emulation system, as in claim 2, further comprising: the bottom plate module comprises four groups of node sockets, a fault injection module CPCI socket, a plurality of networking ports and serial ports, wherein the four groups of node sockets are used for placing the board cards of the ARINC659 bus interface module to be in one-to-one butt joint with the bottom plate of the case, the fault injection module CPCI socket is used for expanding and installing the fault injection module according with the CPCI interface standard in combination with the product test requirement, and the networking ports and the serial ports are connected to the ARINC 659.

8. The Arinc659 bus communication emulation system, as in claim 1, further comprising: the power supply module provides four paths of voltage, and the four paths of voltage are 3.3V, 1.8V, 5.0V and 2.1V respectively.