CN214623642U - Aviation FC bus daughter card testing device based on SRIO bus - Google Patents
Aviation FC bus daughter card testing device based on SRIO bus Download PDFInfo
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- CN214623642U CN214623642U CN202121286633.5U CN202121286633U CN214623642U CN 214623642 U CN214623642 U CN 214623642U CN 202121286633 U CN202121286633 U CN 202121286633U CN 214623642 U CN214623642 U CN 214623642U
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Abstract
The utility model discloses an aviation FC bus daughter card testing arrangement based on SRIO bus, include: the device comprises a case and a CPU module, wherein a motherboard and a patch panel are arranged inside the case, an SRIO switching chip and a plurality of VPX slots are arranged on the motherboard, the SRIO switching chip is electrically connected between the CPU module and the VPX slots, each VPX slot is electrically connected with one patch panel, and the patch panel is used for plugging an FC daughter card to be tested. The case is connected with the vibration equipment or is in a high-temperature and low-temperature test environment. The utility model discloses a testing arrangement can effectively detect aviation FC daughter card at low temperature/high temperature, the operational failure under the vibration environment, screens out the aviation FC daughter card of defect in time, guarantees aviation bus system's normal communication, gets rid of the aviation FC daughter card that has the defect, improves system reliability, guarantees avionics system safety, improves aircraft attendance and combat efficiency, has very big economy and realistic meaning.
Description
Technical Field
The utility model relates to an aviation airborne equipment technical field, in particular to aviation FC bus daughter card testing arrangement based on SRIO bus.
Background
The aviation FC bus is used as an important component of an airborne avionics system, high-speed communication among subsystems of avionics equipment is completed, and the aviation FC bus has important significance in ensuring flight safety. The communication daughter card based on the FC bus is an important communication component of avionic equipment, and has an important role in avionic system communication.
As aircraft experience a harsh natural environment throughout service, from takeoff to landing, from low to high temperatures, and through a range of vibratory environments. Therefore, the FC daughter card needs to be tested before being used, and the FC aviation bus is guaranteed to work normally in a severe environment.
However, at present, there is no testing device dedicated to the items of high and low temperature, vibration, etc. of the FC daughter card.
SUMMERY OF THE UTILITY MODEL
The embodiment of the utility model provides an aviation FC bus daughter card testing arrangement based on SRIO bus for do not have the problem of carrying out the device that high low temperature and vibration detected to the FC daughter card specially among the solution prior art.
On the one hand, the embodiment of the utility model provides an aviation FC bus daughter card testing arrangement based on SRIO bus, include: a case and a CPU module;
a motherboard and a pinboard are arranged in the case, an SRIO switching chip and a plurality of VPX slots are arranged on the motherboard, the SRIO switching chip is electrically connected between the CPU module and the VPX slots, each VPX slot is electrically connected with one pinboard, and the pinboard is used for inserting FC daughter cards to be tested;
the case is connected with the vibration equipment or is in a high-temperature and low-temperature test environment.
In a possible implementation manner, the adapter plate includes a test adapter plate and an optical interface adapter plate, the test adapter plate is used for connecting the FC interface and the SRIO interface of the FC daughter card plugged thereon to the motherboard, the optical interface adapter plate is used for connecting the SRIO interface of the FC daughter card plugged thereon to the motherboard, and simultaneously, an optical signal input by the FC daughter card through the FC interface is converted into an electrical signal and input to the motherboard.
In one possible implementation, the motherboard is disposed on the inner bottom surface of the chassis, and the SRIO switch chip on the motherboard contacts the inner bottom surface of the chassis to transfer heat to the chassis.
In a possible implementation manner, a locking strip is arranged inside the case, the adapter plate is fixed inside the case by the locking strip, and the adapter plate transfers heat to the case through the locking strip.
In a possible implementation manner, a power interface is arranged on the outer side surface of the case, the power interface is electrically connected with the VPX slot and the SRIO switching chip on the motherboard to supply power to the VPX slot and the SRIO switching chip, and the power interface is used for plugging a power supply cable.
In one possible implementation manner, a motherboard is provided with a power conversion circuit, and the power conversion circuit comprises a first power conversion chip and a second power conversion chip; the first power conversion chip is used for converting the 28V direct current input by the power interface into 5V direct current and supplying the 5V direct current to the VPX slot and the second power conversion chip; the second power conversion chip is used for converting the 5V direct current output by the first power conversion chip into voltage required by the SRIO switching chip and supplying the voltage to the SRIO switching chip.
In one possible implementation manner, the first power conversion chip is electrically connected with the VPX slot through a fuse; the first power conversion chip and the second power conversion chip are also electrically connected through a fuse.
In one possible implementation, the fuse is a PTC self-healing fuse.
In a possible implementation manner, a plurality of mounting grooves are arranged on the outer side surface of the case, each mounting groove is electrically connected with the motherboard, and the mounting grooves are used for inserting external equipment.
In one possible implementation, the CPU module is electrically connected to the motherboard by a high-speed cable.
The utility model provides an aviation FC bus daughter card testing arrangement based on SRIO bus has following advantage:
the working faults of the aviation FC daughter card under the low-temperature/high-temperature and vibration environments can be effectively detected, the aviation FC daughter card with the defects is screened out timely, normal communication of an aviation bus system is guaranteed, the aviation FC daughter card with the defects is eliminated, system reliability is improved, safety of an avionic system is guaranteed, the attendance rate and operational efficiency of an airplane are improved, and the method has great economic and practical significance.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic composition diagram of an aviation FC bus daughter card testing device based on an SRIO bus according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a box provided in an embodiment of the present invention;
fig. 3 is a schematic view of an installation structure of a motherboard inside a box provided by an embodiment of the present invention;
fig. 4 is a schematic diagram of a connection structure between an interposer and an FC daughter card according to an embodiment of the present invention;
fig. 5 is a schematic connection diagram of a motherboard and a CPU module according to an embodiment of the present invention;
fig. 6 is a schematic diagram of a power conversion circuit according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
Fig. 1 is the embodiment of the utility model provides an aviation FC bus daughter card testing arrangement constitutes the schematic diagram based on SRIO bus. The embodiment of the utility model provides an in aviation FC bus daughter card testing arrangement based on SRIO bus, include: a chassis 100 and a CPU module 200;
a motherboard 110 and an adapter plate 120 are arranged in the case 100, an SRIO switching chip and a plurality of VPX slots are arranged on the motherboard 110, the SRIO switching chip is electrically connected between the CPU module and the VPX slots, each VPX slot is electrically connected with one adapter plate 120, and the adapter plate 120 is used for inserting an FC daughter card 130 to be tested;
the enclosure 100 is connected to a vibrating device or is in a high and low temperature test environment.
Illustratively, the SRIO bus is a Serial Rapid IO bus, and the FC bus is a Fiber Channel bus. The CPU module 200 is configured to load a test task, and transmit a data task to the motherboard 110 through the SRIO bus, specifically, to the SRIO switch chip, where the SRIO switch chip expands one SRIO bus into SRIO buses having the same number as the number of the switch boards 120, so that the data task can be distributed to each switch board 120 through the SRIO switch chip, and then transmitted to each FC daughter card 130. When a vibration test is performed, the chassis 100 may be mounted on a vibration device, the vibration device is started, meanwhile, the CPU module 200 loads a test task, a data task is transmitted to each FC daughter card 130, and under the control of the CPU module 200, the data task is mutually transmitted between two adjacent FC daughter cards 130, and when the FC daughter cards 130 fail due to vibration, for example, when a data transmission rate is too low or an error rate is too high, the CPU module 200 may determine the FC daughter card 130 that has failed. The process of the high and low temperature test is similar to the vibration test, and the description is not repeated here.
In the embodiment of the present invention, the number of the VPX slots is 6, and the VPX slots are 3U structures, and the VPX slots and the adaptor plate 120 are electrically connected by VPX connectors, specifically, the VPX connectors in the VPX slots are J1410186-1, J1410140-1 and J1410142-1, and the VPX connectors on the adaptor plate 120 are J1410189-3, J1410187-3 and J1410190-3.
In one possible embodiment, the interposer 120 includes a test interposer for connecting the FC interface and the SRIO interface of the FC daughter card 130 plugged thereon to the motherboard 110, and an optical interface interposer for connecting the SRIO interface of the FC daughter card 130 plugged thereon to the motherboard 110, and converting an optical signal input by the FC daughter card 130 through the FC interface into an electrical signal and inputting the electrical signal to the motherboard 110. In actual testing, 6 test adapter boards or 6 optical interface adapter boards can be plugged into the motherboard 110.
Fig. 2 is a schematic structural diagram of a chassis according to an embodiment of the present invention. In a possible embodiment, a plurality of mounting slots 121 are disposed on the outer side of the chassis 100, each mounting slot 121 is electrically connected to the motherboard 110, and the mounting slots 121 are used for plugging external devices.
For example, a fastening member is disposed on the mounting groove 121, and the fastening member not only plays a role of locking the external device, but also can conduct heat to the chassis 100 through the fastening member when the external device generates a large amount of heat. In order to further improve the heat dissipation performance of the chassis 100, the outer side surface of the chassis 100 is provided with a plurality of protruding heat dissipation teeth 101, and the heat dissipation teeth 101 can increase the contact area between heat and air and improve the heat dissipation speed. Meanwhile, the bottom of the case 100 is provided with a mounting plate 102, the mounting plate 102 is provided with a plurality of mounting holes, and the case 100 can be connected to a vibrating device or other devices after components such as screws penetrate through the mounting holes.
Fig. 3 is a schematic view of an installation structure of a motherboard inside a box according to an embodiment of the present invention. In one possible embodiment, the motherboard 110 is disposed on the inner bottom surface of the chassis 100, and the SRIO switch chip on the motherboard 110 is in contact with the inner bottom surface of the chassis 100 to transfer heat to the chassis 100.
For example, among the chips on the motherboard 110, the SRIO switch chip has the highest power consumption, and the power consumption of the single SRIO switch chip reaches 6W, and for fast heat dissipation, the thermal pad may be used to fill the gap between the SRIO switch chip and other signals and the inner bottom surface of the chassis 100. During a normal temperature or high and low temperature test, the bottom of the chassis 100 needs to be lifted, so that air flows through the bottom of the chassis 100, and the heat dissipation speed of the motherboard 110 is increased. During vibration testing, the mounting plate 102 is tightly coupled to the vibration device, so that heat generated inside the cabinet 100 can be dissipated through the vibration device.
Fig. 4 is a schematic diagram of a connection structure between the interposer and the FC daughter card according to an embodiment of the present invention. In one possible embodiment, a locking bar is disposed inside the chassis 100, and the locking bar fixes the adapter plate 120 inside the chassis 100, and the adapter plate 120 transfers heat to the chassis 100 through the locking bar.
Illustratively, the locking bars clamp on both sides of the adapter plate 120 to stabilize the adapter plate 120 inside the chassis 100.
In a possible embodiment, a power interface 103 is disposed on an outer side surface of the chassis 100, the power interface 103 is electrically connected to the VPX slot and the SRIO switch chip on the motherboard 110 to supply power to the VPX slot and the SRIO switch chip, and the power interface 103 is used for plugging a power supply cable.
Illustratively, the power interface 103 is an aircraft connector that provides 28V dc power to the electrical devices inside the enclosure 100 via external power equipment.
Fig. 5 is a schematic diagram of the connection between the motherboard and the CPU module provided by the embodiment of the present invention, and fig. 6 is a schematic diagram of the power conversion circuit provided by the embodiment of the present invention. In one possible embodiment, the motherboard 110 has a power conversion circuit thereon, and the power conversion circuit includes a first power conversion chip and a second power conversion chip; the first power conversion chip is used for converting the 28V direct current input by the power interface 103 into 5V direct current and supplying the 5V direct current to the VPX slot and the second power conversion chip; the second power conversion chip is used for converting the 5V direct current output by the first power conversion chip into voltage required by the SRIO switching chip and supplying the voltage to the SRIO switching chip.
Illustratively, the first power conversion chip is model LTM4613, which converts the 28V dc input from the power interface 103 into 5V dc, and supplies the 5V dc to the VPX socket and the second power conversion chip. The second power conversion chip is model number LTM4644, which converts the input 5V dc power into a voltage required by the SRIO switch chip, such as 1.5V, 1.2V, or 1.0V, and supplies the voltage to the SRIO switch chip.
The utility model discloses an in the embodiment, the quantity of first power conversion chip is three, and 4 VPX slots are supplied with respectively to first 4 way power of export, and 2 way power of second export are supplied with remaining 2 VPX slots respectively, and two second power conversion chips are supplied with respectively to three 2 way power of export. And each second power supply conversion chip supplies power to one SRIO switching chip. The SRIO switching chip is provided with the model number of CPS1848 and the number of the two SRIO switching chips is respectively a first SRIO switching chip and a second SRIO switching chip, the first SRIO switching chip is connected with 3 of the 6 VPX slots and is also connected with the second SRIO switching chip and the CPU module through an SRIO bus, and the second SRIO switching chip is connected with the rest 3 VPX slots.
In one possible embodiment, the first power conversion chip is electrically connected with the VPX slot through a fuse; the first power conversion chip and the second power conversion chip are also electrically connected through a fuse.
Illustratively, since the current output by the first power conversion chip is large and reaches 8A, in order to ensure the safety of the VPX socket and the second power conversion chip, a fuse is connected between the first power conversion chip and the VPX socket and the second power conversion chip, and when the output current of the first power conversion chip fluctuates greatly and exceeds the working current of the fuse, the fuse is opened to cut off the abnormal current.
In one possible embodiment, the fuse is a PTC self-healing fuse.
Illustratively, the PTC self-recovery fuse is made of a high molecular organic polymer, and is capable of automatically turning off when a current is excessive, limiting the passage of a large current, and automatically turning on when the current returns to normal.
In one possible embodiment, CPU module 200 is electrically connected to motherboard 110 via a high speed cable.
Illustratively, the high-speed cable plugs into a data interface on the outside of the chassis 100, enabling the CPU module 200 and the chassis 100 to be separated. The embodiment of the present invention provides a data interface, i.e. a power interface 103, and a high-speed cable, i.e. a power supply cable, which transmits the data task issued by the CPU module 200 to the motherboard 110 while providing a power supply.
The embodiment of the utility model provides an in, 28V direct current is provided by CPU module 200, CPU module still possesses 1 ethernet interface and a serial ports debugging interface simultaneously, use DDR2 SDRAM memory more than 1Gb, have the FLASH chip more than 64Mb, possess the storage space more than 200MB, a test program for operation FC daughter card 130, also externally provide at least 4 way standard X4 SRIO interfaces and compatible X1 requirement simultaneously, the connector of SRIO interface is MOLEX company's 755860011.
Further, in order to improve the vibration resistance of the motherboard 110 and avoid the occurrence of connection failure of the motherboard 110, the motherboard 110 is a PCB with a thickness of 2.5mm, and the power line and the SRIO line thereon are fixed on the PCB by welding, dispensing and locking.
While the preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the appended claims be interpreted as including the preferred embodiment and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (10)
1. The utility model provides an aviation FC bus daughter card testing arrangement based on SRIO bus which characterized in that includes: a chassis (100) and a CPU module (200);
a motherboard (110) and an adapter plate (120) are arranged in the case (100), an SRIO switch chip and a plurality of VPX slots are arranged on the motherboard (110), the SRIO switch chip is electrically connected between the CPU module and the VPX slots, each VPX slot is electrically connected with one adapter plate (120), and the adapter plate (120) is used for inserting an FC daughter card (130) to be tested;
the case (100) is connected with a vibrating device or is in a high-temperature and low-temperature test environment.
2. The aviation FC bus daughter card testing device based on the SRIO bus as claimed in claim 1, wherein the interposer (120) comprises a test interposer and an optical interface interposer, the test interposer is used to connect the FC interface and the SRIO interface of the FC daughter card (130) plugged thereon to the motherboard (110), the optical interface interposer is used to connect the SRIO interface of the FC daughter card (130) plugged thereon to the motherboard (110), and simultaneously convert the optical signal input by the FC daughter card (130) through the FC interface into an electrical signal and input the electrical signal to the motherboard (110).
3. The SRIO bus-based aviation FC bus daughter card testing device according to claim 1, wherein the motherboard (110) is disposed on an inner bottom surface of the chassis (100), and an SRIO switch chip on the motherboard (110) is in contact with the inner bottom surface of the chassis (100) to transfer heat to the chassis (100).
4. The SRIO bus-based aviation FC bus daughter card testing device according to claim 1, wherein a locking bar is arranged inside the case (100), the locking bar fixes the adapter plate (120) inside the case (100), and the adapter plate (120) transfers heat to the case (100) through the locking bar.
5. The aviation FC bus daughter card testing device based on the SRIO bus as claimed in claim 1, wherein a power interface (103) is disposed on an outer side surface of the chassis (100), the power interface (103) is electrically connected to a VPX slot and an SRIO switch chip on the motherboard (110) to supply power to the VPX slot and the SRIO switch chip, and the power interface (103) is used for plugging a power supply cable.
6. The SRIO bus-based aviation FC bus daughter card testing device according to claim 5, wherein the motherboard (110) is provided with a power conversion circuit, and the power conversion circuit comprises a first power conversion chip and a second power conversion chip;
the first power conversion chip is used for converting the 28V direct current input by the power interface (103) into 5V direct current and supplying the 5V direct current to the VPX slot and the second power conversion chip;
the second power conversion chip is used for converting the 5V direct current output by the first power conversion chip into the voltage required by the SRIO switching chip and supplying the voltage to the SRIO switching chip.
7. The SRIO bus-based aviation FC bus daughter card testing device according to claim 6, wherein the first power conversion chip is electrically connected with the VPX slot through a fuse;
the first power conversion chip and the second power conversion chip are also electrically connected through a fuse.
8. The SRIO bus-based aviation FC bus daughter card testing device according to claim 7, wherein the fuse is a PTC self-healing fuse.
9. The aviation FC bus daughter card testing device based on the SRIO bus is characterized in that a plurality of mounting grooves (121) are arranged on the outer side surface of the case (100), each mounting groove (121) is electrically connected with the motherboard (110), and the mounting grooves (121) are used for inserting external equipment.
10. The SRIO bus-based aviation FC bus daughter card testing device according to claim 1, wherein the CPU module (200) is electrically connected to the motherboard (110) by a high speed cable.
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114301526A (en) * | 2021-12-20 | 2022-04-08 | 北京计算机技术及应用研究所 | PXIe-based one-to-many optical fiber communication board card |
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2021
- 2021-06-09 CN CN202121286633.5U patent/CN214623642U/en active Active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114301526A (en) * | 2021-12-20 | 2022-04-08 | 北京计算机技术及应用研究所 | PXIe-based one-to-many optical fiber communication board card |
CN114301526B (en) * | 2021-12-20 | 2023-09-26 | 北京计算机技术及应用研究所 | PXIe-based one-to-many optical fiber communication board card |
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