CN116805627A - 半导体装置 - Google Patents

半导体装置 Download PDF

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CN116805627A
CN116805627A CN202211508789.2A CN202211508789A CN116805627A CN 116805627 A CN116805627 A CN 116805627A CN 202211508789 A CN202211508789 A CN 202211508789A CN 116805627 A CN116805627 A CN 116805627A
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花冈正行
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Sanken Electric Co Ltd
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Abstract

本发明提供一种半导体装置，该半导体装置不降低IGBT的阈值、负载短路耐量而降低了反向导通型IGBT的反向峰值电流(Irpeak)。与IGBT区域的基极区域的杂质浓度相比，降低了二极管区域的杂质浓度。

Description

半导体装置
技术领域
本发明涉及在将IGBT和FWD反向并联连接的半导体装置中降低了反向峰值电流(Irpeak)的半导体装置。
背景技术
作为驱动马达等的开关元件，已知有将IGBT(Insulated Gate BipolarTransistor：绝缘栅双极型晶体管)和FWD(Free Wheeling Diode：续流二极管)反向并联连接的半导体装置。与IGBT反向并联连接的FWD具有保护IGBT免受由在马达等线圈中产生的反电动势引起的回流电流的影响的作用。
已知有将IGBT区域和FWD区域形成在同一半导体基板上来实现小型化以及削减接合线的反向导通型IGBT(RC-IGBT)。为了提高反向导通型IGBT的动作特性，需要提高形成于同一半导体基板的IGBT区域和FWD区域各自的动作特性。专利文献1的反向导通型IGBT公开了在FWD区域中设置杂质浓度比阳极区域34的杂质浓度高的P阳极层36和N+载流子控制层44的例子。由此，使FWD区域的正向电流增加，FWD动作时的开关速度提高，能够实现高速化。
现有技术文献
专利文献
专利文献1：日本特开2015-109341号公报
发明内容
发明所要解决的课题
但是，在专利文献1的半导体装置中，如果要降低FWD区域的反向峰值电流(Irpeak)，则也需要降低基极区域的杂质浓度。于是，IGBT的阈值电压、负载短路耐量降低。
因此，本发明的课题在于提供一种不使IGBT的阈值电压、负载短路耐量降低而降低了反向导通型IGBT的反向峰值电流(Irpeak)的半导体装置。
用于解决课题的手段
本发明的半导体装置具备IGBT区域以及二极管区域，IGBT区域包括：第一导电型的第一半导体区域；第二导电型的第二半导体区域，其位于第一半导体区域上，第二导电型是与第一导电型相反的导电型；第一导电型的第三半导体区域，其位于第二半导体区域上；第二导电型的第四半导体区域，其位于第一半导体区域上，且设置于与第二半导体区域相反的一侧；以及控制电极，其隔着绝缘膜而与第二半导体区域对置地配置，该二极管区域包括位于第一半导体区域上的第二导电型的第五半导体区域，第五半导体区域的杂质浓度比第二半导体区域的杂质浓度低。
发明效果
根据本发明，能够实现在不使IGBT的阈值、负载短路耐量降低的情况下降低了反向导通型IGBT的反向峰值电流(Irpeak)的半导体装置。
附图说明
图1是用于表示本发明的实施例1的剖视图。
图2是用于表示本发明的实施例1的杂质浓度分布的剖视图。
图3是表示本发明的实施例的半导体装置中的IGBT区域19的杂质浓度(虚线)和二极管区域20的杂质浓度(实线)的图。
图4是表示现有的半导体装置中的IGBT区域19的杂质浓度(虚线)和二极管区域20的杂质浓度(实线)的图。
附图标记的说明
1：漂移区域；2：基极区域；3：发射极区域；4：集电极区域；5：FS层；6：阳极区域；7：阴极接触区域；8：载流子蓄积层；9：接触区域；11：第二导电型(P型)的半导体区域；12：第一导电型(N型)的半导体区域；13：第一主电极；14：第二主电极；15：控制电极；16：辅助电极；17：绝缘膜；18：绝缘膜；19：IGBT区域；20：二极管区域；21：第一沟槽；22：第二沟槽。
具体实施方式
下面，参照附图对用于实施本发明的方式进行详细地说明。但是，本发明不受以下记载的任何限定。
参照附图对多个实施方式进行详细地说明。附图的记载是示意性的，厚度与尺寸的关系、各层的厚度、比率等也是一例，并不对发明的技术思想进行限定。另外，在附图彼此之间，彼此的尺寸的关系、比率有时也不同。在以下的说明中，在说明部件的位置关系时，“上部”、“下部”、“右侧”、“左侧”等基于参照的附图的朝向，根据需要进行使用，但并不限定发明的技术思想。另外，即使部件不接触，有时也会使用“上部”、“下部”、“右侧”、“左侧”等的说明。另外，“杂质浓度”表示有助于半导体的导电性的杂质元素的有效的浓度。例如，在半导体中含有成为施主的n型杂质元素和成为受主的p型杂质元素的情况下，将由于另一方的元素的抵消量除去后的一方的杂质元素的浓度定义为“杂质浓度”。此外，关于半导体层或半导体区域的杂质浓度，只要没有特别声明，则表示各半导体层或各半导体区域的最大杂质浓度。
[实施例1]
对本发明的实施例1的半导体装置进行说明。图1是表示本发明的半导体装置的元件结构的图。半导体装置设置有IGBT区域19和FWD的二极管区域20，如图1的半导体装置所示，以被IGBT区域19夹着的方式设置有二极管区域20。此外，既可以交替地设置IGBT区域19和二极管区域20，也可以以俯视观察半导体装置时二极管区域20从外侧包围IGBT区域19的至少一部分的方式设置。
IGBT区域19具备第一导电型(N型)的漂移区域1、漂移区域1上的第二导电型(P型)的基极区域2、以及基极区域2上的第一导电型(N型)的发射极区域3。第一沟槽21以贯通基极区域2的方式形成，在第一沟槽21的侧壁形成有发射极区域3。
在漂移区域1的下方具备第二导电型(P型)的集电极区域4，在漂移区域1与集电极区域4之间具备杂质浓度比漂移区域1的杂质浓度高的第一导电型(N型)的场截止(FS)层5。在侧壁与发射极区域3相邻的第一沟槽21和与其相邻的第一沟槽21之间设置有杂质浓度比基极区域2的杂质浓度高的第二导电型(P型)的接触区域9。另外，杂质浓度比漂移区域1的杂质浓度高的第一导电型(N型)的载流子蓄积层8设置在基极区域2与漂移区域1之间。
在第一沟槽21内隔着绝缘膜17具备控制电极15。第一主电极13与发射极区域3低电阻地电连接，第二主电极14与集电极区域4低电阻地电连接。接触区域9可以与第一主电极13电连接。
二极管区域20具备漂移区域1和漂移区域1上的第二导电型(P型)的阳极区域6。第二沟槽22以贯通阳极区域6的方式形成，在第二沟槽22的侧壁形成有第二导电型(P型)的半导体区域11。在相邻的第二沟槽22之间，与半导体区域11相邻地设置有杂质浓度比漂移区域1的杂质浓度高的第一导电型(N型)的半导体区域12。
在漂移区域1的下方代替集电极区域而设置有杂质浓度比FS层5的杂质浓度高的第一导电型(N型)的阴极接触区域7。阴极接触区域7设置在FS层5的下侧。
在第二沟槽22内隔着绝缘膜18具有辅助电极16。在图1的半导体装置中，辅助电极16与第一主电极13电连接。第一主电极13与半导体区域11低电阻地电连接，第二主电极14与阴极接触区域7低电阻地电连接。半导体区域12与第一主电极13电连接。
二极管区域20的阳极区域6的杂质浓度比IGBT区域19的基极区域2的杂质浓度低。即，阳极区域6的最大的杂质浓度低于IGBT区域19的基极区域2的最大的杂质浓度。由于存在短路耐量、IGBT的阈值变化的问题，因此优选IGBT区域19的基极区域2的杂质浓度比较高。但是，若同样地提高二极管区域20的阳极区域6的杂质浓度，则反向峰值电流(Irpeak)变大。因此，不使基极区域2的杂质浓度与二极管区域20的阳极区域6的杂质浓度相同，而使阳极区域6的杂质浓度低于IGBT区域19的基极区域2的杂质浓度。由此，半导体装置不会使IGBT的阈值、负载短路耐量降低，而能够降低反向导通型IGBT的反向峰值电流(Irpeak)。阳极区域6例如通过选择扩散而形成。在利用掩模限定从作为阳极区域6的区域的上表面侧进行离子注入的量，并通过从第二沟槽22的侧壁倾斜注入离子以及进行热扩散而形成阳极区域6的情况下，能够同时进行形成阳极区域6的离子注入和形成基极区域2的离子注入。
图2示出本发明的实施例的半导体装置的杂质浓度分布。另外，图3示出本发明的实施例的半导体装置的漂移区域1及其上方的IGBT区域19和二极管区域20的杂质浓度分布。另外，作为比较例，在图4中示出以往的IGBT区域和二极管区域的漂移区域1及其上方的杂质浓度分布。此外，在图3和图4中，虚线表示IGBT区域19中的从发射极区域3上表面到漂移区域1的杂质浓度分布，实线表示二极管区域20中的从半导体区域11到漂移区域1的杂质浓度分布。在实施例的半导体装置中，观察图2和图3可知，阳极区域6的杂质浓度比IGBT区域19的基极区域2的杂质浓度低，阳极区域6的杂质浓度相对于基极区域2的杂质浓度为1/20～1/2的范围。
在此，可以在IGBT区域19设置(N型)的载流子蓄积层8，但优选在二极管区域20的阳极区域6与漂移区域1之间不设置(N型)的载流子蓄积层8。在二极管区域20设置载流子蓄积层8的情况下，载流子蓄积层8一般从基板表面侧进行离子注入而形成，因此形成阳极区域6的区域的杂质浓度比载流子蓄积层8的杂质浓度高。于是，阳极区域6域为P型且以较低的杂质浓度稳定地形成变得困难。因此，优选在二极管区域20不设置载流子蓄积层8。而且，若在二极管区域20设置载流子蓄积层8，则耗尽层更容易向阳极区域6侧扩展。与通过将阳极区域6设为低杂质浓度而使耗尽层变得更容易扩展相叠加，耗尽层变得容易扩展。因此，优选在二极管区域20不设置载流子蓄积层8。
在此，当使阳极区域6与第一主电极13接触时，由于阳极区域6为较低的杂质浓度，因此接触电阻变大，二极管区域20的正向电压上升。因此，在第二沟槽22的侧面形成杂质浓度比阳极区域6的杂质浓度高的半导体区域11，半导体区域11与第一主电极13电连接。由此，能够抑制二极管区域20的正向电压上升。而且，当二极管区域20的阳极区域6的杂质浓度降低时，耗尽层易于在二极管区域20的第二沟槽22的侧面延伸。因此，能够抑制半导体区域11作为沟道阻止层到达半导体区域11的耗尽层进一步扩展。在此，从第二沟槽22的开口部起在半导体区域11的上表面上形成有从第二沟槽22延伸的绝缘膜18。通过形成绝缘膜18，在第二沟槽22的开口部附近阳极区域6不与第一主电极13直接接触，能够提高二极管区域20的耐压。
另外，辅助电极16与控制电极15相同，通过N型的多晶硅形成。
若设置半导体区域11，则二极管区域20的P型杂质浓度上升。因此，在二极管区域20的表面设置有N型的半导体区域12。N型的半导体区域12可以通过与发射极区域3相同的工序形成，杂质浓度比漂移区域1、载流子蓄积层8的杂质浓度高。由此，能够将二极管正向动作时的二极管区域20的表面的空穴(载流子)保持得较少。为了将二极管区域20的表面的空穴浓度保持得较低，优选半导体区域12的杂质浓度形成为比P型的半导体区域11的杂质浓度高，且半导体区域12比P型的半导体区域11深。由此，能够将二极管区域20的表面的空穴保持得更少，从而能够降低反向导通型IGBT的反向峰值电流(Irpeak)。

Claims (4)

1.一种半导体装置，其特征在于，
所述半导体装置具备IGBT区域以及二极管区域，
所述IGBT区域包括：
第一导电型的第一半导体区域；
第二导电型的第二半导体区域，其位于所述第一半导体区域上，所述第二导电型是与第一导电型相反的导电型；
第一导电型的第三半导体区域，其位于所述第二半导体区域上；
第二导电型的第四半导体区域，其位于所述第一半导体区域上，且设置于与第二半导体区域相反的一侧；以及
控制电极，其隔着绝缘膜而与第二半导体区域对置地配置，
所述二极管区域包括位于所述第一半导体区域上的第二导电型的第五半导体区域，
所述第五半导体区域的杂质浓度比所述第二半导体区域的杂质浓度低。
2.根据权利要求1所述的半导体装置，其特征在于，
在所述第一半导体区域与所述第二半导体区域之间包含杂质浓度比所述第一半导体区域的杂质浓度高的第六半导体区域，
在所述第一半导体区域与所述第五半导体区域之间不包含所述第六半导体区域。
3.根据权利要求1或2所述的半导体装置，其特征在于，
所述控制电极设置于贯通所述第二半导体区域的第一沟槽内，
以贯通所述第五半导体区域的方式设置有第二沟槽和与所述第二沟槽内绝缘的辅助电极，
该半导体装置包括：
第二导电型的第七半导体区域，其位于所述第五半导体区域上且处于所述第二沟槽的侧面，杂质浓度比所述第五半导体区域的杂质浓度高；以及
第一导电型的第八半导体区域，其位于所述第五半导体区域上且与所述第七半导体区域相邻地配置，杂质浓度比所述第一半导体区域的杂质浓度高，
所述第八半导体区域与所述第五半导体区域的界面比所述第七半导体区域与所述第五半导体区域的界面深。
4.根据权利要求3所述的半导体装置，其特征在于，
所述辅助电极由第一导电型的多晶硅构成。
CN202211508789.2A 2022-03-23 2022-11-29 半导体装置 Pending CN116805627A (zh)

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